implementation in beflags */
arch_irn_flags_simple_jump = 1U << 3, /**< a simple jump instruction */
arch_irn_flags_not_scheduled = 1U << 4, /**< node must not be scheduled*/
- arch_irn_flags_backend = 1U << 5, /**< begin of custom backend
+ /** node writes to a spillslot, this means we can load from the spillslot
+ * anytime (important when deciding wether we can rematerialize) */
+ arch_irn_flags_spill = 1U << 5,
+ arch_irn_flags_backend = 1U << 6, /**< begin of custom backend
flags */
} arch_irn_flags_t;
ENUM_BITSET(arch_irn_flags_t)
be_node_set_reg_class_in(res, n_be_Spill_frame, cls_frame);
be_node_set_reg_class_in(res, n_be_Spill_val, cls);
arch_set_irn_register_req_out(res, 0, arch_no_register_req);
+ arch_add_irn_flags(res, arch_irn_flags_spill);
return res;
}
if (is_Unknown(arg) || is_NoMem(arg))
return 1;
- if (be_is_Spill(skip_Proj_const(arg)))
+ if (arch_irn_is(skip_Proj_const(arg), spill))
return 1;
if (arg == get_irg_frame(env->irg))
set_irn_pinned(fist, op_pin_state_floats);
set_ia32_use_frame(fist);
set_ia32_op_type(fist, ia32_AddrModeD);
+ arch_add_irn_flags(fist, arch_irn_flags_spill);
assert((long)pn_ia32_fist_M == (long) pn_ia32_fisttp_M);
mem = new_r_Proj(fist, mode_M, pn_ia32_fist_M);
store = new_bd_ia32_fst(dbgi, block, frame, noreg_GP, nomem, node, tgt_mode);
set_ia32_use_frame(store);
set_ia32_op_type(store, ia32_AddrModeD);
+ arch_add_irn_flags(store, arch_irn_flags_spill);
SET_IA32_ORIG_NODE(store, node);
store_mem = new_r_Proj(store, mode_M, pn_ia32_fst_M);
set_ia32_use_frame(store);
set_ia32_op_type(store, ia32_AddrModeD);
set_ia32_ls_mode(store, mode_Iu);
+ arch_add_irn_flags(store, arch_irn_flags_spill);
store_mem = new_r_Proj(store, mode_M, pn_ia32_Store_M);
set_ia32_op_type(zero_store, ia32_AddrModeD);
add_ia32_am_offs_int(zero_store, 4);
set_ia32_ls_mode(zero_store, mode_Iu);
+ arch_add_irn_flags(zero_store, arch_irn_flags_spill);
in[0] = zero_store_mem;
in[1] = store_mem;
set_ia32_ls_mode(sse_store, mode);
set_ia32_op_type(sse_store, ia32_AddrModeD);
set_ia32_use_frame(sse_store);
+ arch_add_irn_flags(sse_store, arch_irn_flags_spill);
store_mem = new_r_Proj(sse_store, mode_M, pn_ia32_xStoreSimple_M);
/* load into x87 register */
set_ia32_op_type(store_high, ia32_AddrModeD);
set_ia32_ls_mode(store_low, mode_Iu);
set_ia32_ls_mode(store_high, mode_Is);
+ arch_add_irn_flags(store_low, arch_irn_flags_spill);
+ arch_add_irn_flags(store_high, arch_irn_flags_spill);
add_ia32_am_offs_int(store_high, 4);
in[0] = mem_low;
set_ia32_use_frame(fist);
set_ia32_op_type(fist, ia32_AddrModeD);
set_ia32_ls_mode(fist, mode_Ls);
+ arch_add_irn_flags(fist, arch_irn_flags_spill);
assert((long)pn_ia32_fist_M == (long) pn_ia32_fisttp_M);
return new_r_Proj(fist, mode_M, pn_ia32_fist_M);
res, res_mode);
set_ia32_op_type(vfst, ia32_AddrModeD);
set_ia32_use_frame(vfst);
+ arch_add_irn_flags(vfst, arch_irn_flags_spill);
vfst_mem = new_r_Proj(vfst, mode_M, pn_ia32_fst_M);
ir_node *nomem = get_irg_no_mem(irg);
ir_node *stf = create_stf(dbgi, block, ftoi, sp, nomem, mode_fp,
NULL, 0, true);
+ arch_add_irn_flags(stf, arch_irn_flags_spill);
ir_node *ld = new_bd_sparc_Ld_imm(dbgi, block, sp, stf, mode_gp,
NULL, 0, true);
ir_node *res = new_r_Proj(ld, mode_gp, pn_sparc_Ld_res);
ir_node *nomem = get_irg_no_mem(irg);
ir_node *st = new_bd_sparc_St_imm(dbgi, block, op, sp, nomem,
mode_gp, NULL, 0, true);
+ arch_add_irn_flags(st, arch_irn_flags_spill);
ir_node *ldf = new_bd_sparc_Ldf_s(dbgi, block, sp, st, mode_fp,
NULL, 0, true);
ir_node *res = new_r_Proj(ldf, mode_fp, pn_sparc_Ldf_res);
ir_mode *mode;
ir_node *ldf;
ir_node *mem;
+ arch_add_irn_flags(st, arch_irn_flags_spill);
set_irn_pinned(st, op_pin_state_floats);
if (value1 != NULL) {
ir_node *st1 = new_bd_sparc_St_imm(dbgi, block, value1, sp, nomem,
mode_gp, NULL, 4, true);
+ arch_add_irn_flags(st1, arch_irn_flags_spill);
ir_node *in[2] = { st, st1 };
ir_node *sync = new_r_Sync(block, 2, in);
set_irn_pinned(st1, op_pin_state_floats);
ir_node *stf = create_stf(dbgi, block, new_value, stack, nomem,
float_mode, NULL, 0, true);
ir_node *ld;
+ arch_add_irn_flags(stf, arch_irn_flags_spill);
set_irn_pinned(stf, op_pin_state_floats);
ld = new_bd_sparc_Ld_imm(dbgi, block, stack, stf, mode_gp, NULL, 0, true);