reintroduce riscv64 struct sigcontext

[musl] / src / fenv / x86_64 / fenv.s

diff --git a/src/fenv/x86_64/fenv.s b/src/fenv/x86_64/fenv.s
index dda6b61..98d876d 100644 (file)
--- a/src/fenv/x86_64/fenv.s
+++ b/src/fenv/x86_64/fenv.s
@@ -3,6 +3,7 @@
 feclearexcept:
                # maintain exceptions in the sse mxcsr, clear x87 exceptions
        mov %edi,%ecx
+       and $0x3f,%ecx
        fnstsw %ax
        test %eax,%ecx
        jz 1f
@@ -20,16 +21,18 @@ feclearexcept:
 
 .global feraiseexcept
 .type feraiseexcept,@function
-feraiseexcept: 
+feraiseexcept:
+       and $0x3f,%edi
        stmxcsr -8(%rsp)
        or %edi,-8(%rsp)
        ldmxcsr -8(%rsp)
        xor %eax,%eax
        ret
 
-.global fesetround
-.type fesetround,@function
-fesetround:
+.global __fesetround
+.hidden __fesetround
+.type __fesetround,@function
+__fesetround:
        push %rax
        xor %eax,%eax
        mov %edi,%ecx
@@ -74,7 +77,7 @@ fesetenv:
        ret
 1:     push %rax
        push %rax
-       push %rax
+       pushq $0xffff
        pushq $0x37f
        fldenv (%rsp)
        pushq $0x1f80
@@ -85,6 +88,7 @@ fesetenv:
 .global fetestexcept
 .type fetestexcept,@function
 fetestexcept:
+       and $0x3f,%edi
        push %rax
        stmxcsr (%rsp)
        pop %rsi