mitigate performance regression in libc-internal locks on x86_64

[musl] / arch / x86_64 / atomic.h

diff --git a/arch/x86_64/atomic.h b/arch/x86_64/atomic.h
index ae0a576..7690183 100644 (file)
--- a/arch/x86_64/atomic.h
+++ b/arch/x86_64/atomic.h
@@ -47,16 +47,16 @@ static inline int a_cas(volatile int *p, int t, int s)
        return t;
 }
 
-static inline void a_or(volatile void *p, int v)
+static inline void a_or(volatile int *p, int v)
 {
        __asm__( "lock ; or %1, %0"
-               : "=m"(*(int *)p) : "r"(v) : "memory" );
+               : "=m"(*p) : "r"(v) : "memory" );
 }
 
-static inline void a_and(volatile void *p, int v)
+static inline void a_and(volatile int *p, int v)
 {
        __asm__( "lock ; and %1, %0"
-               : "=m"(*(int *)p) : "r"(v) : "memory" );
+               : "=m"(*p) : "r"(v) : "memory" );
 }
 
 static inline int a_swap(volatile int *x, int v)
@@ -83,7 +83,7 @@ static inline void a_dec(volatile int *x)
 
 static inline void a_store(volatile int *p, int x)
 {
-       __asm__( "mov %1, %0" : "=m"(*p) : "r"(x) : "memory" );
+       __asm__( "mov %1, %0 ; lock ; orl $0,(%%rsp)" : "=m"(*p) : "r"(x) : "memory" );
 }
 
 static inline void a_spin()
@@ -91,6 +91,11 @@ static inline void a_spin()
        __asm__ __volatile__( "pause" : : : "memory" );
 }
 
+static inline void a_barrier()
+{
+       __asm__ __volatile__( "" : : : "memory" );
+}
+
 static inline void a_crash()
 {
        __asm__ __volatile__( "hlt" : : : "memory" );