use inline atomics and thread pointer on arm models supporting them

[musl] / arch / arm / atomic.h

diff --git a/arch/arm/atomic.h b/arch/arm/atomic.h
index 734d287..fe88225 100644 (file)
--- a/arch/arm/atomic.h
+++ b/arch/arm/atomic.h
@@ -22,7 +22,28 @@ static inline int a_ctz_64(uint64_t x)
        return a_ctz_l(y);
 }
 
+#if __ARM_ARCH_6__ || __ARM_ARCH_6K__ || __ARM_ARCH_6ZK__ \
+ || __ARM_ARCH_7A__ || __ARM_ARCH_7R__ \
+ || __ARM_ARCH >= 7
+static inline int __k_cas(int t, int s, volatile int *p)
+{
+       int ret;
+       __asm__(
+               "       mcr p15,0,r0,c7,c10,5\n"
+               "1:     ldrex %0,%3\n"
+               "       subs %0,%0,%1\n"
+               "       strexeq %0,%2,%3\n"
+               "       teqeq %0,#1\n"
+               "       beq 1b\n"
+               "       mcr p15,0,r0,c7,c10,5\n"
+               : "=&r"(ret)
+               : "r"(t), "r"(s), "m"(*p)
+               : "memory", "cc" );
+       return ret;
+}
+#else
 #define __k_cas ((int (*)(int, int, volatile int *))0xffff0fc0)
+#endif
 
 static inline int a_cas(volatile int *p, int t, int s)
 {