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add missing SIOCSIFNAME from linux/sockios.h to ioctl.h
[musl]
/
arch
/
mips
/
atomic_arch.h
diff --git
a/arch/mips/atomic_arch.h
b/arch/mips/atomic_arch.h
index
b111c89
..
1248d17
100644
(file)
--- a/
arch/mips/atomic_arch.h
+++ b/
arch/mips/atomic_arch.h
@@
-1,61
+1,58
@@
-#define a_cas a_cas
-static inline int a_cas(volatile int *p, int t, int s)
+#if __mips_isa_rev < 6
+#define LLSC_M "m"
+#else
+#define LLSC_M "ZC"
+#endif
+
+#define a_ll a_ll
+static inline int a_ll(volatile int *p)
{
{
- int dummy;
- __asm__ __volatile__(
- ".set push\n"
- ".set mips2\n"
- ".set noreorder\n"
- " sync\n"
- "1: ll %0, %2\n"
- " bne %0, %3, 1f\n"
- " addu %1, %4, $0\n"
- " sc %1, %2\n"
- " beq %1, $0, 1b\n"
- " nop\n"
- " sync\n"
- "1: \n"
- ".set pop\n"
- : "=&r"(t), "=&r"(dummy), "+m"(*p) : "r"(t), "r"(s) : "memory" );
- return t;
+ int v;
+#if __mips < 2
+ __asm__ __volatile__ (
+ ".set push ; .set mips2\n\t"
+ "ll %0, %1"
+ "\n\t.set pop"
+ : "=r"(v) : "m"(*p));
+#else
+ __asm__ __volatile__ (
+ "ll %0, %1"
+ : "=r"(v) : LLSC_M(*p));
+#endif
+ return v;
}
}
-#define a_s
wap a_swap
-static inline int a_s
wap(volatile int *x
, int v)
+#define a_s
c a_sc
+static inline int a_s
c(volatile int *p
, int v)
{
{
- int old, dummy;
- __asm__ __volatile__(
- ".set push\n"
- ".set mips2\n"
- ".set noreorder\n"
- " sync\n"
- "1: ll %0, %2\n"
- " addu %1, %3, $0\n"
- " sc %1, %2\n"
- " beq %1, $0, 1b\n"
- " nop\n"
- " sync\n"
- ".set pop\n"
- : "=&r"(old), "=&r"(dummy), "+m"(*x) : "r"(v) : "memory" );
- return old;
+ int r;
+#if __mips < 2
+ __asm__ __volatile__ (
+ ".set push ; .set mips2\n\t"
+ "sc %0, %1"
+ "\n\t.set pop"
+ : "=r"(r), "=m"(*p) : "0"(v) : "memory");
+#else
+ __asm__ __volatile__ (
+ "sc %0, %1"
+ : "=r"(r), "="LLSC_M(*p) : "0"(v) : "memory");
+#endif
+ return r;
}
}
-#define a_
fetch_add a_fetch_add
-static inline
int a_fetch_add(volatile int *x, int v
)
+#define a_
barrier a_barrier
+static inline
void a_barrier(
)
{
{
- int old, dummy;
- __asm__ __volatile__(
- ".set push\n"
- ".set mips2\n"
- ".set noreorder\n"
- " sync\n"
- "1: ll %0, %2\n"
- " addu %1, %0, %3\n"
- " sc %1, %2\n"
- " beq %1, $0, 1b\n"
- " nop\n"
- " sync\n"
- ".set pop\n"
- : "=&r"(old), "=&r"(dummy), "+m"(*x) : "r"(v) : "memory" );
- return old;
+#if __mips < 2
+ /* mips2 sync, but using too many directives causes
+ * gcc not to inline it, so encode with .long instead. */
+ __asm__ __volatile__ (".long 0xf" : : : "memory");
+#else
+ __asm__ __volatile__ ("sync" : : : "memory");
+#endif
}
}
+
+#define a_pre_llsc a_barrier
+#define a_post_llsc a_barrier
+
+#undef LLSC_M