add support for sh2 interrupt-masking-based atomics to sh port
[musl] / arch / sh / src / __set_thread_area.c
1 #include "pthread_impl.h"
2 #include "libc.h"
3 #include "sh_atomic.h"
4 #include <elf.h>
5
6 /* Also perform sh-specific init */
7
8 #define CPU_HAS_LLSC 0x0040
9
10 __attribute__((__visibility__("hidden"))) unsigned __sh_atomic_model, __sh_nommu;
11
12 int __set_thread_area(void *p)
13 {
14         size_t *aux;
15         __asm__ __volatile__ ( "ldc %0, gbr" : : "r"(p) : "memory" );
16 #ifndef __SH4A__
17         if (__hwcap & CPU_HAS_LLSC) {
18                 __sh_atomic_model = SH_A_LLSC;
19                 return 0;
20         }
21 #if !defined(__SH3__) && !defined(__SH4__)
22         for (aux=libc.auxv; *aux; aux+=2) {
23                 if (*aux != AT_PLATFORM) continue;
24                 const char *s = (void *)aux[1];
25                 if (s[0]!='s' || s[1]!='h' || s[2]!='2' || s[3]-'0'<10u) break;
26                 __sh_atomic_model = SH_A_IMASK;
27                 __sh_nommu = 1;
28                 return 0;
29         }
30 #endif
31         /* __sh_atomic_model = SH_A_GUSA; */ /* 0, default */
32 #endif
33         return 0;
34 }