1 #ifndef _INTERNAL_ATOMIC_H
2 #define _INTERNAL_ATOMIC_H
6 static inline int a_ctz_l(unsigned long x)
8 static const char debruijn32[32] = {
9 0, 1, 23, 2, 29, 24, 19, 3, 30, 27, 25, 11, 20, 8, 4, 13,
10 31, 22, 28, 18, 26, 10, 7, 12, 21, 17, 9, 6, 16, 5, 15, 14
12 return debruijn32[(x&-x)*0x076be629 >> 27];
15 static inline int a_ctz_64(uint64_t x)
20 return 32 + a_ctz_l(y);
25 #if ((__ARM_ARCH_6__ || __ARM_ARCH_6K__ || __ARM_ARCH_6ZK__) && !__thumb__) \
26 || __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
28 #if __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
29 #define MEM_BARRIER "dmb ish"
31 #define MEM_BARRIER "mcr p15,0,r0,c7,c10,5"
34 static inline int __k_cas(int t, int s, volatile int *p)
49 : "r"(t), "r"(s), "Q"(*p)
54 #define __k_cas ((int (*)(int, int, volatile int *))0xffff0fc0)
57 static inline int a_cas(volatile int *p, int t, int s)
61 if (!__k_cas(t, s, p))
68 static inline void *a_cas_p(volatile void *p, void *t, void *s)
70 return (void *)a_cas(p, (int)t, (int)s);
73 static inline int a_swap(volatile int *x, int v)
77 while (__k_cas(old, v, x));
81 static inline int a_fetch_add(volatile int *x, int v)
85 while (__k_cas(old, old+v, x));
89 static inline void a_inc(volatile int *x)
94 static inline void a_dec(volatile int *x)
99 static inline void a_store(volatile int *p, int x)
101 while (__k_cas(*p, x, p));
104 static inline void a_spin()
108 static inline void a_crash()
110 *(volatile char *)0=0;
113 static inline void a_and(volatile int *p, int v)
117 while (__k_cas(old, old&v, p));
120 static inline void a_or(volatile int *p, int v)
124 while (__k_cas(old, old|v, p));
127 static inline void a_or_l(volatile void *p, long v)
132 static inline void a_and_64(volatile uint64_t *p, uint64_t v)
134 union { uint64_t v; uint32_t r[2]; } u = { v };
135 a_and((int *)p, u.r[0]);
136 a_and((int *)p+1, u.r[1]);
139 static inline void a_or_64(volatile uint64_t *p, uint64_t v)
141 union { uint64_t v; uint32_t r[2]; } u = { v };
142 a_or((int *)p, u.r[0]);
143 a_or((int *)p+1, u.r[1]);