From: Rich Felker <dalias@aerifal.cx>
Date: Sun, 22 Jul 2012 22:55:01 +0000 (-0400)
Subject: add floating point register saving/restoring to mips setjmp/longjmp
X-Git-Url: http://nsz.repo.hu/git/?p=musl;a=commitdiff_plain;h=dc046f55bbff5f79d022882723c73a6b9af0bf86;hp=75fff40b9b536e0e6847d17ecc076894ca7b7068

add floating point register saving/restoring to mips setjmp/longjmp

also fix the alignment of jmp_buf to meet the abi. linux always
emulates fpu on mips if it's not present, so enabling this code
unconditionally is "safe" but may be slow. in the long term it may be
preferable to find a way to disable it on soft float builds.
---

diff --git a/arch/mips/bits/setjmp.h b/arch/mips/bits/setjmp.h
index c43ea2be..6bb15464 100644
--- a/arch/mips/bits/setjmp.h
+++ b/arch/mips/bits/setjmp.h
@@ -1 +1 @@
-typedef unsigned long jmp_buf [30];
+typedef unsigned long long jmp_buf [15];
diff --git a/src/setjmp/mips/longjmp.s b/src/setjmp/mips/longjmp.s
index 9cf6f8d0..fc8e7260 100644
--- a/src/setjmp/mips/longjmp.s
+++ b/src/setjmp/mips/longjmp.s
@@ -10,7 +10,21 @@ longjmp:
 	bne     $2, $0, 1f
 	nop
 	addu    $2, $2, 1
-1:      lw      $ra,  0($4)
+1:	lw      $8,  48($4)
+	ctc1    $8,  $31
+	lwc1    $20, 56($4)
+	lwc1    $21, 60($4)
+	lwc1    $22, 64($4)
+	lwc1    $23, 68($4)
+	lwc1    $24, 72($4)
+	lwc1    $25, 76($4)
+	lwc1    $26, 80($4)
+	lwc1    $27, 84($4)
+	lwc1    $28, 88($4)
+	lwc1    $29, 92($4)
+	lwc1    $30, 96($4)
+	lwc1    $31, 100($4)
+	lw      $ra,  0($4)
 	lw      $sp,  4($4)
 	lw      $16,  8($4)
 	lw      $17, 12($4)
diff --git a/src/setjmp/mips/setjmp.s b/src/setjmp/mips/setjmp.s
index 38ed5e00..1b79525f 100644
--- a/src/setjmp/mips/setjmp.s
+++ b/src/setjmp/mips/setjmp.s
@@ -21,5 +21,19 @@ setjmp:
 	sw      $23, 36($4)
 	sw      $30, 40($4)
 	sw      $28, 44($4)
+	cfc1    $8, $31
+	sw      $8,  48($4)
+	swc1    $20, 56($4)
+	swc1    $21, 60($4)
+	swc1    $22, 64($4)
+	swc1    $23, 68($4)
+	swc1    $24, 72($4)
+	swc1    $25, 76($4)
+	swc1    $26, 80($4)
+	swc1    $27, 84($4)
+	swc1    $28, 88($4)
+	swc1    $29, 92($4)
+	swc1    $30, 96($4)
+	swc1    $31, 100($4)
 	jr      $ra
 	li      $2, 0