From d40461c4076fccd01b788455c16bc7118288b33c Mon Sep 17 00:00:00 2001 From: Matthias Braun Date: Mon, 3 Sep 2007 13:28:00 +0000 Subject: [PATCH] don't create Inc/Dec in transform phase but delay that decision for the finish phase (of course we still create IncMem and DecMem nodes) [r15659] --- ir/be/ia32/ia32_finish.c | 48 +++++++++++++++++++++++++++++++++++-- ir/be/ia32/ia32_transform.c | 21 ++++------------ 2 files changed, 51 insertions(+), 18 deletions(-) diff --git a/ir/be/ia32/ia32_finish.c b/ir/be/ia32/ia32_finish.c index 99340cca4..3490c56b4 100644 --- a/ir/be/ia32/ia32_finish.c +++ b/ir/be/ia32/ia32_finish.c @@ -171,6 +171,22 @@ static ir_node *create_immediate_from_am(ia32_code_gen_t *cg, return res; } +static int is_am_one(const ir_node *node) +{ + int offset = get_ia32_am_offs_int(node); + ir_entity *entity = get_ia32_am_sc(node); + + return offset == 1 && entity == NULL; +} + +static int is_am_minus_one(const ir_node *node) +{ + int offset = get_ia32_am_offs_int(node); + ir_entity *entity = get_ia32_am_sc(node); + + return offset == -1 && entity == NULL; +} + /** * Transforms a LEA into an Add or SHL if possible. * THIS FUNCTIONS MUST BE CALLED AFTER REGISTER ALLOCATION. @@ -243,6 +259,14 @@ static void ia32_transform_lea_to_add_or_shl(ir_node *node, ia32_code_gen_t *cg) } #endif op1 = base; + if(cg->isa->opt & IA32_OPT_INCDEC) { + if(is_am_one(node)) { + goto make_inc; + } + if(is_am_minus_one(node)) { + goto make_dec; + } + } op2 = create_immediate_from_am(cg, node); goto make_add; } @@ -257,6 +281,14 @@ static void ia32_transform_lea_to_add_or_shl(ir_node *node, ia32_code_gen_t *cg) if(base == NULL) { if(has_immediates && scale == 0) { op1 = index; + if(cg->isa->opt & IA32_OPT_INCDEC) { + if(is_am_one(node)) { + goto make_inc; + } + if(is_am_minus_one(node)) { + goto make_dec; + } + } op2 = create_immediate_from_am(cg, node); goto make_add; } else if(!has_immediates && scale > 0) { @@ -288,10 +320,23 @@ make_add: nomem = new_NoMem(); res = new_rd_ia32_Add(dbgi, irg, block, noreg, noreg, op1, op2, nomem); arch_set_irn_register(arch_env, res, out_reg); - set_ia32_op_type(res, ia32_Normal); set_ia32_commutative(res); goto exchange; +make_inc: + dbgi = get_irn_dbg_info(node); + block = get_nodes_block(node); + res = new_rd_ia32_Inc(dbgi, irg, block, op1); + arch_set_irn_register(arch_env, res, out_reg); + goto exchange; + +make_dec: + dbgi = get_irn_dbg_info(node); + block = get_nodes_block(node); + res = new_rd_ia32_Dec(dbgi, irg, block, op1); + arch_set_irn_register(arch_env, res, out_reg); + goto exchange; + make_shl: dbgi = get_irn_dbg_info(node); block = get_nodes_block(node); @@ -299,7 +344,6 @@ make_shl: nomem = new_NoMem(); res = new_rd_ia32_Shl(dbgi, irg, block, op1, op2); arch_set_irn_register(arch_env, res, out_reg); - set_ia32_op_type(res, ia32_Normal); goto exchange; exchange: diff --git a/ir/be/ia32/ia32_transform.c b/ir/be/ia32/ia32_transform.c index f6914e35b..851df4906 100644 --- a/ir/be/ia32/ia32_transform.c +++ b/ir/be/ia32/ia32_transform.c @@ -871,22 +871,6 @@ static ir_node *gen_Add(ir_node *node) { #endif return be_transform_node(add_immediate_op); } - if(env_cg->isa->opt & IA32_OPT_INCDEC - && addr.symconst_ent == NULL) { - if(addr.offset == 1) { - ir_node *new_op = be_transform_node(add_immediate_op); - new_op = new_rd_ia32_Inc(dbgi, irg, block, new_op); - SET_IA32_ORIG_NODE(new_op, - ia32_get_old_node_name(env_cg, node)); - return new_op; - } else if(addr.offset == -1) { - ir_node *new_op = be_transform_node(add_immediate_op); - new_op = new_rd_ia32_Dec(dbgi, irg, block, new_op); - SET_IA32_ORIG_NODE(new_op, - ia32_get_old_node_name(env_cg, node)); - return new_op; - } - } new_op = create_lea_from_address(dbgi, block, &addr); SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env_cg, node)); @@ -1073,6 +1057,11 @@ static ir_node *gen_Sub(ir_node *node) { return gen_binop_x87_float(node, op1, op2, new_rd_ia32_vfsub); } + if(is_Const(op2)) { + ir_fprintf(stderr, "Optimisation warning: found sub with const (%+F)\n", + node); + } + return gen_binop(node, op1, op2, new_rd_ia32_Sub, 0); } -- 2.20.1