From ab85c635582eadf20abe4fca71c1a0ed214b60c6 Mon Sep 17 00:00:00 2001 From: Christoph Mallon Date: Sun, 2 Dec 2012 23:11:42 +0100 Subject: [PATCH] ia32: Merge Conv_I2I and Conv_I2I8Bit. --- ir/be/ia32/ia32_emitter.c | 1 - ir/be/ia32/ia32_finish.c | 1 - ir/be/ia32/ia32_optimize.c | 14 ++++++-------- ir/be/ia32/ia32_spec.pl | 27 ++++++++++----------------- ir/be/ia32/ia32_transform.c | 13 +++++-------- 5 files changed, 21 insertions(+), 35 deletions(-) diff --git a/ir/be/ia32/ia32_emitter.c b/ir/be/ia32/ia32_emitter.c index 00436c158..0b201023f 100644 --- a/ir/be/ia32/ia32_emitter.c +++ b/ir/be/ia32/ia32_emitter.c @@ -3329,7 +3329,6 @@ static void ia32_register_binary_emitters(void) be_set_emitter(op_ia32_Cmp, bemit_cmp); be_set_emitter(op_ia32_Const, bemit_mov_const); be_set_emitter(op_ia32_Conv_I2I, bemit_conv_i2i); - be_set_emitter(op_ia32_Conv_I2I8Bit, bemit_conv_i2i); be_set_emitter(op_ia32_CopyB_i, bemit_copybi); be_set_emitter(op_ia32_Cwtl, bemit_cwtl); be_set_emitter(op_ia32_Dec, bemit_dec); diff --git a/ir/be/ia32/ia32_finish.c b/ir/be/ia32/ia32_finish.c index 1e18a5a4d..646342df8 100644 --- a/ir/be/ia32/ia32_finish.c +++ b/ir/be/ia32/ia32_finish.c @@ -211,7 +211,6 @@ static inline int need_constraint_copy(ir_node *irn) case iro_ia32_Lea: case iro_ia32_Conv_I2I: - case iro_ia32_Conv_I2I8Bit: case iro_ia32_CMovcc: case iro_ia32_Minus64Bit: return 0; diff --git a/ir/be/ia32/ia32_optimize.c b/ir/be/ia32/ia32_optimize.c index bf1b2ac8a..ac92e9028 100644 --- a/ir/be/ia32/ia32_optimize.c +++ b/ir/be/ia32/ia32_optimize.c @@ -1303,7 +1303,7 @@ static void optimize_conv_store(ir_node *node) } else { pred = pred_proj; } - if (!is_ia32_Conv_I2I(pred) && !is_ia32_Conv_I2I8Bit(pred)) + if (!is_ia32_Conv_I2I(pred)) return; if (get_ia32_op_type(pred) != ia32_Normal) return; @@ -1330,10 +1330,9 @@ static void optimize_load_conv(ir_node *node) ir_mode *load_mode; ir_mode *conv_mode; - if (!is_ia32_Conv_I2I(node) && !is_ia32_Conv_I2I8Bit(node)) + if (!is_ia32_Conv_I2I(node)) return; - assert((int)n_ia32_Conv_I2I_val == (int)n_ia32_Conv_I2I8Bit_val); pred = get_irn_n(node, n_ia32_Conv_I2I_val); if (!is_Proj(pred)) return; @@ -1378,17 +1377,16 @@ static void optimize_conv_conv(ir_node *node) int conv_mode_bits; int pred_mode_bits; - if (!is_ia32_Conv_I2I(node) && !is_ia32_Conv_I2I8Bit(node)) + if (!is_ia32_Conv_I2I(node)) return; - assert((int)n_ia32_Conv_I2I_val == (int)n_ia32_Conv_I2I8Bit_val); pred_proj = get_irn_n(node, n_ia32_Conv_I2I_val); if (is_Proj(pred_proj)) pred = get_Proj_pred(pred_proj); else pred = pred_proj; - if (!is_ia32_Conv_I2I(pred) && !is_ia32_Conv_I2I8Bit(pred)) + if (!is_ia32_Conv_I2I(pred)) return; /* we know that after a conv, the upper bits are sign extended @@ -1411,7 +1409,7 @@ static void optimize_conv_conv(ir_node *node) /* Argh:We must change the opcode to 8bit AND copy the register constraints */ if (get_mode_size_bits(conv_mode) == 8) { const arch_register_req_t **reqs = arch_get_irn_register_reqs_in(node); - set_irn_op(pred, op_ia32_Conv_I2I8Bit); + set_irn_op(pred, op_ia32_Conv_I2I); arch_set_irn_register_reqs_in(pred, reqs); } } else { @@ -1426,7 +1424,7 @@ static void optimize_conv_conv(ir_node *node) /* Argh:We must change the opcode to 8bit AND copy the register constraints */ if (get_mode_size_bits(conv_mode) == 8) { const arch_register_req_t **reqs = arch_get_irn_register_reqs_in(node); - set_irn_op(result_conv, op_ia32_Conv_I2I8Bit); + set_irn_op(result_conv, op_ia32_Conv_I2I); arch_set_irn_register_reqs_in(result_conv, reqs); } } diff --git a/ir/be/ia32/ia32_spec.pl b/ir/be/ia32/ia32_spec.pl index 7959fd2c5..b95a4026e 100644 --- a/ir/be/ia32/ia32_spec.pl +++ b/ir/be/ia32/ia32_spec.pl @@ -1699,23 +1699,16 @@ Cwtl => { Conv_I2I => { op_flags => [ "uses_memory", "fragile" ], state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "gp" ], - out => [ "gp", "none", "none", "none", "none" ] }, - ins => [ "base", "index", "mem", "val" ], - outs => [ "res", "flags", "M", "X_regular", "X_except" ], - emit => "mov%#Ml %#AS3, %D0", - am => "source,unary", - latency => 1, - attr => "ir_mode *smaller_mode", - init_attr => "attr->ls_mode = smaller_mode;", - mode => $mode_gp, -}, - -Conv_I2I8Bit => { - op_flags => [ "uses_memory", "fragile" ], - state => "exc_pinned", - reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], - out => [ "gp", "none", "none", "none", "none" ] }, + constructors => { + "" => { + reg_req => { in => [ "gp", "gp", "none", "gp" ], + out => [ "gp", "none", "none", "none", "none" ] } + }, + "8bit" => { + reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], + out => [ "gp", "none", "none", "none", "none" ] } + } + }, ins => [ "base", "index", "mem", "val" ], outs => [ "res", "flags", "M", "X_regular", "X_except" ], emit => "mov%#Ml %#AS3, %D0", diff --git a/ir/be/ia32/ia32_transform.c b/ir/be/ia32/ia32_transform.c index c4e3d9491..868b399a6 100644 --- a/ir/be/ia32/ia32_transform.c +++ b/ir/be/ia32/ia32_transform.c @@ -3117,8 +3117,7 @@ static ir_node *create_set_32bit(dbg_info *dbgi, ir_node *new_block, /* we might need to conv the result up */ if (get_mode_size_bits(mode) > 8) { - new_node = new_bd_ia32_Conv_I2I8Bit(dbgi, new_block, noreg_GP, noreg_GP, - nomem, new_node, mode_Bu); + new_node = new_bd_ia32_Conv_I2I_8bit(dbgi, new_block, noreg_GP, noreg_GP, nomem, new_node, mode_Bu); SET_IA32_ORIG_NODE(new_node, orig_node); } @@ -3670,7 +3669,7 @@ static ir_node *create_Conv_I2I(dbg_info *dbgi, ir_node *block, ir_node *base, ir_node *(*func)(dbg_info*, ir_node*, ir_node*, ir_node*, ir_node*, ir_node*, ir_mode*); func = get_mode_size_bits(mode) == 8 ? - new_bd_ia32_Conv_I2I8Bit : new_bd_ia32_Conv_I2I; + new_bd_ia32_Conv_I2I_8bit : new_bd_ia32_Conv_I2I; return func(dbgi, block, base, index, mem, val, mode); } @@ -4441,8 +4440,7 @@ static ir_node *gen_Proj_Load(ir_node *node) case pn_Load_X_regular: return new_rd_Proj(dbgi, new_pred, mode_X, pn_ia32_Load_X_regular); } - } else if (is_ia32_Conv_I2I(new_pred) || - is_ia32_Conv_I2I8Bit(new_pred)) { + } else if (is_ia32_Conv_I2I(new_pred)) { set_irn_mode(new_pred, mode_T); switch ((pn_Load)proj) { case pn_Load_res: @@ -5013,7 +5011,7 @@ static ir_node *gen_ffs(ir_node *node) SET_IA32_ORIG_NODE(set, node); /* conv to 32bit */ - conv = new_bd_ia32_Conv_I2I8Bit(dbgi, block, noreg_GP, noreg_GP, nomem, set, mode_Bu); + conv = new_bd_ia32_Conv_I2I_8bit(dbgi, block, noreg_GP, noreg_GP, nomem, set, mode_Bu); SET_IA32_ORIG_NODE(conv, node); /* neg */ @@ -5089,8 +5087,7 @@ static ir_node *gen_parity(ir_node *node) SET_IA32_ORIG_NODE(new_node, node); /* conv to 32bit */ - new_node = new_bd_ia32_Conv_I2I8Bit(dbgi, new_block, noreg_GP, noreg_GP, - nomem, new_node, mode_Bu); + new_node = new_bd_ia32_Conv_I2I_8bit(dbgi, new_block, noreg_GP, noreg_GP, nomem, new_node, mode_Bu); SET_IA32_ORIG_NODE(new_node, node); return new_node; } -- 2.20.1