From 691f04021c92911d6b533e2380e1883b76e94fda Mon Sep 17 00:00:00 2001 From: Michael Beck Date: Tue, 15 Apr 2008 18:20:13 +0000 Subject: [PATCH] - do not use imul mem, imm32 on newer AMD cpu's [r19288] --- ir/be/ia32/ia32_architecture.c | 1 + ir/be/ia32/ia32_architecture.h | 2 ++ ir/be/ia32/ia32_transform.c | 8 +++++--- 3 files changed, 8 insertions(+), 3 deletions(-) diff --git a/ir/be/ia32/ia32_architecture.c b/ir/be/ia32/ia32_architecture.c index 32e4871b4..ff4be15f0 100644 --- a/ir/be/ia32/ia32_architecture.c +++ b/ir/be/ia32/ia32_architecture.c @@ -443,6 +443,7 @@ void ia32_setup_cg_config(void) IS_P6_ARCH(opt_arch) || IS_NETBURST_ARCH(opt_arch) || (opt_arch == arch_core2) || (opt_arch == arch_generic) || (opt_arch == arch_i386) || (opt_arch == arch_i486); + ia32_cg_config.use_imul_mem_imm32 = !(opt_arch == arch_opteron || opt_arch == arch_k10); ia32_cg_config.optimize_cc = opt_cc; ia32_cg_config.use_unsafe_floatconv = opt_unsafe_floatconv; diff --git a/ir/be/ia32/ia32_architecture.h b/ir/be/ia32/ia32_architecture.h index ba2277f1f..af54faad0 100644 --- a/ir/be/ia32/ia32_architecture.h +++ b/ir/be/ia32/ia32_architecture.h @@ -53,6 +53,8 @@ typedef struct { unsigned use_sub_esp_4:1; /** use sub esp, 8 instead of 2 push's */ unsigned use_sub_esp_8:1; + /** use imul mem, imm32 instruction (slow on some cpu's */ + unsigned use_imul_mem_imm32:1; /** optimize calling convention where possible */ unsigned optimize_cc:1; /** diff --git a/ir/be/ia32/ia32_transform.c b/ir/be/ia32/ia32_transform.c index 41ae3496a..74c29cd26 100644 --- a/ir/be/ia32/ia32_transform.c +++ b/ir/be/ia32/ia32_transform.c @@ -1152,6 +1152,7 @@ static ir_node *gen_Mul(ir_node *node) { ir_node *op1 = get_Mul_left(node); ir_node *op2 = get_Mul_right(node); ir_mode *mode = get_irn_mode(node); + unsigned flags; if (mode_is_float(mode)) { if (ia32_cg_config.use_sse2) @@ -1165,9 +1166,10 @@ static ir_node *gen_Mul(ir_node *node) { /* for the lower 32bit of the result it doesn't matter whether we use * signed or unsigned multiplication so we use IMul as it has fewer * constraints */ - return gen_binop(node, op1, op2, new_rd_ia32_IMul, - match_commutative | match_am | match_mode_neutral | - match_immediate | match_am_and_immediates); + flags = match_commutative | match_am | match_mode_neutral | match_immediate; + if (ia32_cg_config.use_imul_mem_imm32) + flags |= match_am_and_immediates; + return gen_binop(node, op1, op2, new_rd_ia32_IMul, flags); } /** -- 2.20.1