From 52a818d61941174d4a7d39f37db43b1c7a7b984d Mon Sep 17 00:00:00 2001 From: Matthias Braun Date: Fri, 25 Nov 2011 00:22:34 +0100 Subject: [PATCH] add dwarf register number to register description --- ir/be/amd64/amd64_spec.pl | 66 ++++++------- ir/be/arm/arm_spec.pl | 48 ++++----- ir/be/bearch.h | 6 +- ir/be/ia32/ia32_spec.pl | 68 ++++++------- ir/be/scripts/generate_regalloc_if.pl | 7 +- ir/be/sparc/sparc_spec.pl | 134 +++++++++++++------------- 6 files changed, 168 insertions(+), 161 deletions(-) diff --git a/ir/be/amd64/amd64_spec.pl b/ir/be/amd64/amd64_spec.pl index 4280653b2..97eb6f06b 100644 --- a/ir/be/amd64/amd64_spec.pl +++ b/ir/be/amd64/amd64_spec.pl @@ -62,46 +62,46 @@ $state = 8; # register represents a state # NOTE: Last entry of each class is the largest Firm-Mode a register can hold %reg_classes = ( gp => [ - { name => "rax" }, - { name => "rcx" }, - { name => "rdx" }, - { name => "rsi" }, - { name => "rdi" }, - { name => "rbx" }, - { name => "rbp" }, - { name => "rsp", type => $ignore }, # stackpointer? - { name => "r8" }, - { name => "r9" }, - { name => "r10" }, - { name => "r11" }, - { name => "r12" }, - { name => "r13" }, - { name => "r14" }, - { name => "r15" }, + { name => "rax", dwarf => 0 }, + { name => "rcx", dwarf => 2 }, + { name => "rdx", dwarf => 1 }, + { name => "rsi", dwarf => 4 }, + { name => "rdi", dwarf => 5 }, + { name => "rbx", dwarf => 3 }, + { name => "rbp", dwarf => 6 }, + { name => "rsp", dwarf => 7, type => $ignore }, # stackpointer? + { name => "r8", dwarf => 8 }, + { name => "r9", dwarf => 9 }, + { name => "r10", dwarf => 10 }, + { name => "r11", dwarf => 11 }, + { name => "r12", dwarf => 12 }, + { name => "r13", dwarf => 13 }, + { name => "r14", dwarf => 14 }, + { name => "r15", dwarf => 15 }, # { name => "gp_NOREG", type => $ignore }, # we need a dummy register for NoReg nodes { mode => "mode_Lu" } ], # fp => [ -# { name => "xmm0" }, -# { name => "xmm1" }, -# { name => "xmm2" }, -# { name => "xmm3" }, -# { name => "xmm4" }, -# { name => "xmm5" }, -# { name => "xmm6" }, -# { name => "xmm7" }, -# { name => "xmm8" }, -# { name => "xmm9" }, -# { name => "xmm10" }, -# { name => "xmm11" }, -# { name => "xmm12" }, -# { name => "xmm13" }, -# { name => "xmm14" }, -# { name => "xmm15" }, +# { name => "xmm0", dwarf => 17 }, +# { name => "xmm1", dwarf => 18 }, +# { name => "xmm2", dwarf => 19 }, +# { name => "xmm3", dwarf => 20 }, +# { name => "xmm4", dwarf => 21 }, +# { name => "xmm5", dwarf => 22 }, +# { name => "xmm6", dwarf => 23 }, +# { name => "xmm7", dwarf => 24 }, +# { name => "xmm8", dwarf => 25 }, +# { name => "xmm9", dwarf => 26 }, +# { name => "xmm10", dwarf => 27 }, +# { name => "xmm11", dwarf => 28 }, +# { name => "xmm12", dwarf => 29 }, +# { name => "xmm13", dwarf => 30 }, +# { name => "xmm14", dwarf => 31 }, +# { name => "xmm15", dwarf => 32 }, # { mode => "mode_D" } # ] flags => [ - { name => "eflags" }, + { name => "eflags", dwarf => 49 }, { mode => "mode_Iu", flags => "manual_ra" } ], ); diff --git a/ir/be/arm/arm_spec.pl b/ir/be/arm/arm_spec.pl index 16e04d900..3b37e2392 100644 --- a/ir/be/arm/arm_spec.pl +++ b/ir/be/arm/arm_spec.pl @@ -13,33 +13,33 @@ $mode_fp = "mode_F"; # NOTE: Last entry of each class is the largest Firm-Mode a register can hold %reg_classes = ( gp => [ - { name => "r0" }, - { name => "r1" }, - { name => "r2" }, - { name => "r3" }, - { name => "r4" }, - { name => "r5" }, - { name => "r6" }, - { name => "r7" }, - { name => "r8" }, - { name => "r9" }, - { name => "r10" }, - { name => "r11" }, - { name => "r12" }, - { name => "sp" }, - { name => "lr" }, - { name => "pc" }, + { name => "r0", dwarf => 0 }, + { name => "r1", dwarf => 1 }, + { name => "r2", dwarf => 2 }, + { name => "r3", dwarf => 3 }, + { name => "r4", dwarf => 4 }, + { name => "r5", dwarf => 5 }, + { name => "r6", dwarf => 6 }, + { name => "r7", dwarf => 7 }, + { name => "r8", dwarf => 8 }, + { name => "r9", dwarf => 9 }, + { name => "r10", dwarf => 10 }, + { name => "r11", dwarf => 11 }, + { name => "r12", dwarf => 12 }, + { name => "sp", dwarf => 13 }, + { name => "lr", dwarf => 14 }, + { name => "pc", dwarf => 15 }, { mode => $mode_gp } ], fpa => [ - { name => "f0" }, - { name => "f1" }, - { name => "f2" }, - { name => "f3" }, - { name => "f4" }, - { name => "f5" }, - { name => "f6" }, - { name => "f7" }, + { name => "f0", dwarf => 96 }, + { name => "f1", dwarf => 97 }, + { name => "f2", dwarf => 98 }, + { name => "f3", dwarf => 99 }, + { name => "f4", dwarf => 100 }, + { name => "f5", dwarf => 101 }, + { name => "f6", dwarf => 102 }, + { name => "f7", dwarf => 103 }, { mode => $mode_fp } ], flags => [ diff --git a/ir/be/bearch.h b/ir/be/bearch.h index f0ed3bd78..ad1f1b323 100644 --- a/ir/be/bearch.h +++ b/ir/be/bearch.h @@ -230,11 +230,13 @@ struct arch_register_t { const arch_register_class_t *reg_class; /**< The class of the register */ unsigned short index; /**< The index of the register in the class. */ - unsigned short global_index; /** The global index this register - in the architecture. */ + unsigned short global_index; /**< The global index this + register in the architecture. */ arch_register_type_t type; /**< The type of the register. */ /** register constraint allowing just this register */ const arch_register_req_t *single_req; + /** register number in dwarf debugging format */ + unsigned short dwarf_number; }; static inline const arch_register_class_t *arch_register_get_class( diff --git a/ir/be/ia32/ia32_spec.pl b/ir/be/ia32/ia32_spec.pl index ac32a75c9..ee1559c67 100644 --- a/ir/be/ia32/ia32_spec.pl +++ b/ir/be/ia32/ia32_spec.pl @@ -18,37 +18,37 @@ $state = 8; # register represents a state # NOTE: Last entry of each class is the largest Firm-Mode a register can hold %reg_classes = ( gp => [ - { name => "edx" }, - { name => "ecx" }, - { name => "eax" }, - { name => "ebx" }, - { name => "esi" }, - { name => "edi" }, - { name => "ebp" }, - { name => "esp", type => $ignore }, + { name => "edx", dwarf => 2 }, + { name => "ecx", dwarf => 1 }, + { name => "eax", dwarf => 0 }, + { name => "ebx", dwarf => 3 }, + { name => "esi", dwarf => 6 }, + { name => "edi", dwarf => 7 }, + { name => "ebp", dwarf => 5 }, + { name => "esp", dwarf => 4, type => $ignore }, { name => "gp_NOREG", type => $ignore | $arbitrary | $virtual }, # we need a dummy register for NoReg nodes { mode => $mode_gp } ], mmx => [ - { name => "mm0", type => $ignore }, - { name => "mm1", type => $ignore }, - { name => "mm2", type => $ignore }, - { name => "mm3", type => $ignore }, - { name => "mm4", type => $ignore }, - { name => "mm5", type => $ignore }, - { name => "mm6", type => $ignore }, - { name => "mm7", type => $ignore }, + { name => "mm0", dwarf => 29, type => $ignore }, + { name => "mm1", dwarf => 30, type => $ignore }, + { name => "mm2", dwarf => 31, type => $ignore }, + { name => "mm3", dwarf => 32, type => $ignore }, + { name => "mm4", dwarf => 33, type => $ignore }, + { name => "mm5", dwarf => 34, type => $ignore }, + { name => "mm6", dwarf => 35, type => $ignore }, + { name => "mm7", dwarf => 36, type => $ignore }, { mode => $mode_mmx, flags => "manual_ra" } ], xmm => [ - { name => "xmm0" }, - { name => "xmm1" }, - { name => "xmm2" }, - { name => "xmm3" }, - { name => "xmm4" }, - { name => "xmm5" }, - { name => "xmm6" }, - { name => "xmm7" }, + { name => "xmm0", dwarf => 21 }, + { name => "xmm1", dwarf => 22 }, + { name => "xmm2", dwarf => 23 }, + { name => "xmm3", dwarf => 24 }, + { name => "xmm4", dwarf => 25 }, + { name => "xmm5", dwarf => 26 }, + { name => "xmm6", dwarf => 27 }, + { name => "xmm7", dwarf => 28 }, { name => "xmm_NOREG", type => $ignore | $virtual }, # we need a dummy register for NoReg nodes { mode => $mode_xmm } ], @@ -65,22 +65,22 @@ $state = 8; # register represents a state { mode => $mode_fp87 } ], st => [ - { name => "st0", realname => "st", type => $ignore }, - { name => "st1", realname => "st(1)", type => $ignore }, - { name => "st2", realname => "st(2)", type => $ignore }, - { name => "st3", realname => "st(3)", type => $ignore }, - { name => "st4", realname => "st(4)", type => $ignore }, - { name => "st5", realname => "st(5)", type => $ignore }, - { name => "st6", realname => "st(6)", type => $ignore }, - { name => "st7", realname => "st(7)", type => $ignore }, + { name => "st0", realname => "st", dwarf => 11, type => $ignore }, + { name => "st1", realname => "st(1)", dwarf => 12, type => $ignore }, + { name => "st2", realname => "st(2)", dwarf => 13, type => $ignore }, + { name => "st3", realname => "st(3)", dwarf => 14, type => $ignore }, + { name => "st4", realname => "st(4)", dwarf => 15, type => $ignore }, + { name => "st5", realname => "st(5)", dwarf => 16, type => $ignore }, + { name => "st6", realname => "st(6)", dwarf => 17, type => $ignore }, + { name => "st7", realname => "st(7)", dwarf => 18, type => $ignore }, { mode => $mode_fp87, flags => "manual_ra" } ], fp_cw => [ # the floating point control word - { name => "fpcw", type => $ignore | $state }, + { name => "fpcw", dwarf => 37, type => $ignore | $state }, { mode => $mode_fpcw, flags => "manual_ra|state" } ], flags => [ - { name => "eflags", type => 0 }, + { name => "eflags", dwarf => 9, type => 0 }, { mode => "mode_Iu", flags => "manual_ra" } ], ); # %reg_classes diff --git a/ir/be/scripts/generate_regalloc_if.pl b/ir/be/scripts/generate_regalloc_if.pl index 981c4f2d9..f892e3d23 100755 --- a/ir/be/scripts/generate_regalloc_if.pl +++ b/ir/be/scripts/generate_regalloc_if.pl @@ -206,6 +206,10 @@ EOF $regdef .= "\tREG_${ucname},\n"; $regdef2 .= "\tREG_${classuc}_${ucname} = $idx,\n"; + my $dwarf_number = 0; + if (defined($_->{dwarf})) { + $dwarf_number = $_->{dwarf}; + } $regtypes_def .= < [ - { name => "g0" }, - { name => "g1" }, - { name => "g2" }, - { name => "g3" }, - { name => "g4" }, - { name => "g5" }, - { name => "g6" }, - { name => "g7" }, - - { name => "o0" }, - { name => "o1" }, - { name => "o2" }, - { name => "o3" }, - { name => "o4" }, - { name => "o5" }, - { name => "sp" }, - { name => "o7" }, - - { name => "l0" }, - { name => "l1" }, - { name => "l2" }, - { name => "l3" }, - { name => "l4" }, - { name => "l5" }, - { name => "l6" }, - { name => "l7" }, - - { name => "i0" }, - { name => "i1" }, - { name => "i2" }, - { name => "i3" }, - { name => "i4" }, - { name => "i5" }, - { name => "frame_pointer", realname => "fp" }, - { name => "i7" }, + { name => "g0", dwarf => 0 }, + { name => "g1", dwarf => 1 }, + { name => "g2", dwarf => 2 }, + { name => "g3", dwarf => 3 }, + { name => "g4", dwarf => 4 }, + { name => "g5", dwarf => 5 }, + { name => "g6", dwarf => 6 }, + { name => "g7", dwarf => 7 }, + + { name => "o0", dwarf => 8 }, + { name => "o1", dwarf => 9 }, + { name => "o2", dwarf => 10 }, + { name => "o3", dwarf => 11 }, + { name => "o4", dwarf => 12 }, + { name => "o5", dwarf => 13 }, + { name => "sp", dwarf => 14 }, + { name => "o7", dwarf => 15 }, + + { name => "l0", dwarf => 16 }, + { name => "l1", dwarf => 17 }, + { name => "l2", dwarf => 18 }, + { name => "l3", dwarf => 19 }, + { name => "l4", dwarf => 20 }, + { name => "l5", dwarf => 21 }, + { name => "l6", dwarf => 22 }, + { name => "l7", dwarf => 23 }, + + { name => "i0", dwarf => 24 }, + { name => "i1", dwarf => 25 }, + { name => "i2", dwarf => 26 }, + { name => "i3", dwarf => 27 }, + { name => "i4", dwarf => 28 }, + { name => "i5", dwarf => 29 }, + { name => "frame_pointer", dwarf => 30, realname => "fp" }, + { name => "i7", dwarf => 30 }, { mode => $mode_gp } ], fpflags_class => [ @@ -63,38 +63,38 @@ $mode_fp4 = "mode_Q"; ], # fp registers can be accessed any time fp => [ - { name => "f0" }, - { name => "f1" }, - { name => "f2" }, - { name => "f3" }, - { name => "f4" }, - { name => "f5" }, - { name => "f6" }, - { name => "f7" }, - { name => "f8" }, - { name => "f9" }, - { name => "f10" }, - { name => "f11" }, - { name => "f12" }, - { name => "f13" }, - { name => "f14" }, - { name => "f15" }, - { name => "f16" }, - { name => "f17" }, - { name => "f18" }, - { name => "f19" }, - { name => "f20" }, - { name => "f21" }, - { name => "f22" }, - { name => "f23" }, - { name => "f24" }, - { name => "f25" }, - { name => "f26" }, - { name => "f27" }, - { name => "f28" }, - { name => "f29" }, - { name => "f30" }, - { name => "f31" }, + { name => "f0", dwarf => 32 }, + { name => "f1", dwarf => 33 }, + { name => "f2", dwarf => 34 }, + { name => "f3", dwarf => 35 }, + { name => "f4", dwarf => 36 }, + { name => "f5", dwarf => 37 }, + { name => "f6", dwarf => 38 }, + { name => "f7", dwarf => 39 }, + { name => "f8", dwarf => 40 }, + { name => "f9", dwarf => 41 }, + { name => "f10", dwarf => 42 }, + { name => "f11", dwarf => 43 }, + { name => "f12", dwarf => 44 }, + { name => "f13", dwarf => 45 }, + { name => "f14", dwarf => 46 }, + { name => "f15", dwarf => 47 }, + { name => "f16", dwarf => 48 }, + { name => "f17", dwarf => 49 }, + { name => "f18", dwarf => 50 }, + { name => "f19", dwarf => 51 }, + { name => "f20", dwarf => 52 }, + { name => "f21", dwarf => 53 }, + { name => "f22", dwarf => 54 }, + { name => "f23", dwarf => 55 }, + { name => "f24", dwarf => 56 }, + { name => "f25", dwarf => 57 }, + { name => "f26", dwarf => 58 }, + { name => "f27", dwarf => 59 }, + { name => "f28", dwarf => 60 }, + { name => "f29", dwarf => 61 }, + { name => "f30", dwarf => 62 }, + { name => "f31", dwarf => 63 }, { mode => $mode_fp } ] ); # %reg_classes -- 2.20.1