From 4c65cfb22fb2cb2fe9a391dbaa79a41800917c90 Mon Sep 17 00:00:00 2001 From: Matthias Braun Date: Wed, 8 Aug 2007 13:28:37 +0000 Subject: [PATCH] - Fix unsigned->double, double->unsigned convs - Support Syncs in spillslot coalescer [r15499] --- ir/be/bespillslots.c | 134 ++++++++++++++++++++++++++++++++--- ir/be/ia32/bearch_ia32.c | 15 ++-- ir/be/ia32/ia32_nodes_attr.h | 1 + ir/be/ia32/ia32_spec.pl | 25 ++++--- ir/be/ia32/ia32_transform.c | 55 ++++++++++++-- ir/be/test/fehler65.c | 2 +- 6 files changed, 201 insertions(+), 31 deletions(-) diff --git a/ir/be/bespillslots.c b/ir/be/bespillslots.c index 6ec5fcd84..5377a2525 100644 --- a/ir/be/bespillslots.c +++ b/ir/be/bespillslots.c @@ -145,13 +145,13 @@ static spill_t *collect_spill(be_fec_env_t *env, ir_node *node, /* insert into set of spills if not already there */ spill.spill = node; - res = set_find(env->spills, &spill, sizeof(spill), hash); + res = set_find(env->spills, &spill, sizeof(spill), hash); if(res == NULL) { spill.spillslot = set_count(env->spills); - spill.mode = mode; + spill.mode = mode; spill.alignment = align; - res = set_insert(env->spills, &spill, sizeof(spill), hash); + res = set_insert(env->spills, &spill, sizeof(spill), hash); } else { assert(res->mode == mode); assert(res->alignment == align); @@ -179,9 +179,9 @@ static spill_t *collect_memphi(be_fec_env_t *env, ir_node *node, } spill.spillslot = set_count(env->spills); - spill.mode = mode; + spill.mode = mode; spill.alignment = align; - res = set_insert(env->spills, &spill, sizeof(spill), hash); + res = set_insert(env->spills, &spill, sizeof(spill), hash); // collect attached spills and mem-phis arity = get_irn_arity(node); @@ -197,10 +197,10 @@ static spill_t *collect_memphi(be_fec_env_t *env, ir_node *node, } // add an affinity edge - affinty_edge = obstack_alloc(&env->obst, sizeof(affinty_edge[0])); + affinty_edge = obstack_alloc(&env->obst, sizeof(affinty_edge[0])); affinty_edge->affinity = get_block_execfreq(exec_freq, get_nodes_block(arg)); - affinty_edge->slot1 = res->spillslot; - affinty_edge->slot2 = arg_spill->spillslot; + affinty_edge->slot1 = res->spillslot; + affinty_edge->slot2 = arg_spill->spillslot; ARR_APP1(affinity_edge_t*, env->affinity_edges, affinty_edge); } @@ -261,6 +261,98 @@ static int merge_interferences(be_fec_env_t *env, bitset_t** interferences, return res; } +static int my_values_interfere2(be_irg_t *birg, const ir_node *a, + const ir_node *b) +{ + be_lv_t *lv = be_get_birg_liveness(birg); + + int a2b = _value_dominates(a, b); + int b2a = _value_dominates(b, a); + + /* If there is no dominance relation, they do not interfere. */ + if((a2b | b2a) > 0) { + const ir_edge_t *edge; + ir_node *bb; + + /* + * Adjust a and b so, that a dominates b if + * a dominates b or vice versa. + */ + if(b2a) { + const ir_node *t = a; + a = b; + b = t; + } + + bb = get_nodes_block(b); + + /* + * If a is live end in b's block it is + * live at b's definition (a dominates b) + */ + if(be_is_live_end(lv, bb, a)) + return 1; + + /* + * Look at all usages of a. + * If there's one usage of a in the block of b, then + * we check, if this use is dominated by b, if that's true + * a and b interfere. Note that b must strictly dominate the user, + * since if b is the last user of in the block, b and a do not + * interfere. + * Uses of a not in b's block can be disobeyed, because the + * check for a being live at the end of b's block is already + * performed. + */ + foreach_out_edge(a, edge) { + const ir_node *user = get_edge_src_irn(edge); + if(is_Sync(user)) { + const ir_edge_t *edge2; + foreach_out_edge(user, edge2) { + const ir_node *user2 = get_edge_src_irn(edge2); + assert(!is_Sync(user2)); + if(get_nodes_block(user2) == bb && !is_Phi(user2) && + _value_strictly_dominates(b, user2)) + return 1; + } + } else { + if(get_nodes_block(user) == bb && !is_Phi(user) && + _value_strictly_dominates(b, user)) + return 1; + } + } + } + + return 0; +} + +/** + * same as values_interfere but with special handling for Syncs + */ +static int my_values_interfere(be_irg_t *birg, ir_node *a, ir_node *b) +{ + if(is_Sync(a)) { + int i, arity = get_irn_arity(a); + for(i = 0; i < arity; ++i) { + ir_node *in = get_irn_n(a, i); + if(my_values_interfere(birg, in, b)) + return 1; + } + return 0; + } else if(is_Sync(b)) { + int i, arity = get_irn_arity(b); + for(i = 0; i < arity; ++i) { + ir_node *in = get_irn_n(b, i); + /* a is not a sync, so no need for my_values_interfere */ + if(my_values_interfere2(birg, a, in)) + return 1; + } + return 0; + } + + return my_values_interfere2(birg, a, b); +} + /** * A greedy coalescing algorithm for spillslots: * 1. Sort the list of affinity edges @@ -315,7 +407,7 @@ static void do_greedy_coalescing(be_fec_env_t *env) if (is_NoMem(spill2)) continue; - if (values_interfere(env->birg, spill1, spill2)) { + if (my_values_interfere(env->birg, spill1, spill2)) { DBG((dbg, DBG_INTERFERENCES, "Slot %d and %d interfere\n", i, i2)); bitset_set(interferences[i], i2); bitset_set(interferences[i2], i); @@ -477,6 +569,27 @@ static void enlarge_spillslot(spill_slot_t *slot, int otheralign, int othersize) } } + +static void assign_spill_entity(const arch_env_t *arch_env, ir_node *node, ir_entity *entity) +{ + if(is_NoMem(node)) + return; + if(is_Sync(node)) { + int i, arity; + + arity = get_irn_arity(node); + for(i = 0; i < arity; ++i) { + ir_node *in = get_irn_n(node, i); + assert(!is_Phi(in)); + + assign_spill_entity(arch_env, in, entity); + } + return; + } + + arch_set_frame_entity(arch_env, node, entity); +} + /** * Create stack entities for the spillslots and assign them to the spill and * reload nodes. @@ -558,8 +671,7 @@ static void assign_spillslots(be_fec_env_t *env) } } } else { - if(!is_NoMem(node)) - arch_set_frame_entity(arch_env, node, slot->entity); + assign_spill_entity(arch_env, node, slot->entity); } } diff --git a/ir/be/ia32/bearch_ia32.c b/ir/be/ia32/bearch_ia32.c index d7d312bc6..bbfe95c85 100644 --- a/ir/be/ia32/bearch_ia32.c +++ b/ir/be/ia32/bearch_ia32.c @@ -1257,8 +1257,13 @@ static void ia32_collect_frame_entity_nodes(ir_node *node, void *data) } else if(is_ia32_irn(node) && get_ia32_frame_ent(node) == NULL && is_ia32_use_frame(node)) { if (is_ia32_need_stackent(node) || is_ia32_Load(node)) { - const ir_mode *mode = get_ia32_ls_mode(node); - int align = get_mode_size_bytes(mode); + const ir_mode *mode = get_ia32_ls_mode(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); + int align = get_mode_size_bytes(mode); + + if(attr->data.need_64bit_stackent) { + mode = mode_Ls; + } be_node_needs_frame_entity(env, node, mode, align); } else if (is_ia32_vfild(node) || is_ia32_xLoad(node) || is_ia32_vfld(node)) { @@ -1417,8 +1422,8 @@ static void *ia32_cg_init(be_irg_t *birg) { * Set output modes for GCC */ static const tarval_mode_info mo_integer = { - TVO_DECIMAL, - NULL, + TVO_HEX, + "0x", NULL, }; @@ -1872,6 +1877,7 @@ static int ia32_is_psi_allowed(ir_node *sel, ir_node *phi_list, int i, int j) (void)i; (void)j; +#if 1 if(is_Proj(sel)) { ir_node *pred = get_Proj_pred(sel); if(is_Cmp(pred)) { @@ -1881,6 +1887,7 @@ static int ia32_is_psi_allowed(ir_node *sel, ir_node *phi_list, int i, int j) return 0; } } +#endif /* check the Phi nodes */ for (phi = phi_list; phi; phi = get_irn_link(phi)) { diff --git a/ir/be/ia32/ia32_nodes_attr.h b/ir/be/ia32/ia32_nodes_attr.h index 485fd7788..008ab3942 100644 --- a/ir/be/ia32/ia32_nodes_attr.h +++ b/ir/be/ia32/ia32_nodes_attr.h @@ -128,6 +128,7 @@ struct ia32_attr_t { unsigned got_lea:1; /**< Indicates whether or not this node already consumed a LEA. */ unsigned need_stackent:1; /**< Set to 1 if node need space on stack. */ + unsigned need_64bit_stackent:1; /**< needs a 64bit stack entity (see double->unsigned int conv) */ } data; int *out_flags; /**< flags for each produced value */ diff --git a/ir/be/ia32/ia32_spec.pl b/ir/be/ia32/ia32_spec.pl index f3466af02..4bb72aaea 100644 --- a/ir/be/ia32/ia32_spec.pl +++ b/ir/be/ia32/ia32_spec.pl @@ -1354,8 +1354,10 @@ CmpCMov => { TestCMov => { irn_flags => "R", - reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], out => [ "in_r7" ] }, - ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", "val_false" ], + reg_req => { in => [ "gp", "gp", "gp", "gp", "none", "gp", "gp" ], + out => [ "in_r7" ] }, + ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", + "val_false" ], attr => "pn_Cmp pn_code", init_attr => "attr->pn_code = pn_code;", latency => 2, @@ -1373,16 +1375,20 @@ xCmpCMov => { vfCmpCMov => { irn_flags => "R", - reg_req => { in => [ "vfp", "vfp", "gp", "gp" ], out => [ "in_r4" ] }, + reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none", "gp", "gp" ], + out => [ "in_r7" ] }, + ins => [ "base", "index", "cmp_left", "cmp_right", "mem", "val_true", + "val_false" ], latency => 10, - units => [ "VFP" ], + units => [ "VFP", "GP" ], mode => $mode_gp, attr_type => "ia32_x87_attr_t", }, CmpSet => { irn_flags => "R", - reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "eax ebx ecx edx" ] }, + reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], + out => [ "eax ebx ecx edx" ] }, ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ], attr => "pn_Cmp pn_code", init_attr => "attr->pn_code = pn_code;", @@ -1393,7 +1399,8 @@ CmpSet => { TestSet => { irn_flags => "R", - reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "eax ebx ecx edx" ] }, + reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], + out => [ "eax ebx ecx edx" ] }, ins => [ "base", "index", "cmp_left", "cmp_right", "mem" ], attr => "pn_Cmp pn_code", init_attr => "attr->pn_code = pn_code;", @@ -1870,7 +1877,7 @@ fild => { op_flags => "R", rd_constructor => "NONE", reg_req => { }, - emit => '. fild%XM %AM', + emit => '. fild%M %AM', attr_type => "ia32_x87_attr_t", }, @@ -1879,7 +1886,7 @@ fist => { state => "exc_pinned", rd_constructor => "NONE", reg_req => { }, - emit => '. fist%XM %AM', + emit => '. fist%M %AM', mode => "mode_M", attr_type => "ia32_x87_attr_t", }, @@ -1889,7 +1896,7 @@ fistp => { state => "exc_pinned", rd_constructor => "NONE", reg_req => { }, - emit => '. fistp%XM %AM', + emit => '. fistp%M %AM', mode => "mode_M", attr_type => "ia32_x87_attr_t", }, diff --git a/ir/be/ia32/ia32_transform.c b/ir/be/ia32/ia32_transform.c index 0737e9e87..9e1288e0c 100644 --- a/ir/be/ia32/ia32_transform.c +++ b/ir/be/ia32/ia32_transform.c @@ -19,7 +19,8 @@ /** * @file - * @brief This file implements the IR transformation from firm into ia32-Firm. + * @brief This file implements the IR transformation from firm into + * ia32-Firm. * @author Christian Wuerdig, Matthias Braun * @version $Id$ */ @@ -2064,6 +2065,7 @@ static ir_node *gen_Psi(ir_node *node) { assert(get_Psi_n_conds(node) == 1); assert(get_irn_mode(cond) == mode_b); + assert(mode_needs_gp_reg(get_irn_mode(node))); if(!is_Proj(cond) || !is_Cmp(get_Proj_pred(cond))) { /* a mode_b value, we have to compare it against 0 */ @@ -2140,6 +2142,7 @@ static ir_node *gen_x87_fp_to_gp(ir_node *node) { dbg_info *dbgi = get_irn_dbg_info(node); ir_node *noreg = ia32_new_NoReg_gp(cg); ir_node *trunc_mode = ia32_new_Fpu_truncate(cg); + ir_mode *mode = get_irn_mode(node); ir_node *fist, *load; /* do a fist */ @@ -2150,7 +2153,15 @@ static ir_node *gen_x87_fp_to_gp(ir_node *node) { set_ia32_use_frame(fist); set_ia32_op_type(fist, ia32_AddrModeD); set_ia32_am_flavour(fist, ia32_am_B); - set_ia32_ls_mode(fist, mode_Iu); + + assert(get_mode_size_bits(mode) <= 32); + /* exception we can only store signed 32 bit integers, so for unsigned + we store a 64bit (signed) integer and load the lower bits */ + if(get_mode_size_bits(mode) == 32 && !mode_is_signed(mode)) { + set_ia32_ls_mode(fist, mode_Ls); + } else { + set_ia32_ls_mode(fist, mode_Is); + } SET_IA32_ORIG_NODE(fist, ia32_get_old_node_name(cg, node)); /* do a Load */ @@ -2160,7 +2171,7 @@ static ir_node *gen_x87_fp_to_gp(ir_node *node) { set_ia32_use_frame(load); set_ia32_op_type(load, ia32_AddrModeS); set_ia32_am_flavour(load, ia32_am_B); - set_ia32_ls_mode(load, mode_Iu); + set_ia32_ls_mode(load, mode_Is); SET_IA32_ORIG_NODE(load, ia32_get_old_node_name(cg, node)); return new_r_Proj(irg, block, load, mode_Iu, pn_ia32_Load_res); @@ -2206,22 +2217,29 @@ static ir_node *gen_x87_gp_to_fp(ir_node *node, ir_mode *src_mode) { dbg_info *dbgi = get_irn_dbg_info(node); ir_node *noreg = ia32_new_NoReg_gp(env_cg); ir_node *nomem = new_NoMem(); + ir_mode *mode = get_irn_mode(op); + ir_mode *store_mode; ir_node *fild, *store; ir_node *res; int src_bits; - /* first convert to 32 bit if necessary */ + /* first convert to 32 bit signed if necessary */ src_bits = get_mode_size_bits(src_mode); if (src_bits == 8) { - new_op = new_rd_ia32_Conv_I2I8Bit(dbgi, irg, block, noreg, noreg, new_op, nomem, src_mode); + new_op = new_rd_ia32_Conv_I2I8Bit(dbgi, irg, block, noreg, noreg, new_op, nomem, + src_mode); set_ia32_am_support(new_op, ia32_am_Source, ia32_am_unary); SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env_cg, node)); + mode = mode_Is; } else if (src_bits < 32) { new_op = new_rd_ia32_Conv_I2I(dbgi, irg, block, noreg, noreg, new_op, nomem, src_mode); set_ia32_am_support(new_op, ia32_am_Source, ia32_am_unary); SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env_cg, node)); + mode = mode_Is; } + assert(get_mode_size_bits(mode) == 32); + /* do a store */ store = new_rd_ia32_Store(dbgi, irg, block, get_irg_frame(irg), noreg, new_op, nomem); @@ -2230,13 +2248,38 @@ static ir_node *gen_x87_gp_to_fp(ir_node *node, ir_mode *src_mode) { set_ia32_am_flavour(store, ia32_am_OB); set_ia32_ls_mode(store, mode_Iu); + /* exception for 32bit unsigned, do a 64bit spill+load */ + if(!mode_is_signed(mode)) { + ir_node *in[2]; + /* store a zero */ + ir_node *zero_const = new_rd_ia32_Immediate(dbgi, irg, block, NULL, 0, 0); + + ir_node *zero_store = new_rd_ia32_Store(dbgi, irg, block, get_irg_frame(irg), noreg, + zero_const, nomem); + + arch_set_irn_register(env_cg->arch_env, zero_const, &ia32_gp_regs[REG_GP_NOREG]); + + set_ia32_use_frame(zero_store); + set_ia32_op_type(zero_store, ia32_AddrModeD); + add_ia32_am_offs_int(zero_store, 4); + set_ia32_ls_mode(zero_store, mode_Iu); + + in[0] = zero_store; + in[1] = store; + + store = new_rd_Sync(dbgi, irg, block, 2, in); + store_mode = mode_Ls; + } else { + store_mode = mode_Is; + } + /* do a fild */ fild = new_rd_ia32_vfild(dbgi, irg, block, get_irg_frame(irg), noreg, store); set_ia32_use_frame(fild); set_ia32_op_type(fild, ia32_AddrModeS); set_ia32_am_flavour(fild, ia32_am_OB); - set_ia32_ls_mode(fild, mode_Iu); + set_ia32_ls_mode(fild, store_mode); res = new_r_Proj(irg, block, fild, mode_vfp, pn_ia32_vfild_res); diff --git a/ir/be/test/fehler65.c b/ir/be/test/fehler65.c index f5d7d4b7a..36ae7f195 100644 --- a/ir/be/test/fehler65.c +++ b/ir/be/test/fehler65.c @@ -2,7 +2,7 @@ int randn = -1271796327; double value = 4294967295; int main(void) { - float res = (double) (randn % (unsigned int) value); + double res = (double) (randn % (unsigned int) value); printf("Res: %f\n", res); return 0; } -- 2.20.1