From 493edb72be97161f5c8762e4589631a6e7083a29 Mon Sep 17 00:00:00 2001 From: Matthias Braun Date: Mon, 17 Dec 2012 15:57:38 +0100 Subject: [PATCH] fix a few -pedantic warnings --- ir/ana/irlivechk.c | 4 ++-- ir/be/arm/bearch_arm_t.h | 14 +++++++------- ir/be/becopyheur.c | 4 ++-- ir/debug/debugger.c | 4 ++-- ir/ir/irtypes.h | 8 ++++---- ir/lpp/lpp_cplex.c | 12 +++++++++++- ir/lpp/lpp_cplex.h | 2 -- ir/lpp/lpp_gurobi.c | 12 ++++++++++-- ir/lpp/lpp_gurobi.h | 2 -- 9 files changed, 38 insertions(+), 24 deletions(-) diff --git a/ir/ana/irlivechk.c b/ir/ana/irlivechk.c index 11a28acb5..8181ae954 100644 --- a/ir/ana/irlivechk.c +++ b/ir/ana/irlivechk.c @@ -49,8 +49,8 @@ typedef struct bl_info_t { const ir_node *block; /**< The block. */ - int be_tgt_calc : 1; - int id : 31; /**< a tight number for the block. + unsigned be_tgt_calc : 1; + unsigned id : 31; /**< a tight number for the block. we're just reusing the pre num from the DFS. */ bitset_t *red_reachable; /**< Holds all id's if blocks reachable diff --git a/ir/be/arm/bearch_arm_t.h b/ir/be/arm/bearch_arm_t.h index 174829c8c..59dc29a74 100644 --- a/ir/be/arm/bearch_arm_t.h +++ b/ir/be/arm/bearch_arm_t.h @@ -73,12 +73,12 @@ enum arm_architectures { /** Floating point instruction set. */ enum arm_fp_architectures { - ARM_FPU_FPA_EXT_V1 = 0x80000000, /**< Base FPA instruction set. */ - ARM_FPU_FPA_EXT_V2 = 0x40000000, /**< LFM/SFM. */ - ARM_FPU_VFP_EXT_NONE = 0x20000000, /**< Use VFP word-ordering. */ - ARM_FPU_VFP_EXT_V1xD = 0x10000000, /**< Base VFP instruction set. */ - ARM_FPU_VFP_EXT_V1 = 0x08000000, /**< Double-precision insns. */ - ARM_FPU_VFP_EXT_V2 = 0x04000000, /**< ARM10E VFPr1. */ + ARM_FPU_FPA_EXT_V1 = 0x40000000, /**< Base FPA instruction set. */ + ARM_FPU_FPA_EXT_V2 = 0x20000000, /**< LFM/SFM. */ + ARM_FPU_VFP_EXT_NONE = 0x10000000, /**< Use VFP word-ordering. */ + ARM_FPU_VFP_EXT_V1xD = 0x08000000, /**< Base VFP instruction set. */ + ARM_FPU_VFP_EXT_V1 = 0x04000000, /**< Double-precision insns. */ + ARM_FPU_VFP_EXT_V2 = 0x02000000, /**< ARM10E VFPr1. */ ARM_FPU_SOFTFLOAT = 0x01000000, /**< soft float library */ ARM_FPU_NONE = 0, @@ -93,7 +93,7 @@ enum arm_fp_architectures { ARM_FPU_ARCH_SOFTFLOAT = ARM_FPU_SOFTFLOAT, - ARM_FPU_MASK = 0xff000000, + ARM_FPU_MASK = 0x7f000000, }; /** Returns non-zero if FPA instructions should be issued. */ diff --git a/ir/be/becopyheur.c b/ir/be/becopyheur.c index 53ea6e883..f104938b5 100644 --- a/ir/be/becopyheur.c +++ b/ir/be/becopyheur.c @@ -57,8 +57,8 @@ typedef struct conflict_t { */ typedef struct node_stat_t { ir_node *irn; - int new_color; - int pinned_local :1; + int new_color; + unsigned pinned_local :1; } node_stat_t; /** diff --git a/ir/debug/debugger.c b/ir/debug/debugger.c index aeed330cb..80e1d86e3 100644 --- a/ir/debug/debugger.c +++ b/ir/debug/debugger.c @@ -807,7 +807,7 @@ static void show_by_name(type_or_ent tore, void *env) printf("%s", get_id_str(id)); } if (irg) - printf("[%ld] (%p)\n", get_irg_graph_nr(irg), irg); + printf("[%ld] (%p)\n", get_irg_graph_nr(irg), (void*)irg); else printf(" NULL\n"); } @@ -836,7 +836,7 @@ static void show_by_ldname(type_or_ent tore, void *env) printf("%s", get_id_str(id)); } if (irg) - printf("[%ld] (%p)\n", get_irg_graph_nr(irg), irg); + printf("[%ld] (%p)\n", get_irg_graph_nr(irg), (void*)irg); else printf(" NULL\n"); } diff --git a/ir/ir/irtypes.h b/ir/ir/irtypes.h index ce89755b3..c87843b43 100644 --- a/ir/ir/irtypes.h +++ b/ir/ir/irtypes.h @@ -265,16 +265,16 @@ typedef struct io_attr { /** Load attributes. */ typedef struct load_attr { except_attr exc; /**< The exception attribute. MUST be the first one. */ - ir_volatility volatility:1; /**< The volatility of this Load operation. */ - ir_align unaligned:1; /**< The align attribute of this Load operation. */ + __extension__ ir_volatility volatility:1; /**< The volatility of this Load operation. */ + __extension__ ir_align unaligned:1; /**< The align attribute of this Load operation. */ ir_mode *mode; /**< The mode of this Load operation. */ } load_attr; /** Store attributes. */ typedef struct store_attr { except_attr exc; /**< the exception attribute. MUST be the first one. */ - ir_volatility volatility:1; /**< The volatility of this Store operation. */ - ir_align unaligned:1; /**< The align attribute of this Store operation. */ + __extension__ ir_volatility volatility:1; /**< The volatility of this Store operation. */ + __extension__ ir_align unaligned:1; /**< The align attribute of this Store operation. */ } store_attr; typedef struct phi_attr { diff --git a/ir/lpp/lpp_cplex.c b/ir/lpp/lpp_cplex.c index 88187f1d4..636645e2b 100644 --- a/ir/lpp/lpp_cplex.c +++ b/ir/lpp/lpp_cplex.c @@ -9,8 +9,10 @@ */ #include "config.h" -#ifdef WITH_CPLEX #include "lpp_cplex.h" +#include "error.h" + +#ifdef WITH_CPLEX #include #include @@ -262,4 +264,12 @@ void lpp_solve_cplex(lpp_t *lpp) free_cpx(cpx); } +#else + +void lpp_solve_cplex(lpp_t *lpp) +{ + (void)lpp; + panic("libfirm compiled without cplex support"); +} + #endif diff --git a/ir/lpp/lpp_cplex.h b/ir/lpp/lpp_cplex.h index 40b741280..757737312 100644 --- a/ir/lpp/lpp_cplex.h +++ b/ir/lpp/lpp_cplex.h @@ -12,8 +12,6 @@ #include "lpp.h" -#ifdef WITH_CPLEX void lpp_solve_cplex(lpp_t *lpp); -#endif #endif diff --git a/ir/lpp/lpp_gurobi.c b/ir/lpp/lpp_gurobi.c index b363778f1..5f882dd35 100644 --- a/ir/lpp/lpp_gurobi.c +++ b/ir/lpp/lpp_gurobi.c @@ -9,8 +9,10 @@ */ #include "config.h" -#ifdef WITH_GUROBI #include "lpp_gurobi.h" +#include "error.h" + +#ifdef WITH_GUROBI #include #include @@ -20,7 +22,6 @@ #include -#include "error.h" #include "sp_matrix.h" static char gurobi_cst_encoding[4] = { 0, GRB_EQUAL, GRB_LESS_EQUAL, GRB_GREATER_EQUAL }; @@ -225,4 +226,11 @@ void lpp_solve_gurobi(lpp_t *lpp) free_gurobi(grb); } +#else + +void lpp_solve_gurobi(lpp_t *lpp) +{ + (void)lpp; +} + #endif diff --git a/ir/lpp/lpp_gurobi.h b/ir/lpp/lpp_gurobi.h index 1e79ffd1a..e7bc9f41f 100644 --- a/ir/lpp/lpp_gurobi.h +++ b/ir/lpp/lpp_gurobi.h @@ -12,8 +12,6 @@ #include "lpp.h" -#ifdef WITH_GUROBI void lpp_solve_gurobi(lpp_t *lpp); -#endif #endif -- 2.20.1