From 48ac0577bda9e3ddc1ade435137b12e81a929bb6 Mon Sep 17 00:00:00 2001 From: Michael Beck Date: Wed, 5 Sep 2007 13:42:00 +0000 Subject: [PATCH] changed parameters for new MulC [r15674] --- ir/be/TEMPLATE/bearch_TEMPLATE.c | 10 -- ir/be/arm/bearch_arm.c | 13 +-- ir/be/ia32/bearch_ia32.c | 176 ++++++++++++++++++++++++++++++- ir/be/mips/bearch_mips.c | 11 +- ir/be/ppc32/bearch_ppc32.c | 9 -- 5 files changed, 181 insertions(+), 38 deletions(-) diff --git a/ir/be/TEMPLATE/bearch_TEMPLATE.c b/ir/be/TEMPLATE/bearch_TEMPLATE.c index 3302c23f5..417c44e17 100644 --- a/ir/be/TEMPLATE/bearch_TEMPLATE.c +++ b/ir/be/TEMPLATE/bearch_TEMPLATE.c @@ -661,14 +661,6 @@ static int TEMPLATE_get_reg_class_alignment(const void *self, * Returns the libFirm configuration parameter for this backend. */ static const backend_params *TEMPLATE_get_backend_params(void) { - static ir_settings_arch_dep_t ad = { - 1, /* allow subs */ - 0, /* Muls are fast enough on Firm */ - 31, /* shift would be ok */ - 0, /* no Mulhs */ - 0, /* no Mulhu */ - 0, /* no Mulh */ - }; static backend_params p = { 0, /* no dword lowering */ 0, /* no inline assembly */ @@ -678,8 +670,6 @@ static const backend_params *TEMPLATE_get_backend_params(void) { NULL, /* context for create_intrinsic_fkt */ NULL, /* parameter for if conversion */ }; - - p.dep_param = &ad; return &p; } diff --git a/ir/be/arm/bearch_arm.c b/ir/be/arm/bearch_arm.c index f69fd41e6..b87a8bbd0 100644 --- a/ir/be/arm/bearch_arm.c +++ b/ir/be/arm/bearch_arm.c @@ -1214,12 +1214,13 @@ static const backend_params *arm_get_libfirm_params(void) { arm_is_psi_allowed /* allows or disallows Psi creation for given selector */ }; static ir_settings_arch_dep_t ad = { - 1, /* allow subs */ - 1, /* Muls are fast enough on ARM but ... */ - 31, /* ... one shift would be possible better */ - 0, /* SMUL is needed, only in Arch M */ - 0, /* UMUL is needed, only in Arch M */ - 32, /* SMUL & UMUL available for 32 bit */ + 1, /* allow subs */ + 1, /* Muls are fast enough on ARM but ... */ + 31, /* ... one shift would be possible better */ + NULL, /* no evaluator function */ + 0, /* SMUL is needed, only in Arch M */ + 0, /* UMUL is needed, only in Arch M */ + 32, /* SMUL & UMUL available for 32 bit */ }; static backend_params p = { 1, /* need dword lowering */ diff --git a/ir/be/ia32/bearch_ia32.c b/ir/be/ia32/bearch_ia32.c index fabcfd7c6..65a1ac6b8 100644 --- a/ir/be/ia32/bearch_ia32.c +++ b/ir/be/ia32/bearch_ia32.c @@ -1482,6 +1482,8 @@ static ia32_isa_t ia32_isa_template = { #endif }; +static void set_arch_costs(enum cpu_support arch); + /** * Initializes the backend ISA. */ @@ -1505,6 +1507,8 @@ static void *ia32_init(FILE *file_handle) { ia32_register_init(); ia32_create_opcodes(); + set_arch_costs(isa->opt_arch); + if ((ARCH_INTEL(isa->arch) && isa->arch < arch_pentium_4) || (ARCH_AMD(isa->arch) && isa->arch < arch_athlon)) /* no SSE2 for these cpu's */ @@ -1900,6 +1904,170 @@ static int ia32_is_psi_allowed(ir_node *sel, ir_node *phi_list, int i, int j) return 1; } +typedef struct insn_const { + int add_cost; /**< cost of an add instruction */ + int lea_cost; /**< cost of a lea instruction */ + int const_shf_cost; /**< cost of a constant shift instruction */ + int cost_mul_start; /**< starting cost of a multiply instruction */ + int cost_mul_bit; /**< cost of multiply for every set bit */ +} insn_const; + +/* costs for the i386 */ +static const insn_const i386_cost = { + 1, /* cost of an add instruction */ + 1, /* cost of a lea instruction */ + 2, /* cost of a constant shift instruction */ + 6, /* starting cost of a multiply instruction */ + 1 /* cost of multiply for every set bit */ +}; + +/* costs for the i486 */ +static const insn_const i486_cost = { + 1, /* cost of an add instruction */ + 1, /* cost of a lea instruction */ + 2, /* cost of a constant shift instruction */ + 12, /* starting cost of a multiply instruction */ + 1 /* cost of multiply for every set bit */ +}; + +/* costs for the Pentium */ +static const insn_const pentium_cost = { + 1, /* cost of an add instruction */ + 1, /* cost of a lea instruction */ + 1, /* cost of a constant shift instruction */ + 11, /* starting cost of a multiply instruction */ + 0 /* cost of multiply for every set bit */ +}; + +/* costs for the Pentium Pro */ +static const insn_const pentiumpro_cost = { + 1, /* cost of an add instruction */ + 1, /* cost of a lea instruction */ + 1, /* cost of a constant shift instruction */ + 4, /* starting cost of a multiply instruction */ + 0 /* cost of multiply for every set bit */ +}; + +/* costs for the K6 */ +static const insn_const k6_cost = { + 1, /* cost of an add instruction */ + 2, /* cost of a lea instruction */ + 1, /* cost of a constant shift instruction */ + 3, /* starting cost of a multiply instruction */ + 0 /* cost of multiply for every set bit */ +}; + +/* costs for the Athlon */ +static const insn_const athlon_cost = { + 1, /* cost of an add instruction */ + 2, /* cost of a lea instruction */ + 1, /* cost of a constant shift instruction */ + 5, /* starting cost of a multiply instruction */ + 0 /* cost of multiply for every set bit */ +}; + +/* costs for the Pentium 4 */ +static const insn_const pentium4_cost = { + 1, /* cost of an add instruction */ + 3, /* cost of a lea instruction */ + 4, /* cost of a constant shift instruction */ + 15, /* starting cost of a multiply instruction */ + 0 /* cost of multiply for every set bit */ +}; + +/* costs for the Core */ +static const insn_const core_cost = { + 1, /* cost of an add instruction */ + 1, /* cost of a lea instruction */ + 1, /* cost of a constant shift instruction */ + 10, /* starting cost of a multiply instruction */ + 0 /* cost of multiply for every set bit */ +}; + +/* costs for the generic */ +static const insn_const generic_cost = { + 1, /* cost of an add instruction */ + 2, /* cost of a lea instruction */ + 1, /* cost of a constant shift instruction */ + 4, /* starting cost of a multiply instruction */ + 0 /* cost of multiply for every set bit */ +}; + +static const insn_const *arch_costs = &generic_cost; + +static void set_arch_costs(enum cpu_support arch) { + switch (arch) { + case arch_i386: + arch_costs = &i386_cost; + break; + case arch_i486: + arch_costs = &i486_cost; + break; + case arch_pentium: + case arch_pentium_mmx: + arch_costs = &pentium_cost; + break; + case arch_pentium_pro: + case arch_pentium_2: + case arch_pentium_3: + arch_costs = &pentiumpro_cost; + break; + case arch_pentium_4: + arch_costs = &pentium4_cost; + break; + case arch_pentium_m: + arch_costs = &pentiumpro_cost; + break; + case arch_core: + arch_costs = &core_cost; + break; + case arch_k6: + arch_costs = &k6_cost; + break; + case arch_athlon: + case arch_athlon_64: + case arch_opteron: + arch_costs = &athlon_cost; + break; + case arch_generic: + default: + arch_costs = &generic_cost; + } +} + +/** + * Evaluate a given simple instruction. + */ +static int ia32_evaluate_insn(insn_kind kind, tarval *tv) { + int cost; + + switch (kind) { + case MUL: + cost = arch_costs->cost_mul_start; + if (arch_costs->cost_mul_bit > 0) { + char *bitstr = get_tarval_bitpattern(tv); + int i; + + for (i = 0; bitstr[i] != '\0'; ++i) { + if (bitstr[i] == '1') { + cost += arch_costs->cost_mul_bit; + } + } + free(bitstr); + } + return cost; + case LEA: + return arch_costs->lea_cost; + case ADD: + case SUB: + return arch_costs->add_cost; + case SHIFT: + return arch_costs->const_shf_cost; + default: + return 1; + } +} + static ia32_intrinsic_env_t intrinsic_env = { NULL, /**< the irg, these entities belong to */ NULL, /**< entity for first div operand (move into FPU) */ @@ -1921,9 +2089,10 @@ static const backend_params *ia32_get_libfirm_params(void) { ia32_is_psi_allowed /* allows or disallows Psi creation for given selector */ }; static const ir_settings_arch_dep_t ad = { - 1, /* also use subs */ - 4, /* maximum shifts */ - 31, /* maximum shift amount */ + 1, /* also use subs */ + 4, /* maximum shifts */ + 31, /* maximum shift amount */ + ia32_evaluate_insn, /* evaluate the instruction sequence */ 1, /* allow Mulhs */ 1, /* allow Mulus */ @@ -1966,6 +2135,7 @@ static const lc_opt_enum_int_items_t arch_items[] = { { "athlon", arch_athlon, }, { "athlon64", arch_athlon_64, }, { "opteron", arch_opteron, }, + { "generic", arch_generic, }, { NULL, 0 } }; diff --git a/ir/be/mips/bearch_mips.c b/ir/be/mips/bearch_mips.c index 19ad6e7f5..b18f4ee28 100644 --- a/ir/be/mips/bearch_mips.c +++ b/ir/be/mips/bearch_mips.c @@ -1014,17 +1014,9 @@ static ir_graph **mips_get_irg_list(const void *self, ir_graph ***irg_list) * Returns the libFirm configuration parameter for this backend. */ static const backend_params *mips_get_libfirm_params(void) { - static ir_settings_arch_dep_t ad = { - 1, /* allow subs */ - 0, /* Muls are fast enough on Mips */ - 31, /* shift would be ok */ - 0, /* no Mulhs */ - 0, /* no Mulhu */ - 32, /* Mulhs & Mulhu available for 32 bit */ - }; static backend_params p = { 1, /* need dword lowering */ - 0, /* don't support inlien assembler yet */ + 0, /* don't support inline assembler yet */ NULL, /* no additional opcodes */ NULL, /* will be set later */ NULL, /* but yet no creator function */ @@ -1032,7 +1024,6 @@ static const backend_params *mips_get_libfirm_params(void) { NULL, /* no if conversion settings */ }; - p.dep_param = &ad; return &p; } diff --git a/ir/be/ppc32/bearch_ppc32.c b/ir/be/ppc32/bearch_ppc32.c index 6efe72f27..c75d8b14e 100644 --- a/ir/be/ppc32/bearch_ppc32.c +++ b/ir/be/ppc32/bearch_ppc32.c @@ -933,14 +933,6 @@ static ir_graph **ppc32_get_irg_list(const void *self, ir_graph ***irg_list) { * Returns the libFirm configuration parameter for this backend. */ static const backend_params *ppc32_get_libfirm_params(void) { - static ir_settings_arch_dep_t ad = { - 1, /* allow subs */ - 0, /* Muls are fast enough on ARM */ - 31, /* shift would be ok */ - 0, /* SMUL is needed, only in Arch M*/ - 0, /* UMUL is needed, only in Arch M */ - 32, /* SMUL & UMUL available for 32 bit */ - }; static backend_params p = { 1, /* need dword lowering */ 0, /* don't support inlien assembler yet */ @@ -951,7 +943,6 @@ static const backend_params *ppc32_get_libfirm_params(void) { NULL, /* no if conversion settings */ }; - p.dep_param = &ad; return &p; } -- 2.20.1