From 2e33d052cdf2acacc39981474cce3e82ad7b0da7 Mon Sep 17 00:00:00 2001 From: Matthias Braun Date: Sat, 10 Jul 2010 19:33:00 +0000 Subject: [PATCH] remove now unnecessary beabi stuff from bearch_arm [r27733] --- ir/be/arm/arm_transform.c | 1 - ir/be/arm/bearch_arm.c | 226 +------------------------------------- 2 files changed, 1 insertion(+), 226 deletions(-) diff --git a/ir/be/arm/arm_transform.c b/ir/be/arm/arm_transform.c index a1ece638b..4f06c1dfa 100644 --- a/ir/be/arm/arm_transform.c +++ b/ir/be/arm/arm_transform.c @@ -1194,7 +1194,6 @@ static ir_node *gen_Proj_Start(ir_node *node) return new_r_Proj(barrier, mode_M, 0); case pn_Start_T_args: - /* TODO */ return barrier; case pn_Start_P_frame_base: diff --git a/ir/be/arm/bearch_arm.c b/ir/be/arm/bearch_arm.c index 383c1c074..47130ff9f 100644 --- a/ir/be/arm/bearch_arm.c +++ b/ir/be/arm/bearch_arm.c @@ -50,7 +50,6 @@ #include "../belower.h" #include "../besched.h" #include "be.h" -#include "../beabi.h" #include "../bemachine.h" #include "../beilpsched.h" #include "../bemodule.h" @@ -564,229 +563,6 @@ static const arch_register_class_t *arm_get_reg_class_for_mode(const ir_mode *mo return &arm_reg_classes[CLASS_arm_gp]; } -/** - * Produces the type which sits between the stack args and the locals on the stack. - * it will contain the return address and space to store the old base pointer. - * @return The Firm type modeling the ABI between type. - */ -static ir_type *arm_get_between_type(void *self) -{ - static ir_type *between_type = NULL; - (void) self; - - if (between_type == NULL) { - between_type = new_type_class(new_id_from_str("arm_between_type")); - set_type_size_bytes(between_type, 0); - } - - return between_type; -} - - -typedef struct { - be_abi_call_flags_bits_t flags; - const arch_env_t *arch_env; - ir_graph *irg; -} arm_abi_env_t; - -static void *arm_abi_init(const be_abi_call_t *call, const arch_env_t *arch_env, ir_graph *irg) -{ - arm_abi_env_t *env = XMALLOC(arm_abi_env_t); - be_abi_call_flags_t fl = be_abi_call_get_flags(call); - env->flags = fl.bits; - env->irg = irg; - env->arch_env = arch_env; - return env; -} - -/** - * Generate the routine prologue. - * - * @param self The callback object. - * @param mem A pointer to the mem node. Update this if you define new memory. - * @param reg_map A map mapping all callee_save/ignore/parameter registers to their defining nodes. - * @param stack_bias Points to the current stack bias, can be modified if needed. - * - * @return The register which shall be used as a stack frame base. - * - * All nodes which define registers in @p reg_map must keep @p reg_map current. - */ -static const arch_register_t *arm_abi_prologue(void *self, ir_node **mem, pmap *reg_map, int *stack_bias) -{ - arm_abi_env_t *env = self; - ir_node *store; - ir_graph *irg; - ir_node *block; - arch_register_class_t *gp; - - ir_node *fp, *ip, *lr, *pc; - ir_node *sp = be_abi_reg_map_get(reg_map, env->arch_env->sp); - - (void) stack_bias; - - if (env->flags.try_omit_fp) - return env->arch_env->sp; - - fp = be_abi_reg_map_get(reg_map, env->arch_env->bp); - ip = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_R12]); - lr = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_LR]); - pc = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_PC]); - - gp = &arm_reg_classes[CLASS_arm_gp]; - irg = env->irg; - block = get_irg_start_block(irg); - - /* mark bp register as ignore */ - be_set_constr_single_reg_out(get_Proj_pred(fp), - get_Proj_proj(fp), env->arch_env->bp, - arch_register_req_type_ignore); - - /* copy SP to IP (so we can spill it */ - ip = be_new_Copy(gp, block, sp); - be_set_constr_single_reg_out(ip, 0, &arm_gp_regs[REG_R12], 0); - - /* spill stuff */ - store = new_bd_arm_StoreStackM4Inc(NULL, block, sp, fp, ip, lr, pc, *mem); - - sp = new_r_Proj(store, env->arch_env->sp->reg_class->mode, pn_arm_StoreStackM4Inc_ptr); - arch_set_irn_register(sp, env->arch_env->sp); - *mem = new_r_Proj(store, mode_M, pn_arm_StoreStackM4Inc_M); - - /* frame pointer is ip-4 (because ip is our old sp value) */ - fp = new_bd_arm_Sub_imm(NULL, block, ip, 4, 0); - arch_set_irn_register(fp, env->arch_env->bp); - - /* beware: we change the fp but the StoreStackM4Inc above wants the old - * fp value. We are not allowed to spill or anything in the prolog, so we - * have to enforce some order here. (scheduler/regalloc are too stupid - * to extract this order from register requirements) */ - add_irn_dep(fp, store); - - fp = be_new_Copy(gp, block, fp); // XXX Gammelfix: only be_ have custom register requirements - be_set_constr_single_reg_out(fp, 0, env->arch_env->bp, - arch_register_req_type_ignore); - arch_set_irn_register(fp, env->arch_env->bp); - - be_abi_reg_map_set(reg_map, env->arch_env->bp, fp); - be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_R12], ip); - be_abi_reg_map_set(reg_map, env->arch_env->sp, sp); - be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_LR], lr); - be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_PC], pc); - - return env->arch_env->bp; -} - -/** - * Builds the ARM epilogue - */ -static void arm_abi_epilogue(void *self, ir_node *bl, ir_node **mem, pmap *reg_map) -{ - arm_abi_env_t *env = self; - ir_node *curr_sp = be_abi_reg_map_get(reg_map, env->arch_env->sp); - ir_node *curr_bp = be_abi_reg_map_get(reg_map, env->arch_env->bp); - ir_node *curr_pc = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_PC]); - ir_node *curr_lr = be_abi_reg_map_get(reg_map, &arm_gp_regs[REG_LR]); - - // TODO: Activate Omit fp in epilogue - if (env->flags.try_omit_fp) { - ir_node *incsp = be_new_IncSP(env->arch_env->sp, bl, curr_sp, BE_STACK_FRAME_SIZE_SHRINK, 0); - curr_sp = incsp; - } else { - ir_node *load_node; - - load_node = new_bd_arm_LoadStackM3Epilogue(NULL, bl, curr_bp, *mem); - - curr_bp = new_r_Proj(load_node, env->arch_env->bp->reg_class->mode, pn_arm_LoadStackM3Epilogue_res0); - curr_sp = new_r_Proj(load_node, env->arch_env->sp->reg_class->mode, pn_arm_LoadStackM3Epilogue_res1); - curr_pc = new_r_Proj(load_node, mode_Iu, pn_arm_LoadStackM3Epilogue_res2); - *mem = new_r_Proj(load_node, mode_M, pn_arm_LoadStackM3Epilogue_M); - arch_set_irn_register(curr_bp, env->arch_env->bp); - arch_set_irn_register(curr_sp, env->arch_env->sp); - arch_set_irn_register(curr_pc, &arm_gp_regs[REG_PC]); - } - be_abi_reg_map_set(reg_map, env->arch_env->sp, curr_sp); - be_abi_reg_map_set(reg_map, env->arch_env->bp, curr_bp); - be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_LR], curr_lr); - be_abi_reg_map_set(reg_map, &arm_gp_regs[REG_PC], curr_pc); -} - -static const be_abi_callbacks_t arm_abi_callbacks = { - arm_abi_init, - free, - arm_get_between_type, - arm_abi_prologue, - arm_abi_epilogue, -}; - - -/** - * Get the ABI restrictions for procedure calls. - * @param self The this pointer. - * @param method_type The type of the method (procedure) in question. - * @param abi The abi object to be modified - */ -static void arm_get_call_abi(const void *self, ir_type *method_type, be_abi_call_t *abi) -{ - ir_type *tp; - ir_mode *mode; - int i; - int n = get_method_n_params(method_type); - be_abi_call_flags_t call_flags = be_abi_call_get_flags(abi); - (void) self; - - /* set abi flags for calls */ - call_flags.bits.left_to_right = 0; - call_flags.bits.store_args_sequential = 0; - /* call_flags.bits.try_omit_fp don't change this we can handle both */ - call_flags.bits.fp_free = 0; - call_flags.bits.call_has_imm = 1; - - /* set stack parameter passing style */ - be_abi_call_set_flags(abi, call_flags, &arm_abi_callbacks); - - for (i = 0; i < n; i++) { - /* reg = get reg for param i; */ - /* be_abi_call_param_reg(abi, i, reg); */ - if (i < 4) { - be_abi_call_param_reg(abi, i, arm_get_RegParam_reg(i), ABI_CONTEXT_BOTH); - } else { - tp = get_method_param_type(method_type, i); - mode = get_type_mode(tp); - be_abi_call_param_stack(abi, i, mode, 4, 0, 0, ABI_CONTEXT_BOTH); - } - } - - /* set return registers */ - n = get_method_n_ress(method_type); - - assert(n <= 2 && "more than two results not supported"); - - /* In case of 64bit returns, we will have two 32bit values */ - if (n == 2) { - tp = get_method_res_type(method_type, 0); - mode = get_type_mode(tp); - - assert(!mode_is_float(mode) && "two FP results not supported"); - - tp = get_method_res_type(method_type, 1); - mode = get_type_mode(tp); - - assert(!mode_is_float(mode) && "mixed INT, FP results not supported"); - - be_abi_call_res_reg(abi, 0, &arm_gp_regs[REG_R0], ABI_CONTEXT_BOTH); - be_abi_call_res_reg(abi, 1, &arm_gp_regs[REG_R1], ABI_CONTEXT_BOTH); - } else if (n == 1) { - const arch_register_t *reg; - - tp = get_method_res_type(method_type, 0); - assert(is_atomic_type(tp)); - mode = get_type_mode(tp); - - reg = mode_is_float(mode) ? &arm_fpa_regs[REG_F0] : &arm_gp_regs[REG_R0]; - be_abi_call_res_reg(abi, 0, reg, ABI_CONTEXT_BOTH); - } -} - static int arm_to_appear_in_schedule(void *block_env, const ir_node *irn) { (void) block_env; @@ -952,7 +728,7 @@ const arch_isa_if_t arm_isa_if = { arm_get_n_reg_class, arm_get_reg_class, arm_get_reg_class_for_mode, - arm_get_call_abi, + NULL, arm_get_code_generator_if, arm_get_list_sched_selector, arm_get_ilp_sched_selector, -- 2.20.1