From 294649280c357adf3afa6d66918ff36ca739e943 Mon Sep 17 00:00:00 2001 From: Matthias Braun Date: Thu, 15 Jul 2010 17:10:26 +0000 Subject: [PATCH] change backend node specification to use whole words instead of cryptical 1-char abreviations for flags [r27745] --- ir/be/TEMPLATE/TEMPLATE_spec.pl | 66 ++--- ir/be/amd64/amd64_spec.pl | 30 +-- ir/be/arm/arm_spec.pl | 84 +++--- ir/be/ia32/ia32_spec.pl | 364 ++++++++++++-------------- ir/be/scripts/generate_new_opcodes.pl | 39 ++- ir/be/sparc/sparc_spec.pl | 135 +++------- ir/tr/entity_t.h | 1 - 7 files changed, 330 insertions(+), 389 deletions(-) diff --git a/ir/be/TEMPLATE/TEMPLATE_spec.pl b/ir/be/TEMPLATE/TEMPLATE_spec.pl index db9aa4d63..63397bda1 100644 --- a/ir/be/TEMPLATE/TEMPLATE_spec.pl +++ b/ir/be/TEMPLATE/TEMPLATE_spec.pl @@ -164,68 +164,68 @@ $mode_fp = "mode_E"; # mode used by floatingpoint registers # Integer nodes Add => { - op_flags => "C", - irn_flags => "R", + op_flags => [ "commutative" ], + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, emit => '. add %S1, %S2, %D1', mode => $mode_gp, }, Mul => { - op_flags => "C", - irn_flags => "R", + op_flags => [ "commutative" ], + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, emit =>'. mul %S1, %S2, %D1', mode => $mode_gp, }, And => { - op_flags => "C", - irn_flags => "R", + op_flags => [ "commutative" ], + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, emit => '. and %S1, %S2, %D1', mode => $mode_gp, }, Or => { - op_flags => "C", - irn_flags => "R", + op_flags => [ "commutative" ], + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, emit => '. or %S1, %S2, %D1', mode => $mode_gp, }, Xor => { - op_flags => "C", - irn_flags => "R", + op_flags => [ "commutative" ], + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, emit => '. xor %S1, %S2, %D1', mode => $mode_gp, }, Sub => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, emit => '. sub %S1, %S2, %D1', mode => $mode_gp, }, Shl => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, emit => '. shl %S1, %S2, %D1', mode => $mode_gp, }, Shr => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "gp" ], out => [ "in_r1" ] }, emit => '. shr %S2, %D1', mode => $mode_gp, }, Minus => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp" ], out => [ "gp" ] }, emit => '. neg %S1, %D1', mode => $mode_gp, @@ -240,8 +240,8 @@ Not => { }, Const => { - op_flags => "c", - irn_flags => "R", + op_flags => [ "constlike" ], + irn_flags => [ "rematerializable" ], attr => "tarval *value", custominit => "set_TEMPLATE_value(res, value);", reg_req => { out => [ "gp" ] }, @@ -258,8 +258,8 @@ Const => { Jmp => { state => "pinned", - op_flags => "X", - irn_flags => "J", + op_flags => [ "cfopcode" ], + irn_flags => [ "simple_jump" ], reg_req => { out => [ "none" ] }, mode => "mode_X", }, @@ -267,16 +267,16 @@ Jmp => { # Load / Store Load => { - op_flags => "L|F", - irn_flags => "R", + op_flags => [ "labeled", "fragile" ], + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "none" ], out => [ "gp" ] }, emit => '. mov (%S1), %D1', }, Store => { - op_flags => "L|F", - irn_flags => "R", + op_flags => [ "labeled", "fragile" ], + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ] }, emit => '. movl %S2, (%S1)', @@ -285,22 +285,22 @@ Store => { # Floating Point operations fAdd => { - op_flags => "C", - irn_flags => "R", + op_flags => [ "commutative" ], + irn_flags => [ "rematerializable" ], reg_req => { in => [ "fp", "fp" ], out => [ "fp" ] }, emit => '. fadd %S1, %S2, %D1', mode => $mode_fp, }, fMul => { - op_flags => "C", + op_flags => [ "commutative" ], reg_req => { in => [ "fp", "fp" ], out => [ "fp" ] }, emit =>'. fmul %S1, %S2, %D1', mode => $mode_fp, }, fSub => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "fp", "fp" ], out => [ "fp" ] }, emit => '. fsub %S1, %S2, %D1', mode => $mode_fp, @@ -313,15 +313,15 @@ fDiv => { }, fMinus => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "fp" ], out => [ "fp" ] }, emit => '. fneg %S1, %D1', mode => $mode_fp, }, fConst => { - op_flags => "c", - irn_flags => "R", + op_flags => [ "constlike" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "fp" ] }, emit => '. fmov %C, %D1', cmp_attr => @@ -335,16 +335,16 @@ fConst => { # Load / Store fLoad => { - op_flags => "L|F", - irn_flags => "R", + op_flags => [ "labeled", "fragile" ], + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "none" ], out => [ "fp" ] }, emit => '. fmov (%S1), %D1', }, fStore => { - op_flags => "L|F", - irn_flags => "R", + op_flags => [ "labeled", "fragile" ], + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "fp", "none" ] }, emit => '. fmov %S2, (%S1)', diff --git a/ir/be/amd64/amd64_spec.pl b/ir/be/amd64/amd64_spec.pl index 4a71cd700..9723fe702 100644 --- a/ir/be/amd64/amd64_spec.pl +++ b/ir/be/amd64/amd64_spec.pl @@ -206,8 +206,8 @@ Push => { # units => [ "GP" ], }, Add => { - op_flags => "C", - irn_flags => "R", + op_flags => [ "commutative" ], + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, @@ -230,7 +230,7 @@ Mul => { modified_flags => $status_flags }, Sub => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, @@ -240,7 +240,7 @@ Sub => { modified_flags => 1, }, Neg => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp" ], out => [ "in_r1", "flags" ] }, emit => '. neg %S1', @@ -250,7 +250,7 @@ Neg => { modified_flags => $status_flags }, Immediate => { - op_flags => "c", + op_flags => [ "constlike" ], attr => "unsigned imm_value", init_attr => "attr->ext.imm_value = imm_value;", reg_req => { out => [ "gp" ] }, @@ -258,8 +258,8 @@ Immediate => { mode => $mode_gp, }, SymConst => { - op_flags => "c", - irn_flags => "R", + op_flags => [ "constlike" ], + irn_flags => [ "rematerializable" ], attr => "ir_entity *entity", attr_type => "amd64_SymConst_attr_t", reg_req => { out => [ "gp" ] }, @@ -277,12 +277,12 @@ Conv => { }, Jmp => { state => "pinned", - op_flags => "X", + op_flags => [ "cfopcode" ], reg_req => { out => [ "none" ] }, mode => "mode_X", }, Cmp => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp" ], out => [ "flags" ] }, @@ -297,7 +297,7 @@ Cmp => { }, Jcc => { state => "pinned", - op_flags => "L|X|Y", + op_flags => [ "labeled", "cfopcode", "forking" ], reg_req => { in => [ "eflags" ], out => [ "none", "none" ] }, ins => [ "eflags" ], outs => [ "false", "true" ], @@ -306,7 +306,7 @@ Jcc => { mode => "mode_T", }, Load => { - op_flags => "L|F", + op_flags => [ "labeled", "fragile" ], state => "exc_pinned", reg_req => { in => [ "gp", "none" ], out => [ "gp", "none" ] }, @@ -317,8 +317,8 @@ Load => { emit => ". mov %O(%S1), %D1" }, FrameAddr => { - op_flags => "c", - irn_flags => "R", + op_flags => [ "constlike" ], + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp" ], out => [ "gp" ] }, ins => [ "base" ], attr => "ir_entity *entity", @@ -326,7 +326,7 @@ FrameAddr => { mode => $mode_gp, }, Store => { - op_flags => "L|F", + op_flags => [ "labeled", "fragile" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, ins => [ "ptr", "val", "mem" ], @@ -339,7 +339,7 @@ Store => { #NoReg_GP => { # state => "pinned", -# op_flags => "c|NB|NI", +# op_flags => [ "constlike", "dump_noblcok", "dump_noinput" ], # reg_req => { out => [ "gp_NOREG:I" ] }, # units => [], # emit => "", diff --git a/ir/be/arm/arm_spec.pl b/ir/be/arm/arm_spec.pl index d65f3e1c2..8b8a8ca17 100644 --- a/ir/be/arm/arm_spec.pl +++ b/ir/be/arm/arm_spec.pl @@ -202,7 +202,7 @@ my %cmp_shifter_operand_constructors = ( %nodes = ( Add => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], emit => '. add %D0, %S0, %SO', mode => $mode_gp, attr_type => "arm_shifter_operand_t", @@ -210,21 +210,21 @@ Add => { }, Mul => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "gp" ], out => [ "!in_r1" ] }, emit =>'. mul %D0, %S0, %S1', mode => $mode_gp, }, Smull => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "gp" ], out => [ "gp", "gp" ] }, emit =>'. smull %D0, %D1, %S0, %S1', outs => [ "low", "high" ], }, Umull => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "gp" ], out => [ "gp", "gp" ] }, emit =>'. umull %D0, %D1, %S0, %S1', outs => [ "low", "high" ], @@ -232,14 +232,14 @@ Umull => { }, Mla => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "gp", "gp" ], out => [ "!in_r1" ] }, emit =>'. mla %D0, %S0, %S1, %S2', mode => $mode_gp, }, And => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], emit => '. and %D0, %S0, %SO', mode => $mode_gp, attr_type => "arm_shifter_operand_t", @@ -247,7 +247,7 @@ And => { }, Or => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], emit => '. orr %D0, %S0, %SO', mode => $mode_gp, attr_type => "arm_shifter_operand_t", @@ -255,7 +255,7 @@ Or => { }, Eor => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], emit => '. eor %D0, %S0, %SO', mode => $mode_gp, attr_type => "arm_shifter_operand_t", @@ -263,7 +263,7 @@ Eor => { }, Bic => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], emit => '. bic %D0, %S0, %SO', mode => $mode_gp, attr_type => "arm_shifter_operand_t", @@ -271,7 +271,7 @@ Bic => { }, Sub => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], emit => '. sub %D0, %S0, %SO', mode => $mode_gp, attr_type => "arm_shifter_operand_t", @@ -279,7 +279,7 @@ Sub => { }, Rsb => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], emit => '. rsb %D0, %S0, %SO', mode => $mode_gp, attr_type => "arm_shifter_operand_t", @@ -287,7 +287,7 @@ Rsb => { }, Mov => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], arity => "variable", emit => '. mov %D0, %SO', mode => $mode_gp, @@ -296,7 +296,7 @@ Mov => { }, Mvn => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], attr_type => "arm_shifter_operand_t", arity => "variable", emit => '. mvn %D0, %SO', @@ -346,8 +346,8 @@ Bl => { # this node produces ALWAYS an empty (tempary) gp reg and cannot be CSE'd EmptyReg => { - op_flags => "c", - irn_flags => "R", + op_flags => [ "constlike" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "gp" ] }, emit => '. /* %D0 now available for calculations */', cmp_attr => 'return 1;', @@ -355,7 +355,7 @@ EmptyReg => { }, CopyB => { - op_flags => "F|H", + op_flags => [ "fragile" ], state => "pinned", attr => "unsigned size", attr_type => "arm_CopyB_attr_t", @@ -364,8 +364,8 @@ CopyB => { }, FrameAddr => { - op_flags => "c", - irn_flags => "R", + op_flags => [ "constlike" ], + irn_flags => [ "rematerializable" ], attr => "ir_entity *entity, int symconst_offset", reg_req => { in => [ "gp" ], out => [ "gp" ] }, ins => [ "base" ], @@ -374,8 +374,8 @@ FrameAddr => { }, SymConst => { - op_flags => "c", - irn_flags => "R", + op_flags => [ "constlike" ], + irn_flags => [ "rematerializable" ], attr => "ir_entity *entity, int symconst_offset", reg_req => { out => [ "gp" ] }, attr_type => "arm_SymConst_attr_t", @@ -383,7 +383,7 @@ SymConst => { }, Cmp => { - irn_flags => "R|F", + irn_flags => [ "rematerializable", "modify_flags" ], emit => '. cmp %S0, %SO', mode => $mode_flags, attr_type => "arm_cmp_attr_t", @@ -391,7 +391,7 @@ Cmp => { }, Tst => { - irn_flags => "R|F", + irn_flags => [ "rematerializable", "modify_flags" ], emit => '. tst %S0, %SO', mode => $mode_flags, attr_type => "arm_cmp_attr_t", @@ -399,7 +399,7 @@ Tst => { }, B => { - op_flags => "L|X|Y", + op_flags => [ "labeled", "cfopcode", "forking" ], state => "pinned", mode => "mode_T", reg_req => { in => [ "flags" ], out => [ "none", "none" ] }, @@ -410,14 +410,14 @@ B => { Jmp => { state => "pinned", - op_flags => "X", - irn_flags => "J", + op_flags => [ "cfopcode" ], + irn_flags => [ "simple_jump" ], reg_req => { out => [ "none" ] }, mode => "mode_X", }, SwitchJmp => { - op_flags => "L|X|Y", + op_flags => [ "labeled", "cfopcode", "forking" ], state => "pinned", mode => "mode_T", attr => "int n_projs, long def_proj_num", @@ -428,7 +428,7 @@ SwitchJmp => { }, Ldr => { - op_flags => "L|F", + op_flags => [ "labeled", "fragile" ], state => "exc_pinned", ins => [ "ptr", "mem" ], outs => [ "res", "M" ], @@ -439,7 +439,7 @@ Ldr => { }, Str => { - op_flags => "L|F", + op_flags => [ "labeled", "fragile" ], state => "exc_pinned", ins => [ "ptr", "val", "mem" ], outs => [ "mem" ], @@ -451,8 +451,8 @@ Str => { }, StoreStackM4Inc => { - op_flags => "L|F", - irn_flags => "R", + op_flags => [ "labeled", "fragile" ], + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "sp", "gp", "gp", "gp", "gp", "none" ], out => [ "sp:I|S", "none" ] }, emit => '. stmfd %S0!, {%S1, %S2, %S3, %S4}', @@ -460,8 +460,8 @@ StoreStackM4Inc => { }, LoadStackM3Epilogue => { - op_flags => "L|F", - irn_flags => "R", + op_flags => [ "labeled", "fragile" ], + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "sp", "none" ], out => [ "r11:I", "sp:I|S", "pc:I", "none" ] }, emit => '. ldmfd %S0, {%D0, %D1, %D2}', @@ -471,7 +471,7 @@ LoadStackM3Epilogue => { Adf => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] }, emit => '. adf%AM %D0, %S0, %S1', attr_type => "arm_farith_attr_t", @@ -480,7 +480,7 @@ Adf => { }, Muf => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] }, emit =>'. muf%AM %D0, %S0, %S1', attr_type => "arm_farith_attr_t", @@ -489,7 +489,7 @@ Muf => { }, Suf => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] }, emit => '. suf%AM %D0, %S0, %S1', attr_type => "arm_farith_attr_t", @@ -507,7 +507,7 @@ Dvf => { }, Mvf => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "fpa" ], out => [ "fpa" ] }, emit => '. mvf%AM %S0, %D0', attr_type => "arm_farith_attr_t", @@ -516,7 +516,7 @@ Mvf => { }, FltX => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp" ], out => [ "fpa" ] }, emit => '. flt%AM %D0, %S0', attr_type => "arm_farith_attr_t", @@ -525,7 +525,7 @@ FltX => { }, Cmfe => { - irn_flags => "R|F", + irn_flags => [ "rematerializable", "modify_flags" ], mode => $mode_flags, attr_type => "arm_cmp_attr_t", attr => "bool ins_permuted", @@ -535,7 +535,7 @@ Cmfe => { }, Ldf => { - op_flags => "L|F", + op_flags => [ "labeled", "fragile" ], state => "exc_pinned", ins => [ "ptr", "mem" ], outs => [ "res", "M" ], @@ -546,7 +546,7 @@ Ldf => { }, Stf => { - op_flags => "L|F", + op_flags => [ "labeled", "fragile" ], state => "exc_pinned", ins => [ "ptr", "val", "mem" ], outs => [ "M" ], @@ -561,8 +561,8 @@ Stf => { # floating point constants # fConst => { - op_flags => "c", - irn_flags => "R", + op_flags => [ "constlike" ], + irn_flags => [ "rematerializable" ], attr => "tarval *tv", init_attr => "attr->tv = tv;", mode => "get_tarval_mode(tv)", diff --git a/ir/be/ia32/ia32_spec.pl b/ir/be/ia32/ia32_spec.pl index cf51d618f..35e8d9914 100644 --- a/ir/be/ia32/ia32_spec.pl +++ b/ir/be/ia32/ia32_spec.pl @@ -38,26 +38,6 @@ $arch = "ia32"; # # ); # close the %nodes initializer -# op_flags: flags for the operation, OPTIONAL (default is "N") -# the op_flags correspond to the firm irop_flags: -# N irop_flag_none -# L irop_flag_labeled -# C irop_flag_commutative -# X irop_flag_cfopcode -# I irop_flag_ip_cfopcode -# F irop_flag_fragile -# Y irop_flag_forking -# H irop_flag_highlevel -# c irop_flag_constlike -# K irop_flag_keep -# NB irop_flag_dump_noblock -# NI irop_flag_dump_noinput -# -# irn_flags: special node flags, OPTIONAL (default is 0) -# following irn_flags are supported: -# R rematerializeable -# N not spillable -# # state: state of the operation, OPTIONAL (default is "floats") # # arity: arity of the operation, MUST NOT BE OMITTED @@ -307,7 +287,7 @@ $fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM", Immediate => { state => "pinned", - op_flags => "c", + op_flags => [ "constlike" ], reg_req => { out => [ "gp_NOREG:I" ] }, attr => "ir_entity *symconst, int symconst_sign, int no_pic_adjust, long offset", attr_type => "ia32_immediate_attr_t", @@ -330,8 +310,8 @@ Asm => { # "allocates" a free register ProduceVal => { - op_flags => "c|n", - irn_flags => "R", + op_flags => [ "constlike", "cse_neutral" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "gp" ] }, emit => "", units => [ ], @@ -341,7 +321,7 @@ ProduceVal => { }, Add => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 in_r5", "flags", "none" ] }, @@ -356,7 +336,7 @@ Add => { }, AddMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -368,7 +348,7 @@ AddMem => { }, AddMem8Bit => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -394,7 +374,7 @@ Adc => { }, l_Add => { - op_flags => "C", + op_flags => [ "constlike" ], reg_req => { in => [ "none", "none" ], out => [ "none" ] }, ins => [ "left", "right" ], }, @@ -422,7 +402,7 @@ Mul => { l_Mul => { # we should not rematrialize this node. It produces 2 results and has # very strict constraints - op_flags => "C", + op_flags => [ "constlike" ], cmp_attr => "return 1;", reg_req => { in => [ "none", "none" ], out => [ "none", "none", "none", "none" ] }, @@ -431,7 +411,7 @@ l_Mul => { }, IMul => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", # TODO: adjust out requirements for the 3 operand form # (no need for should_be_same then) @@ -447,7 +427,7 @@ IMul => { }, IMul1OP => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "eax", "gp" ], out => [ "eax", "flags", "none", "edx" ] }, @@ -461,7 +441,7 @@ IMul1OP => { }, l_IMul => { - op_flags => "C", + op_flags => [ "constlike" ], cmp_attr => "return 1;", reg_req => { in => [ "none", "none" ], out => [ "none", "none", "none", "none" ] }, @@ -470,7 +450,7 @@ l_IMul => { }, And => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 in_r5", "flags", "none" ] }, @@ -485,7 +465,7 @@ And => { }, AndMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -497,7 +477,7 @@ AndMem => { }, AndMem8Bit => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -509,7 +489,7 @@ AndMem8Bit => { }, Or => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 in_r5", "flags", "none" ] }, @@ -524,7 +504,7 @@ Or => { }, OrMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -536,7 +516,7 @@ OrMem => { }, OrMem8Bit => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -548,7 +528,7 @@ OrMem8Bit => { }, Xor => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4 in_r5", "flags", "none" ] }, @@ -563,8 +543,8 @@ Xor => { }, Xor0 => { - op_flags => "c", - irn_flags => "R", + op_flags => [ "constlike" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "gp", "flags" ] }, outs => [ "res", "flags" ], emit => ". xor%M %D0, %D0", @@ -575,7 +555,7 @@ Xor0 => { }, XorMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -587,7 +567,7 @@ XorMem => { }, XorMem8Bit => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -599,7 +579,7 @@ XorMem8Bit => { }, Sub => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "in_r4", "flags", "none" ] }, @@ -614,7 +594,7 @@ Sub => { }, SubMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "subtrahend" ], @@ -626,7 +606,7 @@ SubMem => { }, SubMem8Bit => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "subtrahend" ], @@ -653,7 +633,7 @@ Sbb => { Sbb0 => { # Spiller currently fails when rematerializing flag consumers - # irn_flags => "R", + # irn_flags => [ "rematerializable" ], reg_req => { in => [ "flags" ], out => [ "gp", "flags" ] }, outs => [ "res", "flags" ], emit => ". sbb%M %D0, %D0", @@ -674,7 +654,7 @@ l_Sbb => { }, IDiv => { - op_flags => "F|L", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp", "eax", "edx" ], out => [ "eax", "flags", "none", "edx", "none" ] }, @@ -688,7 +668,7 @@ IDiv => { }, Div => { - op_flags => "F|L", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp", "eax", "edx" ], out => [ "eax", "flags", "none", "edx", "none" ] }, @@ -702,7 +682,7 @@ Div => { }, Shl => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2", "flags" ] }, ins => [ "val", "count" ], @@ -715,7 +695,7 @@ Shl => { }, ShlMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "count" ], @@ -733,7 +713,7 @@ l_ShlDep => { }, ShlD => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r2 !in_r3", "flags" ] }, ins => [ "val_high", "val_low", "count" ], @@ -752,7 +732,7 @@ l_ShlD => { }, Shr => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2", "flags" ] }, ins => [ "val", "count" ], @@ -765,7 +745,7 @@ Shr => { }, ShrMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "count" ], @@ -783,7 +763,7 @@ l_ShrDep => { }, ShrD => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "gp", "ecx" ], out => [ "in_r1 !in_r2 !in_r3", "flags" ] }, ins => [ "val_high", "val_low", "count" ], @@ -802,7 +782,7 @@ l_ShrD => { }, Sar => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2", "flags" ] }, ins => [ "val", "count" ], @@ -815,7 +795,7 @@ Sar => { }, SarMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "count" ], @@ -833,7 +813,7 @@ l_SarDep => { }, Ror => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2", "flags" ] }, ins => [ "val", "count" ], @@ -846,7 +826,7 @@ Ror => { }, RorMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "count" ], @@ -858,7 +838,7 @@ RorMem => { }, Rol => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "ecx" ], out => [ "in_r1 !in_r2", "flags" ] }, ins => [ "val", "count" ], @@ -871,7 +851,7 @@ Rol => { }, RolMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "count" ], @@ -883,7 +863,7 @@ RolMem => { }, Neg => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp" ], out => [ "in_r1", "flags" ] }, emit => '. neg%M %S0', @@ -896,7 +876,7 @@ Neg => { }, NegMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, ins => [ "base", "index", "mem" ], @@ -908,7 +888,7 @@ NegMem => { }, Minus64Bit => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "gp" ], out => [ "in_r1", "in_r2" ] }, outs => [ "low_res", "high_res" ], units => [ "GP" ], @@ -918,7 +898,7 @@ Minus64Bit => { Inc => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp" ], out => [ "in_r1", "flags" ] }, ins => [ "val" ], @@ -931,7 +911,7 @@ Inc => { }, IncMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, ins => [ "base", "index", "mem" ], @@ -943,7 +923,7 @@ IncMem => { }, Dec => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp" ], out => [ "in_r1", "flags" ] }, ins => [ "val" ], @@ -956,7 +936,7 @@ Dec => { }, DecMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, ins => [ "base", "index", "mem" ], @@ -968,7 +948,7 @@ DecMem => { }, Not => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp" ], out => [ "in_r1" ] }, ins => [ "val" ], @@ -981,7 +961,7 @@ Not => { }, NotMem => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, ins => [ "base", "index", "mem" ], @@ -1011,7 +991,7 @@ Stc => { }, Cmp => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ], out => [ "flags", "none", "none" ] }, @@ -1029,7 +1009,7 @@ Cmp => { }, Cmp8Bit => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ] , out => [ "flags", "none", "none" ] }, @@ -1047,7 +1027,7 @@ Cmp8Bit => { }, Test => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ] , out => [ "flags", "none", "none" ] }, @@ -1065,7 +1045,7 @@ Test => { }, Test8Bit => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ] , out => [ "flags", "none", "none" ] }, @@ -1083,7 +1063,7 @@ Test8Bit => { }, Setcc => { - #irn_flags => "R", + #irn_flags => [ "rematerializable" ], reg_req => { in => [ "eflags" ], out => [ "eax ebx ecx edx" ] }, ins => [ "eflags" ], outs => [ "res" ], @@ -1102,7 +1082,7 @@ Setcc => { }, SetccMem => { - #irn_flags => "R", + #irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "eflags" ], out => [ "none" ] }, ins => [ "base", "index", "mem","eflags" ], @@ -1116,7 +1096,7 @@ SetccMem => { }, CMovcc => { - #irn_flags => "R", + #irn_flags => [ "rematerializable" ], state => "exc_pinned", # (note: leave the false,true order intact to make it compatible with other # ia32_binary ops) @@ -1134,7 +1114,7 @@ CMovcc => { Jcc => { state => "pinned", - op_flags => "L|X|Y", + op_flags => [ "labeled", "cfopcode", "forking" ], reg_req => { in => [ "eflags" ], out => [ "none", "none" ] }, ins => [ "eflags" ], outs => [ "false", "true" ], @@ -1146,7 +1126,7 @@ Jcc => { SwitchJmp => { state => "pinned", - op_flags => "L|X|Y", + op_flags => [ "labeled", "cfopcode", "forking" ], reg_req => { in => [ "gp" ] }, mode => "mode_T", attr_type => "ia32_condcode_attr_t", @@ -1159,8 +1139,8 @@ SwitchJmp => { Jmp => { state => "pinned", - irn_flags => "J", - op_flags => "X", + irn_flags => [ "simple_jump" ], + op_flags => [ "cfopcode" ], reg_req => { out => [ "none" ] }, latency => 1, units => [ "BRANCH" ], @@ -1169,7 +1149,7 @@ Jmp => { IJmp => { state => "pinned", - op_flags => "X", + op_flags => [ "cfopcode" ], reg_req => { in => [ "gp", "gp", "none", "gp" ] }, ins => [ "base", "index", "mem", "target" ], am => "source,unary", @@ -1181,8 +1161,8 @@ IJmp => { }, Const => { - op_flags => "c", - irn_flags => "R", + op_flags => [ "constlike" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "gp" ] }, units => [ "GP" ], attr => "ir_entity *symconst, int symconst_sign, int no_pic_adjust, long offset", @@ -1192,8 +1172,8 @@ Const => { }, Unknown => { - op_flags => "c", - irn_flags => "R", + op_flags => [ "constlike" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "gp" ] }, latency => 0, emit => '', @@ -1201,7 +1181,7 @@ Unknown => { }, GetEIP => { - op_flags => "c", + op_flags => [ "constlike" ], reg_req => { out => [ "gp" ] }, units => [ "GP" ], latency => 5, @@ -1211,7 +1191,7 @@ GetEIP => { NoReg_GP => { state => "pinned", - op_flags => "c|NB|NI", + op_flags => [ "constlike", "dump_noblock", "dump_noinput" ], reg_req => { out => [ "gp_NOREG:I" ] }, units => [], emit => "", @@ -1221,7 +1201,7 @@ NoReg_GP => { NoReg_VFP => { state => "pinned", - op_flags => "c|NB|NI", + op_flags => [ "constlike", "dump_noblock", "dump_noinput" ], reg_req => { out => [ "vfp_NOREG:I" ] }, units => [], emit => "", @@ -1232,7 +1212,7 @@ NoReg_VFP => { NoReg_XMM => { state => "pinned", - op_flags => "c|NB|NI", + op_flags => [ "constlike", "dump_noblock", "dump_noinput" ], reg_req => { out => [ "xmm_NOREG:I" ] }, units => [], emit => "", @@ -1242,7 +1222,7 @@ NoReg_XMM => { ChangeCW => { state => "pinned", - op_flags => "c", + op_flags => [ "constlike" ], reg_req => { out => [ "fpcw:I" ] }, mode => $mode_fpcw, latency => 3, @@ -1251,7 +1231,7 @@ ChangeCW => { }, FldCW => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "fpcw:I" ] }, ins => [ "base", "index", "mem" ], @@ -1263,7 +1243,7 @@ FldCW => { }, FnstCW => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "pinned", reg_req => { in => [ "gp", "gp", "none", "fp_cw" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "fpcw" ], @@ -1274,7 +1254,7 @@ FnstCW => { }, FnstCWNOP => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "pinned", reg_req => { in => [ "fp_cw" ], out => [ "none" ] }, ins => [ "fpcw" ], @@ -1299,7 +1279,7 @@ Cltd => { # lateny of 0 for load is correct Load => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "gp", "none", "none", "none" ] }, @@ -1311,7 +1291,7 @@ Load => { }, Store => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none", "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -1323,7 +1303,7 @@ Store => { }, Store8Bit => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => ["none", "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -1335,7 +1315,7 @@ Store8Bit => { }, Lea => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, ins => [ "base", "index" ], emit => '. leal %AM, %D0', @@ -1441,7 +1421,7 @@ SubSP => { }, RepPrefix => { - op_flags => "K", + op_flags => [ "keep" ], state => "pinned", mode => "mode_M", emit => ". rep", @@ -1449,7 +1429,7 @@ RepPrefix => { }, LdTls => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "gp" ] }, units => [ "GP" ], latency => 1, @@ -1459,7 +1439,7 @@ LdTls => { # BT supports source address mode, but this is unused yet # Bt => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp" ], out => [ "flags" ] }, ins => [ "left", "right" ], @@ -1471,7 +1451,7 @@ Bt => { }, Bsf => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "gp", "flags", "none" ] }, @@ -1486,7 +1466,7 @@ Bsf => { }, Bsr => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "gp", "flags", "none" ] }, @@ -1504,7 +1484,7 @@ Bsr => { # SSE4.2 or SSE4a popcnt instruction # Popcnt => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "gp", "flags", "none" ] }, @@ -1554,7 +1534,7 @@ ClimbFrame => { # bswap # Bswap => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp" ], out => [ "in_r1" ] }, emit => '. bswap%M %S0', @@ -1568,7 +1548,7 @@ Bswap => { # bswap16, use xchg here # Bswap16 => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "eax ebx ecx edx" ], out => [ "in_r1" ] }, emit => '. xchg %SB0, %SH0', @@ -1608,7 +1588,7 @@ UD2 => { # outport # Outport => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "pinned", reg_req => { in => [ "edx", "eax", "none" ], out => [ "none" ] }, ins => [ "port", "value", "mem" ], @@ -1623,7 +1603,7 @@ Outport => { # inport # Inport => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "pinned", reg_req => { in => [ "edx", "none" ], out => [ "eax", "none" ] }, ins => [ "port", "mem" ], @@ -1639,7 +1619,7 @@ Inport => { # Intel style prefetching # Prefetch0 => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, ins => [ "base", "index", "mem" ], @@ -1650,7 +1630,7 @@ Prefetch0 => { }, Prefetch1 => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, ins => [ "base", "index", "mem" ], @@ -1661,7 +1641,7 @@ Prefetch1 => { }, Prefetch2 => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, ins => [ "base", "index", "mem" ], @@ -1672,7 +1652,7 @@ Prefetch2 => { }, PrefetchNTA => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, ins => [ "base", "index", "mem" ], @@ -1686,7 +1666,7 @@ PrefetchNTA => { # 3DNow! prefetch instructions # Prefetch => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, ins => [ "base", "index", "mem" ], @@ -1697,7 +1677,7 @@ Prefetch => { }, PrefetchW => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] }, ins => [ "base", "index", "mem" ], @@ -1709,7 +1689,7 @@ PrefetchW => { # produces a 0/+0.0 xZero => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "xmm" ] }, emit => '. xorp%XSD %D0, %D0', latency => 3, @@ -1718,8 +1698,8 @@ xZero => { }, xUnknown => { - op_flags => "c", - irn_flags => "R", + op_flags => [ "constlike" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "xmm" ] }, emit => '', latency => 0, @@ -1727,7 +1707,7 @@ xUnknown => { }, xPzero => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "xmm" ] }, emit => '. pxor %D0, %D0', latency => 3, @@ -1737,7 +1717,7 @@ xPzero => { # produces all 1 bits xAllOnes => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "xmm" ] }, emit => '. pcmpeqb %D0, %D0', latency => 3, @@ -1747,7 +1727,7 @@ xAllOnes => { # integer shift left, dword xPslld => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "xmm", "xmm" ], out => [ "in_r1 !in_r2" ] }, emit => '. pslld %SI1, %D0', latency => 3, @@ -1757,7 +1737,7 @@ xPslld => { # integer shift left, qword xPsllq => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "xmm", "xmm" ], out => [ "in_r1 !in_r2" ] }, emit => '. psllq %SI1, %D0', latency => 3, @@ -1767,7 +1747,7 @@ xPsllq => { # integer shift right, dword xPsrld => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "xmm", "xmm" ], out => [ "in_r1 !in_r2" ] }, emit => '. psrld %SI1, %D0', latency => 1, @@ -1777,7 +1757,7 @@ xPsrld => { # mov from integer to SSE register xMovd => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "gp" ], out => [ "xmm" ] }, emit => '. movd %S0, %D0', latency => 1, @@ -1786,7 +1766,7 @@ xMovd => { }, xAdd => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5", "flags", "none" ] }, @@ -1800,7 +1780,7 @@ xAdd => { }, xMul => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5", "flags", "none" ] }, @@ -1814,7 +1794,7 @@ xMul => { }, xMax => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5", "flags", "none" ] }, @@ -1828,7 +1808,7 @@ xMax => { }, xMin => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5", "flags", "none" ] }, @@ -1842,7 +1822,7 @@ xMin => { }, xAnd => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5", "flags", "none" ] }, @@ -1856,7 +1836,7 @@ xAnd => { }, xOr => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5", "flags", "none" ] }, @@ -1870,7 +1850,7 @@ xOr => { }, xXor => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 in_r5", "flags", "none" ] }, @@ -1884,7 +1864,7 @@ xXor => { }, xAndNot => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 !in_r5", "flags", "none" ] }, @@ -1898,7 +1878,7 @@ xAndNot => { }, xSub => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4", "flags", "none" ] }, @@ -1912,7 +1892,7 @@ xSub => { }, xDiv => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "in_r4 !in_r5", "flags", "none" ] }, @@ -1925,7 +1905,7 @@ xDiv => { }, Ucomi => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ], out => [ "eflags" ] }, @@ -1942,7 +1922,7 @@ Ucomi => { }, xLoad => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none", "none", "none" ] }, @@ -1956,7 +1936,7 @@ xLoad => { }, xStore => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "xmm" ], out => [ "none", "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -1968,7 +1948,7 @@ xStore => { }, xStoreSimple => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "xmm" ], out => [ "none" ] }, ins => [ "base", "index", "mem", "val" ], @@ -1980,7 +1960,7 @@ xStoreSimple => { }, CvtSI2SS => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm" ] }, ins => [ "base", "index", "mem", "val" ], @@ -1992,7 +1972,7 @@ CvtSI2SS => { }, CvtSI2SD => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm" ] }, ins => [ "base", "index", "mem", "val" ], @@ -2005,14 +1985,14 @@ CvtSI2SD => { l_LLtoFloat => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], cmp_attr => "return 1;", ins => [ "val_high", "val_low" ], reg_req => { in => [ "none", "none" ], out => [ "none" ] } }, l_FloattoLL => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], cmp_attr => "return 1;", ins => [ "val" ], outs => [ "res_high", "res_low" ], @@ -2020,7 +2000,7 @@ l_FloattoLL => { }, CopyB => { - op_flags => "F|H", + op_flags => [ "fragile" ], state => "pinned", reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] }, outs => [ "DST", "SRC", "CNT", "M" ], @@ -2033,7 +2013,7 @@ CopyB => { }, CopyB_i => { - op_flags => "F|H", + op_flags => [ "fragile" ], state => "pinned", reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] }, outs => [ "DST", "SRC", "M" ], @@ -2118,7 +2098,7 @@ Conv_FP2FP => { # handler runs before spilling and we might end up with wrong fpcw then vfadd => { -# irn_flags => "R", +# irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp", "none", "none" ] }, @@ -2132,7 +2112,7 @@ vfadd => { }, vfmul => { -# irn_flags => "R", +# irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp", "none", "none" ] }, @@ -2146,7 +2126,7 @@ vfmul => { }, vfsub => { -# irn_flags => "R", +# irn_flags => [ "rematerializable" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp", "none", "none" ] }, @@ -2181,7 +2161,7 @@ vfprem => { }, vfabs => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "vfp"], out => [ "vfp" ] }, ins => [ "value" ], latency => 2, @@ -2191,7 +2171,7 @@ vfabs => { }, vfchs => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "vfp"], out => [ "vfp" ] }, ins => [ "value" ], latency => 2, @@ -2201,8 +2181,8 @@ vfchs => { }, vfld => { - irn_flags => "R", - op_flags => "L|F", + irn_flags => [ "rematerializable" ], + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none", "none", "none" ] }, @@ -2216,8 +2196,8 @@ vfld => { }, vfst => { - irn_flags => "R", - op_flags => "L|F", + irn_flags => [ "rematerializable" ], + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "vfp" ], out => [ "none", "none" ] }, @@ -2265,7 +2245,7 @@ vfisttp => { }, vfldz => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, outs => [ "res" ], latency => 4, @@ -2275,7 +2255,7 @@ vfldz => { }, vfld1 => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, outs => [ "res" ], latency => 4, @@ -2285,7 +2265,7 @@ vfld1 => { }, vfldpi => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, outs => [ "res" ], latency => 4, @@ -2295,7 +2275,7 @@ vfldpi => { }, vfldln2 => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, outs => [ "res" ], latency => 4, @@ -2305,7 +2285,7 @@ vfldln2 => { }, vfldlg2 => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, outs => [ "res" ], latency => 4, @@ -2315,7 +2295,7 @@ vfldlg2 => { }, vfldl2t => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, outs => [ "res" ], latency => 4, @@ -2325,7 +2305,7 @@ vfldl2t => { }, vfldl2e => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, outs => [ "res" ], latency => 4, @@ -2337,7 +2317,7 @@ vfldl2e => { vFucomFnstsw => { # we can't allow to rematerialize this node so we don't # accidently produce Phi(Fucom, Fucom(ins_permuted)) -# irn_flags => "R", +# irn_flags => [ "rematerializable" ], reg_req => { in => [ "vfp", "vfp" ], out => [ "eax" ] }, ins => [ "left", "right" ], outs => [ "flags" ], @@ -2350,7 +2330,7 @@ vFucomFnstsw => { }, vFucomi => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "vfp", "vfp" ], out => [ "eflags" ] }, ins => [ "left", "right" ], outs => [ "flags" ], @@ -2363,7 +2343,7 @@ vFucomi => { }, vFtstFnstsw => { -# irn_flags => "R", +# irn_flags => [ "rematerializable" ], reg_req => { in => [ "vfp" ], out => [ "eax" ] }, ins => [ "left" ], outs => [ "flags" ], @@ -2376,7 +2356,7 @@ vFtstFnstsw => { }, Sahf => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], reg_req => { in => [ "eax" ], out => [ "eflags" ] }, ins => [ "val" ], outs => [ "flags" ], @@ -2440,7 +2420,7 @@ fsubp => { fsubr => { state => "exc_pinned", - irn_flags => "R", + irn_flags => [ "rematerializable" ], emit => '. fsubr%XM %x87_binop', latency => 4, attr_type => "ia32_x87_attr_t", @@ -2449,7 +2429,7 @@ fsubr => { fsubrp => { state => "exc_pinned", - irn_flags => "R", + irn_flags => [ "rematerializable" ], # see note about gas bugs before fsubp emit => '. fsubp%XM %x87_binop', latency => 4, @@ -2516,7 +2496,8 @@ fabs => { }, fchs => { - op_flags => "R|K", + op_flags => [ "keep" ], + irn_flags => [ "rematerializable" ], emit => '. fchs', latency => 4, attr_type => "ia32_x87_attr_t", @@ -2524,7 +2505,8 @@ fchs => { }, fld => { - op_flags => "R|L|F", + irn_flags => [ "rematerializable" ], + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", emit => '. fld%XM %AM', attr_type => "ia32_x87_attr_t", @@ -2533,7 +2515,8 @@ fld => { }, fst => { - op_flags => "R|L|F", + irn_flags => [ "rematerializable" ], + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", emit => '. fst%XM %AM', mode => "mode_M", @@ -2543,7 +2526,8 @@ fst => { }, fstp => { - op_flags => "R|L|F", + irn_flags => [ "rematerializable" ], + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", emit => '. fstp%XM %AM', mode => "mode_M", @@ -2589,8 +2573,8 @@ fisttp => { }, fldz => { - op_flags => "R|c|K", - irn_flags => "R", + op_flags => [ "constlike", "keep" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, emit => '. fldz', attr_type => "ia32_x87_attr_t", @@ -2598,8 +2582,8 @@ fldz => { }, fld1 => { - op_flags => "R|c|K", - irn_flags => "R", + op_flags => [ "constlike", "keep" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, emit => '. fld1', attr_type => "ia32_x87_attr_t", @@ -2607,8 +2591,8 @@ fld1 => { }, fldpi => { - op_flags => "R|c|K", - irn_flags => "R", + op_flags => [ "constlike", "keep" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, emit => '. fldpi', attr_type => "ia32_x87_attr_t", @@ -2616,8 +2600,8 @@ fldpi => { }, fldln2 => { - op_flags => "R|c|K", - irn_flags => "R", + op_flags => [ "constlike", "keep" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, emit => '. fldln2', attr_type => "ia32_x87_attr_t", @@ -2625,8 +2609,8 @@ fldln2 => { }, fldlg2 => { - op_flags => "R|c|K", - irn_flags => "R", + op_flags => [ "constlike", "keep" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, emit => '. fldlg2', attr_type => "ia32_x87_attr_t", @@ -2634,8 +2618,8 @@ fldlg2 => { }, fldl2t => { - op_flags => "R|c|K", - irn_flags => "R", + op_flags => [ "constlike", "keep" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, emit => '. fldll2t', attr_type => "ia32_x87_attr_t", @@ -2643,8 +2627,8 @@ fldl2t => { }, fldl2e => { - op_flags => "R|c|K", - irn_flags => "R", + op_flags => [ "constlike", "keep" ], + irn_flags => [ "rematerializable" ], reg_req => { out => [ "vfp" ] }, emit => '. fldl2e', attr_type => "ia32_x87_attr_t", @@ -2656,7 +2640,7 @@ fldl2e => { # Moreover, note the virtual register requierements! fxch => { - op_flags => "R|K", + op_flags => [ "keep" ], reg_req => { out => [ "none" ] }, cmp_attr => "return 1;", emit => '. fxch %X0', @@ -2666,7 +2650,7 @@ fxch => { }, fpush => { - op_flags => "R|K", + op_flags => [ "keep" ], reg_req => { out => [ "none" ] }, cmp_attr => "return 1;", emit => '. fld %X0', @@ -2684,7 +2668,7 @@ fpushCopy => { }, fpop => { - op_flags => "K", + op_flags => [ "keep" ], reg_req => { out => [ "none" ] }, cmp_attr => "return 1;", emit => '. fstp %X0', @@ -2694,7 +2678,7 @@ fpop => { }, ffreep => { - op_flags => "K", + op_flags => [ "keep" ], reg_req => { out => [ "none" ] }, cmp_attr => "return 1;", emit => '. ffreep %X0', @@ -2704,7 +2688,7 @@ ffreep => { }, emms => { - op_flags => "K", + op_flags => [ "keep" ], reg_req => { out => [ "none" ] }, cmp_attr => "return 1;", emit => '. emms', @@ -2714,7 +2698,7 @@ emms => { }, femms => { - op_flags => "K", + op_flags => [ "keep" ], reg_req => { out => [ "none" ] }, cmp_attr => "return 1;", emit => '. femms', @@ -2772,7 +2756,7 @@ FtstFnstsw => { # Spilling and reloading of SSE registers, hardcoded, not generated # xxLoad => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] }, emit => '. movdqu %D0, %AM', @@ -2782,7 +2766,7 @@ xxLoad => { }, xxStore => { - op_flags => "L|F", + op_flags => [ "fragile", "labeled" ], state => "exc_pinned", reg_req => { in => [ "gp", "gp", "none", "xmm" ] }, ins => [ "base", "index", "mem", "val" ], diff --git a/ir/be/scripts/generate_new_opcodes.pl b/ir/be/scripts/generate_new_opcodes.pl index ef7f262ae..67f19a478 100755 --- a/ir/be/scripts/generate_new_opcodes.pl +++ b/ir/be/scripts/generate_new_opcodes.pl @@ -407,18 +407,15 @@ EOF # set flags if (exists($n->{"irn_flags"})) { $temp .= "\t/* flags */\n"; - foreach my $flag (split(/\|/, $n->{"irn_flags"})) { - if ($flag eq "R") { - $temp .= "\tflags |= arch_irn_flags_rematerializable;\n"; - } elsif ($flag eq "N") { - $temp .= "\tflags |= arch_irn_flags_dont_spill;\n"; - } elsif ($flag eq "F") { - $temp .= "\tflags |= arch_irn_flags_modify_flags;\n"; - } elsif ($flag eq "J") { - $temp .= "\t flags |= arch_irn_flags_simple_jump;\n"; - } else { - die "Fatal error: unknown flag $flag for ${op}\n"; + my %known_irn_flags = map { $_ => 1 } ( + "none", "dont_spill", "rematerializable", + "modify_flags", "simple_jump" + ); + foreach my $flag (@{$n->{"irn_flags"}}) { + if (not defined($known_irn_flags{$flag})) { + print STDERR "WARNING: irn_flag '$flag' in opcode $op is unknown\n"; } + $temp .= "\tflags |= arch_irn_flags_$flag;\n"; } $temp .= "\n"; } @@ -637,7 +634,7 @@ EOF # set default values for state and flags if not given $n{"state"} = "floats" if (! exists($n{"state"})); - $n{"op_flags"} = "N" if (! exists($n{"op_flags"})); + $n{"op_flags"} = ["none"] if (! exists($n{"op_flags"})); push(@obst_new_irop, "\n\tmemset(&ops, 0, sizeof(ops));\n"); push(@obst_new_irop, "\tops.be_ops = be_ops;\n"); @@ -657,9 +654,23 @@ EOF push(@obst_new_irop, "\tops.hash = ${hash_func};\n"); } + my %known_flags = map { $_ => 1 } ( + "none", "labeled", "commutative", "cfopcode", "op_cfopcode", + "fragile", "forking", "highlevel", "constlike", "always_opt", + "keep", "start_block", "uses_memory", "dump_noblock", + "dump_noinput", "machine", "machine_op", "cse_neutral" + ); + foreach my $flag (@{$n{"op_flags"}}) { + if (not defined($known_flags{$flag})) { + print STDERR "WARNING: Flag '$flag' in opcode $op is unknown\n"; + } + } + my @mapped = map { "irop_flag_$_" } @{$n{"op_flags"}}; + my $op_flags = join('|', @mapped); + $n_opcodes++; - $temp = "\top_$op = new_ir_op(cur_opcode + iro_$op, \"$op\", op_pin_state_".$n{"state"}.", ".$n{"op_flags"}; - $temp .= "|M, ".translate_arity($arity).", 0, sizeof(${attr_type}), &ops);\n"; + $temp = "\top_$op = new_ir_op(cur_opcode + iro_$op, \"$op\", op_pin_state_".$n{"state"}.", $op_flags"; + $temp .= "|irop_flag_machine, ".translate_arity($arity).", 0, sizeof(${attr_type}), &ops);\n"; push(@obst_new_irop, $temp); push(@obst_new_irop, "\tset_op_tag(op_$op, $arch\_op_tag);\n"); if(defined($default_op_attr_type)) { diff --git a/ir/be/sparc/sparc_spec.pl b/ir/be/sparc/sparc_spec.pl index 8bc50af86..68577d316 100644 --- a/ir/be/sparc/sparc_spec.pl +++ b/ir/be/sparc/sparc_spec.pl @@ -41,25 +41,6 @@ $mode_fp = "mode_D"; # # ); # close the %nodes initializer -# op_flags: flags for the operation, OPTIONAL (default is "N") -# the op_flags correspond to the firm irop_flags: -# N irop_flag_none -# L irop_flag_labeled -# C irop_flag_commutative -# X irop_flag_cfopcode -# I irop_flag_ip_cfopcode -# F irop_flag_fragile -# Y irop_flag_forking -# H irop_flag_highlevel -# c irop_flag_constlike -# K irop_flag_keep -# -# irn_flags: special node flags, OPTIONAL (default is 0) -# following irn_flags are supported: -# R rematerializeable -# N not spillable -# I ignore for register allocation -# # state: state of the operation, OPTIONAL (default is "floats") # # arity: arity of the operation, MUST NOT BE OMITTED @@ -223,17 +204,6 @@ $mode_fp = "mode_D"; O => "${arch}_emit_offset(node);", ); -#--------------------------------------------------# -# _ # -# (_) # -# _ __ _____ __ _ _ __ ___ _ __ ___ # -# | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| # -# | | | | __/\ V V / | | | | (_) | |_) \__ \ # -# |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ # -# | | # -# |_| # -#--------------------------------------------------# - $default_attr_type = "sparc_attr_t"; $default_copy_attr = "sparc_copy_attr"; @@ -308,21 +278,8 @@ my %binop_operand_constructors = ( %nodes = ( -#-----------------------------------------------------------------# -# _ _ _ # -# (_) | | | | # -# _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ # -# | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| # -# | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ # -# |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ # -# __/ | # -# |___/ # -#-----------------------------------------------------------------# - -# commutative operations - Add => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], comment => "construct Add: Add(a, b) = Add(b, a) = a + b", mode => $mode_gp, emit => '. add %S1, %R2I, %D1', @@ -330,7 +287,7 @@ Add => { }, Sub => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], comment => "construct Sub: Sub(a, b) = a - b", mode => $mode_gp, reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, @@ -341,7 +298,7 @@ Sub => { # Load / Store Load => { - op_flags => "L|F", + op_flags => [ "labeled", "fragile" ], comment => "construct Load: Load(ptr, mem) = LD ptr -> reg", state => "exc_pinned", ins => [ "ptr", "mem" ], @@ -353,7 +310,7 @@ Load => { }, LoadHi => { - op_flags => "L|F", + op_flags => [ "labeled", "fragile" ], comment => "construct LoadHi: Load(ptr, mem) = sethi hi(ptr) -> reg", state => "exc_pinned", ins => [ "ptr", "mem" ], @@ -365,7 +322,7 @@ LoadHi => { }, HiImm => { - op_flags => "R", + irn_flags => [ "rematerializable" ], comment => "construct LoadHi: Load(imm, mem) = sethi hi(imm) -> reg", state => "exc_pinned", outs => [ "res" ], @@ -378,7 +335,7 @@ HiImm => { }, LoImm => { - op_flags => "R", + irn_flags => [ "rematerializable" ], comment => "construct LoadHi: Load(imm, mem) = sethi hi(imm) -> reg", state => "exc_pinned", ins => [ "hireg" ], @@ -392,7 +349,7 @@ LoImm => { }, LoadLo => { - op_flags => "L|F", + op_flags => [ "labeled", "fragile" ], comment => "construct LoadLo: Or(in, ptr, mem) = or in lo(ptr) -> reg", state => "exc_pinned", ins => [ "hireg", "ptr", "mem" ], @@ -404,7 +361,7 @@ LoadLo => { }, Store => { - op_flags => "L|F", + op_flags => [ "labeled", "fragile" ], comment => "construct Store: Store(ptr, val, mem) = ST ptr,val", mode => "mode_M", state => "exc_pinned", @@ -417,7 +374,7 @@ Store => { }, Mov => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], comment => "construct Mov: Mov(src, dest) = MV src,dest", arity => "variable", emit => '. mov %R1I, %D1', @@ -455,8 +412,8 @@ SubSP => { }, SymConst => { - op_flags => "c", - irn_flags => "R", + op_flags => [ "constlike" ], + irn_flags => [ "rematerializable" ], attr => "ir_entity *entity", reg_req => { out => [ "gp" ] }, attr_type => "sparc_symconst_attr_t", @@ -464,8 +421,8 @@ SymConst => { }, FrameAddr => { - op_flags => "c", - irn_flags => "R", + op_flags => [ "constlike" ], + irn_flags => [ "rematerializable" ], attr => "ir_entity *entity", reg_req => { in => [ "gp" ], out => [ "gp" ] }, ins => [ "base" ], @@ -474,7 +431,7 @@ FrameAddr => { }, Branch => { - op_flags => "L|X|Y", + op_flags => [ "labeled", "cfopcode", "forking" ], state => "pinned", mode => "mode_T", reg_req => { in => [ "flags" ], out => [ "none", "none" ] }, @@ -485,14 +442,14 @@ Branch => { Jmp => { state => "pinned", - op_flags => "X", - irn_flags => "J", + op_flags => [ "cfopcode" ], + irn_flags => [ "simple_jump" ], reg_req => { out => [ "none" ] }, mode => "mode_X", }, Cmp => { - irn_flags => "R|F", + irn_flags => [ "rematerializable", "modify_flags" ], emit => '. cmp %S1, %R2I', mode => $mode_flags, attr_type => "sparc_cmp_attr_t", @@ -500,7 +457,7 @@ Cmp => { }, Tst => { - irn_flags => "R|F", + irn_flags => [ "rematerializable", "modify_flags" ], emit => '. tst %S1', mode => $mode_flags, attr_type => "sparc_cmp_attr_t", @@ -511,7 +468,7 @@ Tst => { }, SwitchJmp => { - op_flags => "L|X|Y", + op_flags => [ "labeled", "cfopcode", "forking" ], state => "pinned", mode => "mode_T", attr => "int n_projs, long def_proj_num", @@ -522,7 +479,7 @@ SwitchJmp => { }, ShiftLL => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], comment => "construct shift logical left", mode => $mode_gp, reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, @@ -531,7 +488,7 @@ ShiftLL => { }, ShiftLR => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], comment => "construct shift logical right", mode => $mode_gp, reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, @@ -540,7 +497,7 @@ ShiftLR => { }, ShiftRA => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], comment => "construct shift right arithmetical", mode => $mode_gp, reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, @@ -549,7 +506,7 @@ ShiftRA => { }, And => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], comment => "construct logical and", mode => $mode_gp, reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, @@ -558,7 +515,7 @@ And => { }, Or => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], comment => "construct logical or", mode => $mode_gp, reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, @@ -567,7 +524,7 @@ Or => { }, Xor => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], comment => "construct logical xor", mode => $mode_gp, reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] }, @@ -593,7 +550,7 @@ Mulh => { }, Div => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], state => "exc_pinned", # mode => $mode_gp, comment => "construct Div: Div(a, b) = a / b", @@ -604,7 +561,7 @@ Div => { }, Minus => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], mode => $mode_gp, comment => "construct Minus: Minus(a) = -a", #reg_req => { in => [ "gp" ], out => [ "in_r1" ] }, @@ -613,7 +570,7 @@ Minus => { }, Not => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], mode => $mode_gp, comment => "construct Not: Not(a) = !a", reg_req => { in => [ "gp" ], out => [ "gp" ] }, @@ -621,7 +578,7 @@ Not => { }, Nop => { - op_flags => "K", + op_flags => [ "keep" ], reg_req => { in => [], out => [ "none" ] }, emit => '. nop', }, @@ -758,75 +715,65 @@ Nop => { # emit => '. not %S1, %D1' #}, - -#--------------------------------------------------------# -# __ _ _ _ # -# / _| | | | | | # -# | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ # -# | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| # -# | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ # -# |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ # -#--------------------------------------------------------# - fAdd => { - op_flags => "C", - irn_flags => "R", + op_flags => [ "commutative" ], + irn_flags => [ "rematerializable" ], comment => "construct FP Add: Add(a, b) = Add(b, a) = a + b", reg_req => { in => [ "fp", "fp" ], out => [ "fp" ] }, emit => '. fadd%FPM %S1, %S2, %D1' }, fMul => { - op_flags => "C", + op_flags => [ "commutative" ], comment => "construct FP Mul: Mul(a, b) = Mul(b, a) = a * b", reg_req => { in => [ "fp", "fp" ], out => [ "fp" ] }, emit =>'. fmul%FPM %S1, %S2, %D1' }, fsMuld => { - op_flags => "C", + op_flags => [ "commutative" ], comment => "construct FP single to double precision Mul: Mul(a, b) = Mul(b, a) = a * b", reg_req => { in => [ "fp", "fp" ], out => [ "fp" ] }, emit =>'. fsmuld %S1, %S2, %D1' }, FpSToFpD => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], comment => "convert FP (single) to FP (double)", reg_req => { in => [ "fp" ], out => [ "fp" ] }, emit =>'. FsTOd %S1, %D1' }, FpDToFpS => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], comment => "convert FP (double) to FP (single)", reg_req => { in => [ "fp" ], out => [ "fp" ] }, emit =>'. FdTOs %S1, %D1' }, FpSToInt => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], comment => "convert integer to FP", reg_req => { in => [ "fp" ], out => [ "gp" ] }, emit =>'. FiTOs %S1, %D1' }, FpDToInt => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], comment => "convert integer to FP", reg_req => { in => [ "fp" ], out => [ "gp" ] }, emit =>'. FiTOd %S1, %D1' }, IntToFpS => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], comment => "convert FP (single) to integer", reg_req => { in => [ "gp" ], out => [ "fp" ] }, emit =>'. FsTOi %S1, %D1' }, IntToFpD => { - irn_flags => "R", + irn_flags => [ "rematerializable" ], comment => "convert FP (double) to integer", reg_req => { in => [ "gp" ], out => [ "fp" ] }, emit =>'. FdTOi %S1, %D1' @@ -890,7 +837,7 @@ IntToFpD => { ## Load / Store # #fLoad => { -# op_flags => "L|F", +# op_flags => [ "labeled", "fragile" ], # irn_flags => "R", # state => "exc_pinned", # comment => "construct FP Load: Load(ptr, mem) = LD ptr", @@ -899,7 +846,7 @@ IntToFpD => { #}, # #fStore => { -# op_flags => "L|F", +# op_flags => [ "labeled", "fragile" ], # irn_flags => "R", # state => "exc_pinned", # comment => "construct Store: Store(ptr, val, mem) = ST ptr,val", diff --git a/ir/tr/entity_t.h b/ir/tr/entity_t.h index 5b3f3a88b..df3811bba 100644 --- a/ir/tr/entity_t.h +++ b/ir/tr/entity_t.h @@ -338,7 +338,6 @@ static inline void _set_entity_link(ir_entity *ent, void *l) static inline ir_graph *_get_entity_irg(const ir_entity *ent) { - ir_graph *irg; assert(ent && ent->kind == k_entity); if (!is_Method_type(ent->type) || ent == unknown_entity) { return NULL; -- 2.20.1