From 205396c4f4f5abe7abd6dc2350c8c398a7623afc Mon Sep 17 00:00:00 2001 From: Matthias Braun Date: Wed, 18 Apr 2007 11:41:51 +0000 Subject: [PATCH] - Split bearch.h correctly into bearch.h and bearch_t.h - Started working on flags [r12716] --- ir/be/TEMPLATE/TEMPLATE_emitter.h | 2 +- ir/be/TEMPLATE/TEMPLATE_map_regs.h | 2 +- ir/be/TEMPLATE/TEMPLATE_new_nodes.c | 2 +- ir/be/TEMPLATE/TEMPLATE_nodes_attr.h | 2 +- ir/be/TEMPLATE/bearch_TEMPLATE.c | 11 +- ir/be/TEMPLATE/bearch_TEMPLATE.h | 2 +- ir/be/arm/arm_emitter.c | 1 + ir/be/arm/arm_emitter.h | 2 +- ir/be/arm/arm_map_regs.h | 2 +- ir/be/arm/arm_new_nodes.c | 2 +- ir/be/arm/arm_nodes_attr.h | 2 +- ir/be/arm/bearch_arm.c | 3 +- ir/be/arm/bearch_arm.h | 2 +- ir/be/be.h | 4 +- ir/be/be_t.h | 30 +- ir/be/beabi.c | 4 +- ir/be/beabi.h | 7 +- ir/be/bearch.c | 2 +- ir/be/bearch.h | 576 ++------------------------ ir/be/bearch_t.h | 21 - ir/be/bechordal.c | 10 +- ir/be/bechordal.h | 4 +- ir/be/bechordal_draw.h | 2 +- ir/be/bechordal_main.c | 5 +- ir/be/bechordal_t.h | 47 ++- ir/be/becopyopt.c | 4 +- ir/be/becopyopt_t.h | 2 +- ir/be/becopystat.h | 2 +- ir/be/beilpsched.c | 19 +- ir/be/beinsn.c | 7 +- ir/be/beinsn_t.h | 2 +- ir/be/beirg.c | 25 ++ ir/be/beirg.h | 8 +- ir/be/beirg_t.h | 26 +- ir/be/beirgmod.c | 2 +- ir/be/belistsched.c | 3 +- ir/be/belive.h | 7 +- ir/be/beloopana.c | 28 +- ir/be/beloopana.h | 2 +- ir/be/belower.c | 42 +- ir/be/bemain.c | 4 +- ir/be/benode_t.h | 2 +- ir/be/bepressurestat.c | 2 +- ir/be/beprofile.c | 2 +- ir/be/beraextern.c | 2 +- ir/be/besched.c | 2 +- ir/be/beschedmris.c | 14 +- ir/be/beschedrss.c | 14 +- ir/be/bespill.h | 2 +- ir/be/bespillbelady.c | 2 +- ir/be/bespillbelady.h | 2 +- ir/be/bespillloc.c | 2 +- ir/be/bespillremat.c | 3 +- ir/be/bessadestr.c | 2 +- ir/be/bessadestrsimple.c | 2 +- ir/be/bestat.c | 11 +- ir/be/bestate.c | 4 +- ir/be/bestate.h | 2 +- ir/be/beuses.c | 2 +- ir/be/beuses.h | 2 +- ir/be/beutil.c | 2 +- ir/be/beutil.h | 2 +- ir/be/beverify.c | 5 +- ir/be/firm/bearch_firm.c | 4 +- ir/be/firm/bearch_firm.h | 2 +- ir/be/ia32/bearch_ia32.c | 11 +- ir/be/ia32/ia32_emitter.c | 24 +- ir/be/ia32/ia32_emitter.h | 2 +- ir/be/ia32/ia32_finish.c | 2 +- ir/be/ia32/ia32_fpu.c | 5 +- ir/be/ia32/ia32_map_regs.h | 2 +- ir/be/ia32/ia32_new_nodes.c | 2 +- ir/be/ia32/ia32_nodes_attr.h | 5 +- ir/be/ia32/ia32_spec.pl | 203 +++++++-- ir/be/ia32/ia32_transform.c | 139 ++++--- ir/be/ia32/ia32_x87.c | 4 +- ir/be/ia32/ia32_x87.h | 2 +- ir/be/mips/bearch_mips.c | 9 +- ir/be/mips/bearch_mips.h | 2 +- ir/be/mips/mips_emitter.h | 2 +- ir/be/mips/mips_map_regs.h | 2 +- ir/be/mips/mips_new_nodes.c | 2 +- ir/be/mips/mips_nodes_attr.h | 2 +- ir/be/mips/mips_transform.c | 1 + ir/be/ppc32/bearch_ppc32.c | 3 +- ir/be/ppc32/bearch_ppc32.h | 2 +- ir/be/ppc32/ppc32_emitter.h | 2 +- ir/be/ppc32/ppc32_map_regs.h | 2 +- ir/be/ppc32/ppc32_new_nodes.c | 2 +- ir/be/ppc32/ppc32_nodes_attr.h | 2 +- ir/be/scripts/generate_emitter.pl | 12 +- ir/be/scripts/generate_machine.pl | 6 +- ir/be/scripts/generate_new_opcodes.pl | 6 +- ir/be/scripts/generate_regalloc_if.pl | 6 +- ir/be/test/langshootout/recursive.c | 9 +- 95 files changed, 572 insertions(+), 920 deletions(-) delete mode 100644 ir/be/bearch_t.h diff --git a/ir/be/TEMPLATE/TEMPLATE_emitter.h b/ir/be/TEMPLATE/TEMPLATE_emitter.h index c30354c02..2edde1988 100644 --- a/ir/be/TEMPLATE/TEMPLATE_emitter.h +++ b/ir/be/TEMPLATE/TEMPLATE_emitter.h @@ -5,7 +5,7 @@ #include "irnode.h" #include "debug.h" -#include "../bearch.h" +#include "../bearch_t.h" #include "../beemitter.h" #include "bearch_TEMPLATE_t.h" diff --git a/ir/be/TEMPLATE/TEMPLATE_map_regs.h b/ir/be/TEMPLATE/TEMPLATE_map_regs.h index 035ad41ba..e3835808a 100644 --- a/ir/be/TEMPLATE/TEMPLATE_map_regs.h +++ b/ir/be/TEMPLATE/TEMPLATE_map_regs.h @@ -4,7 +4,7 @@ #include "irnode.h" #include "set.h" -#include "../bearch.h" +#include "../bearch_t.h" #include "TEMPLATE_nodes_attr.h" int TEMPLATE_cmp_irn_reg_assoc(const void *a, const void *b, size_t len); diff --git a/ir/be/TEMPLATE/TEMPLATE_new_nodes.c b/ir/be/TEMPLATE/TEMPLATE_new_nodes.c index bccb99502..591a8aad4 100644 --- a/ir/be/TEMPLATE/TEMPLATE_new_nodes.c +++ b/ir/be/TEMPLATE/TEMPLATE_new_nodes.c @@ -21,7 +21,7 @@ #include "irprintf.h" #include "xmalloc.h" -#include "../bearch.h" +#include "../bearch_t.h" #include "TEMPLATE_nodes_attr.h" #include "TEMPLATE_new_nodes.h" diff --git a/ir/be/TEMPLATE/TEMPLATE_nodes_attr.h b/ir/be/TEMPLATE/TEMPLATE_nodes_attr.h index 805d307f2..fee162146 100644 --- a/ir/be/TEMPLATE/TEMPLATE_nodes_attr.h +++ b/ir/be/TEMPLATE/TEMPLATE_nodes_attr.h @@ -1,7 +1,7 @@ #ifndef _TEMPLATE_NODES_ATTR_H_ #define _TEMPLATE_NODES_ATTR_H_ -#include "../bearch.h" +#include "../bearch_t.h" typedef struct _TEMPLATE_attr_t { arch_irn_flags_t flags; /**< indicating if spillable, rematerializeable ... etc. */ diff --git a/ir/be/TEMPLATE/bearch_TEMPLATE.c b/ir/be/TEMPLATE/bearch_TEMPLATE.c index d32a4f8bb..9debbbcad 100644 --- a/ir/be/TEMPLATE/bearch_TEMPLATE.c +++ b/ir/be/TEMPLATE/bearch_TEMPLATE.c @@ -14,7 +14,7 @@ #include "bitset.h" #include "debug.h" -#include "../bearch.h" /* the general register allocator interface */ +#include "../bearch_t.h" /* the general register allocator interface */ #include "../benode_t.h" #include "../belower.h" #include "../besched_t.h" @@ -291,13 +291,14 @@ static const arch_code_generator_if_t TEMPLATE_code_gen_if = { * Initializes the code generator. */ static void *TEMPLATE_cg_init(be_irg_t *birg) { - TEMPLATE_isa_t *isa = (TEMPLATE_isa_t *)birg->main_env->arch_env->isa; - TEMPLATE_code_gen_t *cg = xmalloc(sizeof(*cg)); + const arch_env_t *arch_env = be_get_birg_arch_env(birg); + TEMPLATE_isa_t *isa = (TEMPLATE_isa_t *) arch_env->isa; + TEMPLATE_code_gen_t *cg = xmalloc(sizeof(*cg)); cg->impl = &TEMPLATE_code_gen_if; - cg->irg = birg->irg; + cg->irg = be_get_birg_irg(birg); cg->reg_set = new_set(TEMPLATE_cmp_irn_reg_assoc, 1024); - cg->arch_env = birg->main_env->arch_env; + cg->arch_env = arch_env; cg->isa = isa; cg->birg = birg; FIRM_DBG_REGISTER(cg->mod, "firm.be.TEMPLATE.cg"); diff --git a/ir/be/TEMPLATE/bearch_TEMPLATE.h b/ir/be/TEMPLATE/bearch_TEMPLATE.h index 4e9194bbe..b1c027163 100644 --- a/ir/be/TEMPLATE/bearch_TEMPLATE.h +++ b/ir/be/TEMPLATE/bearch_TEMPLATE.h @@ -1,7 +1,7 @@ #ifndef _BEARCH_TEMPLATE_H_ #define _BEARCH_TEMPLATE_H_ -#include "../bearch.h" +#include "../bearch_t.h" extern const arch_isa_if_t TEMPLATE_isa_if; diff --git a/ir/be/arm/arm_emitter.c b/ir/be/arm/arm_emitter.c index 3c5636c62..5b9396336 100644 --- a/ir/be/arm/arm_emitter.c +++ b/ir/be/arm/arm_emitter.c @@ -20,6 +20,7 @@ #include "../besched.h" #include "../beblocksched.h" +#include "../beirg_t.h" #include "arm_emitter.h" #include "gen_arm_emitter.h" diff --git a/ir/be/arm/arm_emitter.h b/ir/be/arm/arm_emitter.h index 8dad6d22b..7109c0769 100644 --- a/ir/be/arm/arm_emitter.h +++ b/ir/be/arm/arm_emitter.h @@ -5,7 +5,7 @@ #include "irargs_t.h" #include "debug.h" -#include "../bearch.h" +#include "../bearch_t.h" #include "bearch_arm_t.h" diff --git a/ir/be/arm/arm_map_regs.h b/ir/be/arm/arm_map_regs.h index 8db86d86d..912efde8a 100644 --- a/ir/be/arm/arm_map_regs.h +++ b/ir/be/arm/arm_map_regs.h @@ -10,7 +10,7 @@ -#include "../bearch.h" +#include "../bearch_t.h" #include "arm_nodes_attr.h" diff --git a/ir/be/arm/arm_new_nodes.c b/ir/be/arm/arm_new_nodes.c index e200dd402..6bb0d1ace 100644 --- a/ir/be/arm/arm_new_nodes.c +++ b/ir/be/arm/arm_new_nodes.c @@ -21,7 +21,7 @@ #include "irprintf.h" #include "xmalloc.h" -#include "../bearch.h" +#include "../bearch_t.h" #include "arm_nodes_attr.h" #include "arm_new_nodes.h" diff --git a/ir/be/arm/arm_nodes_attr.h b/ir/be/arm/arm_nodes_attr.h index 64a751da8..a19e5f536 100644 --- a/ir/be/arm/arm_nodes_attr.h +++ b/ir/be/arm/arm_nodes_attr.h @@ -1,7 +1,7 @@ #ifndef _ARM_NODES_ATTR_H_ #define _ARM_NODES_ATTR_H_ -#include "../bearch.h" +#include "../bearch_t.h" #include "../../common/firm_types.h" /** diff --git a/ir/be/arm/bearch_arm.c b/ir/be/arm/bearch_arm.c index 912b6d226..605786f58 100644 --- a/ir/be/arm/bearch_arm.c +++ b/ir/be/arm/bearch_arm.c @@ -19,7 +19,7 @@ #include "bitset.h" #include "debug.h" -#include "../bearch.h" /* the general register allocator interface */ +#include "../bearch_t.h" /* the general register allocator interface */ #include "../benode_t.h" #include "../belower.h" #include "../besched_t.h" @@ -28,6 +28,7 @@ #include "../bemachine.h" #include "../beilpsched.h" #include "../bemodule.h" +#include "../beirg_t.h" #include "bearch_arm_t.h" diff --git a/ir/be/arm/bearch_arm.h b/ir/be/arm/bearch_arm.h index e87608da5..bd72dc802 100644 --- a/ir/be/arm/bearch_arm.h +++ b/ir/be/arm/bearch_arm.h @@ -1,7 +1,7 @@ #ifndef _BEARCH_ARM_H_ #define _BEARCH_ARM_H_ -#include "../bearch.h" +#include "../bearch_t.h" extern const arch_isa_if_t arm_isa_if; diff --git a/ir/be/be.h b/ir/be/be.h index fdc9b9269..b32376bbc 100644 --- a/ir/be/be.h +++ b/ir/be/be.h @@ -74,7 +74,7 @@ void be_set_debug_retrieve(retrieve_dbg_func func); */ const char *be_retrieve_dbg_info(const dbg_info *dbg, unsigned *line); -typedef struct _be_main_env_t be_main_env_t; -typedef struct _be_options_t be_options_t; +typedef struct be_main_env_t be_main_env_t; +typedef struct be_options_t be_options_t; #endif /* _BE_MAIN_H */ diff --git a/ir/be/be_t.h b/ir/be/be_t.h index 5a17bfe1c..ff6ca443a 100644 --- a/ir/be/be_t.h +++ b/ir/be/be_t.h @@ -4,8 +4,8 @@ * @date 8.12.2004 */ -#ifndef _BE_T_H -#define _BE_T_H +#ifndef FIRM_BE_T_H +#define FIRM_BE_T_H #include "firm_types.h" #include "obst.h" @@ -15,7 +15,7 @@ #include "be.h" #include "bearch.h" #include "be_dbgout.h" -#include "beirg_t.h" +#include "beirg.h" #define DUMP_NONE 0 #define DUMP_INITIAL (1 << 0) @@ -43,7 +43,7 @@ enum { }; /** Backend options */ -struct _be_options_t { +struct be_options_t { unsigned dump_flags; /**< backend dumping flags */ int timing; /**< time the backend phases */ int opt_profile; /**< instrument code for profiling */ @@ -56,14 +56,13 @@ struct _be_options_t { char stat_file_name[256]; /**< name of the file where the statistics are put to */ }; -struct _be_main_env_t { - struct obstack obst; - struct _arch_env_t *arch_env; - struct _be_options_t *options; - struct _arch_code_generator_t *cg; - struct _arch_irn_handler_t *phi_handler; - dbg_handle *db_handle; - DEBUG_ONLY(firm_dbg_module_t *dbg;) +struct be_main_env_t { + struct obstack obst; + arch_env_t *arch_env; + be_options_t *options; + arch_code_generator_t *cg; + arch_irn_handler_t *phi_handler; + dbg_handle *db_handle; }; /** @@ -73,8 +72,7 @@ struct _be_main_env_t { * @param bs The bitset (may be NULL). * @return The number of registers to be ignored. */ -int be_put_ignore_regs(const struct _be_irg_t *birg, const struct _arch_register_class_t *cls, bitset_t *bs); +int be_put_ignore_regs(const be_irg_t *birg, const arch_register_class_t *cls, + bitset_t *bs); - - -#endif /* _BE_T_H */ +#endif diff --git a/ir/be/beabi.c b/ir/be/beabi.c index e15a137bb..0f62ac708 100644 --- a/ir/be/beabi.c +++ b/ir/be/beabi.c @@ -31,11 +31,11 @@ #include "be.h" #include "beabi.h" -#include "bearch.h" +#include "bearch_t.h" #include "benode_t.h" #include "belive_t.h" #include "besched_t.h" -#include "beirg.h" +#include "beirg_t.h" #include "bessaconstr.h" typedef struct _be_abi_call_arg_t { diff --git a/ir/be/beabi.h b/ir/be/beabi.h index e5b23ee27..90de69617 100644 --- a/ir/be/beabi.h +++ b/ir/be/beabi.h @@ -1,10 +1,8 @@ - /** * Backend ABI implementation. */ - -#ifndef _BEABI_H -#define _BEABI_H +#ifndef FIRM_BEABI_H +#define FIRM_BEABI_H #include "firm_types.h" @@ -13,6 +11,7 @@ #include "bitset.h" #include "be.h" +#include "beirg.h" #include "bearch.h" #include "beabi_t.h" diff --git a/ir/be/bearch.c b/ir/be/bearch.c index 8a104eb5a..c8f0fa8a5 100644 --- a/ir/be/bearch.c +++ b/ir/be/bearch.c @@ -11,7 +11,7 @@ #include -#include "bearch.h" +#include "bearch_t.h" #include "ircons_t.h" #include "irnode_t.h" #include "xmalloc.h" diff --git a/ir/be/bearch.h b/ir/be/bearch.h index 0ad550364..a041ebce5 100644 --- a/ir/be/bearch.h +++ b/ir/be/bearch.h @@ -1,21 +1,25 @@ -#ifndef _FIRM_BEARCH_H -#define _FIRM_BEARCH_H - -#include "firm_config.h" +#ifndef FIRM_BEARCH_H +#define FIRM_BEARCH_H #include "firm_types.h" - #include "bitset.h" - -#include "belistsched.h" -#include "beilpsched.h" -#include "beabi_t.h" -#include "bearch_t.h" -#include "be_t.h" -#include "bemachine.h" -#include "beirg.h" - -typedef enum _arch_register_type_t { +#include "be.h" + +typedef struct arch_register_class_t arch_register_class_t; +typedef struct arch_register_req_t arch_register_req_t; +typedef struct arch_register_t arch_register_t; +typedef struct arch_flag_t arch_flag_t; +typedef struct arch_inverse_t arch_inverse_t; +typedef struct arch_isa_if_t arch_isa_if_t; +typedef struct arch_isa_t arch_isa_t; +typedef struct arch_env_t arch_env_t; +typedef struct arch_irn_ops_if_t arch_irn_ops_if_t; +typedef struct arch_irn_ops_t arch_irn_ops_t; +typedef struct arch_irn_handler_t arch_irn_handler_t; +typedef struct arch_code_generator_t arch_code_generator_t; +typedef struct arch_code_generator_if_t arch_code_generator_if_t; + +typedef enum arch_register_type_t { arch_register_type_none = 0, arch_register_type_caller_save = 1, /**< The register must be saved by the caller upon a function call. It thus can be overwritten @@ -29,66 +33,6 @@ typedef enum _arch_register_type_t { arch_register_type_state = 32, } arch_register_type_t; -/** - * Convenience macro to check for register type. - * @param req A pointer to register. - * @param kind The kind of type to check for (see arch_register_type_t). - * @return 1, If register is of given kind, 0 if not. - */ -#define arch_register_type_is(reg, kind) \ - (((reg)->type & arch_register_type_ ## kind) != 0) - -/** - * A register. - */ -struct _arch_register_t { - const char *name; /**< The name of the register. */ - const arch_register_class_t *reg_class; /**< The class the register belongs to. */ - int index; /**< The index of the register in the class. */ - arch_register_type_t type; /**< The type of the register. */ - void *data; /**< Custom data. */ -}; - -static INLINE const arch_register_class_t * -_arch_register_get_class(const arch_register_t *reg) -{ - return reg->reg_class; -} - -static INLINE int _arch_register_get_index(const arch_register_t *reg) -{ - return reg->index; -} - -static INLINE const char *_arch_register_get_name(const arch_register_t *reg) -{ - return reg->name; -} - -#define arch_register_get_class(reg) _arch_register_get_class(reg) -#define arch_register_get_index(reg) _arch_register_get_index(reg) -#define arch_register_get_name(reg) _arch_register_get_name(reg) - -/** - * A class of registers. - * Like general purpose or floating point. - */ -struct _arch_register_class_t { - const char *name; /**< The name of the register class. */ - int n_regs; /**< Number of registers in this class. */ - ir_mode *mode; /**< The mode of the register class. */ - const arch_register_t *regs; /**< The array of registers. */ -}; - -/** return the number of registers in this register class */ -#define arch_register_class_n_regs(cls) ((cls)->n_regs) - -/** return the largest mode of this register class */ -#define arch_register_class_mode(cls) ((cls)->mode) - -/** return the name of this register class */ -#define arch_register_class_name(cls) ((cls)->name) - /** * Put all registers in a class into a bitset. * @param cls The class. @@ -97,17 +41,7 @@ struct _arch_register_class_t { */ extern int arch_register_class_put(const arch_register_class_t *cls, bitset_t *bs); -static INLINE const arch_register_t * -_arch_register_for_index(const arch_register_class_t *cls, int idx) -{ - assert(0 <= idx && idx < cls->n_regs); - return &cls->regs[idx]; -} - -#define arch_register_for_index(cls, idx) \ - _arch_register_for_index(cls, idx) - -typedef enum _arch_operand_type_t { +typedef enum arch_operand_type_t { arch_operand_type_invalid, arch_operand_type_memory, arch_operand_type_register, @@ -119,7 +53,7 @@ typedef enum _arch_operand_type_t { /** * Different types of register allocation requirements. */ -typedef enum _arch_register_req_type_t { +typedef enum arch_register_req_type_t { arch_register_req_type_none = 0, /**< No register requirement. */ arch_register_req_type_normal = 1, /**< All registers in the class are allowed. */ arch_register_req_type_limited = 2, /**< Only a real subset of the class is allowed. */ @@ -128,31 +62,6 @@ typedef enum _arch_register_req_type_t { arch_register_req_type_should_be_different_from_all = 16, /**< The register must be different from all in's at the node */ } arch_register_req_type_t; -/** - * Convenience macro to check for set constraints. - * @param req A pointer to register requirements. - * @param kind The kind of constraint to check for (see arch_register_req_type_t). - * @return 1, If the kind of constraint is present, 0 if not. - */ -#define arch_register_req_is(req, kind) \ - (((req)->type & (arch_register_req_type_ ## kind)) != 0) - -/** - * Expresses requirements to register allocation for an operand. - */ -typedef struct _arch_register_req_t { - arch_register_req_type_t type; /**< The type of the constraint. */ - const arch_register_class_t *cls; /**< The register class this constraint belongs to. */ - - const unsigned *limited; /**< allowed register bitset */ - - int other_same; /**< The in number which shall have - the same res (should_be_same)*/ - int other_different; /**< The other node from which this - one's register must be different - (case must_be_different). */ -} arch_register_req_t; - extern const arch_register_req_t *arch_no_register_req; /** @@ -164,11 +73,10 @@ extern const arch_register_req_t *arch_no_register_req; */ extern char *arch_register_req_format(char *buf, size_t len, const arch_register_req_t *req, const ir_node *node); - /** * Certain node classes which are relevant for the register allocator. */ -typedef enum _arch_irn_class_t { +typedef enum arch_irn_class_t { arch_irn_class_normal = 1 << 0, arch_irn_class_spill = 1 << 1, arch_irn_class_reload = 1 << 2, @@ -182,23 +90,10 @@ typedef enum _arch_irn_class_t { arch_irn_class_stackparam = 1 << 10, } arch_irn_class_t; -/** - * An inverse operation returned by the backend - */ -typedef struct _arch_inverse_t { - int n; /**< count of nodes returned in nodes array */ - int costs; /**< costs of this remat */ - - /**< nodes for this inverse operation. shall be in - * schedule order. last element is the target value - */ - ir_node **nodes; -} arch_inverse_t; - /** * Some flags describing a node in more detail. */ -typedef enum _arch_irn_flags_t { +typedef enum arch_irn_flags_t { arch_irn_flags_none = 0, /**< Node flags. */ arch_irn_flags_dont_spill = 1, /**< This must not be spilled. */ arch_irn_flags_rematerializable = 2, /**< This can be replicated instead of spilled/reloaded. */ @@ -215,146 +110,8 @@ typedef enum _arch_irn_flags_t { */ extern const char *arch_irn_flag_str(arch_irn_flags_t flag); -struct _arch_irn_ops_if_t { - - /** - * Get the register requirements for a given operand. - * @param self The self pointer. - * @param irn The node. - * @param pos The operand's position - * (-1 for the result of the node, 0..n for the input operands). - * @return The register requirements for the selected operand. - * The pointer returned is never NULL. - */ - const arch_register_req_t *(*get_irn_reg_req)(const void *self, - const ir_node *irn, int pos); - - /** - * Set the register for an output operand. - * @param irn The node. - * @param reg The register allocated to that operand. - * @note If the operand is not a register operand, - * the call is ignored. - */ - void (*set_irn_reg)(const void *self, ir_node *irn, const arch_register_t *reg); - - /** - * Get the register allocated for an output operand. - * @param irn The node. - * @return The register allocated at that operand. NULL, if - * the operand was no register operand or - * @c arch_register_invalid, if no register has yet been - * allocated for this node. - */ - const arch_register_t *(*get_irn_reg)(const void *self, const ir_node *irn); - - /** - * Classify the node. - * @param irn The node. - * @return A classification. - */ - arch_irn_class_t (*classify)(const void *self, const ir_node *irn); - - /** - * Get the flags of a node. - * @param self The irn ops themselves. - * @param irn The node. - * @return A set of flags. - */ - arch_irn_flags_t (*get_flags)(const void *self, const ir_node *irn); - - /** - * Get the entity on the stack frame this node depends on. - * @param self The this pointer. - * @param irn The node in question. - * @return The entity on the stack frame or NULL, if the node does not have a - * stack frame entity. - */ - ir_entity *(*get_frame_entity)(const void *self, const ir_node *irn); - - /** - * Set the entity on the stack frame this node depends on. - * @param self The this pointer. - * @param irn The node in question. - * @param ent The entity to set - */ - void (*set_frame_entity)(const void *self, ir_node *irn, ir_entity *ent); - - /** - * Set the offset of a node carrying an entity on the stack frame. - * @param self The this pointer. - * @param irn The node. - * @param offset The offset of the node's stack frame entity. - */ - void (*set_frame_offset)(const void *self, ir_node *irn, int offset); - - /** - * Returns the delta of the stackpointer for nodes that increment or - * decrement the stackpointer with a constant value. (push, pop - * nodes on most architectures). - * A positive value stands for an expanding stack area, a negative value for - * a shrinking one. - * - * @param self The this pointer - * @param irn The node - * @return 0 if the stackpointer is not modified with a constant - * value, otherwise the increment/decrement value - */ - int (*get_sp_bias)(const void *self, const ir_node *irn); - - /** - * Returns an inverse operation which yields the i-th argument - * of the given node as result. - * - * @param self The this pointer. - * @param irn The original operation - * @param i Index of the argument we want the inverse operation to yield - * @param inverse struct to be filled with the resulting inverse op - * @param obstack The obstack to use for allocation of the returned nodes array - * @return The inverse operation or NULL if operation invertible - */ - arch_inverse_t *(*get_inverse)(const void *self, const ir_node *irn, int i, arch_inverse_t *inverse, struct obstack *obstack); - - /** - * Get the estimated cycle count for @p irn. - * - * @param self The this pointer. - * @param irn The node. - * - * @return The estimated cycle count for this operation - */ - int (*get_op_estimated_cost)(const void *self, const ir_node *irn); - - /** - * Asks the backend whether operand @p i of @p irn can be loaded form memory internally - * - * @param self The this pointer. - * @param irn The node. - * @param i Index of the argument we would like to know whether @p irn can load it form memory internally - * - * @return nonzero if argument can be loaded or zero otherwise - */ - int (*possible_memory_operand)(const void *self, const ir_node *irn, unsigned int i); - - /** - * Ask the backend to assimilate @p reload of operand @p i into @p irn. - * - * @param self The this pointer. - * @param irn The node. - * @param spill The spill. - * @param i The position of the reload. - */ - void (*perform_memory_operand)(const void *self, ir_node *irn, ir_node *spill, unsigned int i); -}; - -/** - * irn_ops base class. - */ -struct _arch_irn_ops_t { - const arch_irn_ops_if_t *impl; -}; - -extern const arch_irn_ops_t *arch_get_irn_ops(const arch_env_t *env, const ir_node *irn); +extern const arch_irn_ops_t *arch_get_irn_ops(const arch_env_t *env, + const ir_node *irn); extern void arch_set_frame_offset(const arch_env_t *env, ir_node *irn, int bias); @@ -482,291 +239,14 @@ extern arch_irn_flags_t arch_irn_get_flags(const arch_env_t *env, const ir_node #define arch_irn_consider_in_reg_alloc(env, cls, irn) \ (arch_irn_has_reg_class(env, irn, -1, cls) && !arch_irn_is(env, irn, ignore)) -/** - * Somebody who can be asked about IR nodes. - */ -struct _arch_irn_handler_t { - - /** - * Get the operations of an irn. - * @param self The handler from which the method is invoked. - * @param irn Some node. - * @return Operations for that irn. - */ - const void *(*get_irn_ops)(const arch_irn_handler_t *handler, - const ir_node *irn); -}; - -/** - * The code generator interface. - */ -struct _arch_code_generator_if_t { - /** - * Initialize the code generator. - * @param birg A backend IRG session. - * @return A newly created code generator. - */ - void *(*init)(be_irg_t *birg); - - /** - * Called before abi introduce. - */ - void (*before_abi)(void *self); - - /** - * Called, when the graph is being normalized. - */ - void (*prepare_graph)(void *self); - - /** - * Backend may provide an own spiller. - * This spiller needs to spill all register classes. - */ - void (*spill)(void *self, be_irg_t *birg); - - /** - * Called before scheduling. - */ - void (*before_sched)(void *self); - - /** - * Called before register allocation. - */ - void (*before_ra)(void *self); - - /** - * Called after register allocation. - */ - void (*after_ra)(void *self); - - /** - * Called directly before done is called. This should be the last place - * where the irg is modified. - */ - void (*finish)(void *self); - - /** - * Called after everything happened. This call should emit the final - * assembly code but avoid changing the irg. - * The code generator must also be de-allocated here. - */ - void (*done)(void *self); -}; - -/** - * helper macro: call function func from the code generator - * if it's implemented. - */ -#define _arch_cg_call(cg, func) \ -do { \ - if((cg)->impl->func) \ - (cg)->impl->func(cg); \ -} while(0) - -#define _arch_cg_call_env(cg, env, func) \ -do { \ - if((cg)->impl->func) \ - (cg)->impl->func(cg, env); \ -} while(0) - -#define arch_code_generator_before_abi(cg) _arch_cg_call(cg, before_abi) -#define arch_code_generator_prepare_graph(cg) _arch_cg_call(cg, prepare_graph) -#define arch_code_generator_before_sched(cg) _arch_cg_call(cg, before_sched) -#define arch_code_generator_before_ra(cg) _arch_cg_call(cg, before_ra) -#define arch_code_generator_after_ra(cg) _arch_cg_call(cg, after_ra) -#define arch_code_generator_finish(cg) _arch_cg_call(cg, finish) -#define arch_code_generator_done(cg) _arch_cg_call(cg, done) -#define arch_code_generator_spill(cg, birg) _arch_cg_call_env(cg, birg, spill) -#define arch_code_generator_has_spiller(cg) ((cg)->impl->spill != NULL) - -/** - * Code generator base class. - */ -struct _arch_code_generator_t { - const arch_code_generator_if_t *impl; -}; - -/** - * ISA base class. - */ -struct _arch_isa_t { - const arch_isa_if_t *impl; - const arch_register_t *sp; /** The stack pointer register. */ - const arch_register_t *bp; /** The base pointer register. */ - const int stack_dir; /** -1 for decreasing, 1 for increasing. */ - const be_main_env_t *main_env; /** the be main environment */ -}; - -#define arch_isa_stack_dir(isa) ((isa)->stack_dir) -#define arch_isa_sp(isa) ((isa)->sp) -#define arch_isa_bp(isa) ((isa)->bp) - -/** - * Architecture interface. - */ -struct _arch_isa_if_t { - /** - * Initialize the isa interface. - * @param file_handle the file handle to write the output to - * @param main_env the be main environment - * @return a new isa instance - */ - void *(*init)(FILE *file_handle); - - /** - * Free the isa instance. - */ - void (*done)(void *self); - - /** - * Get the the number of register classes in the isa. - * @return The number of register classes. - */ - int (*get_n_reg_class)(const void *self); - - /** - * Get the i-th register class. - * @param i The number of the register class. - * @return The register class. - */ - const arch_register_class_t *(*get_reg_class)(const void *self, int i); - - /** - * Get the register class which shall be used to store a value of a given mode. - * @param self The this pointer. - * @param mode The mode in question. - * @return A register class which can hold values of the given mode. - */ - const arch_register_class_t *(*get_reg_class_for_mode)(const void *self, const ir_mode *mode); - - /** - * Get the ABI restrictions for procedure calls. - * @param self The this pointer. - * @param method_type The type of the method (procedure) in question. - * @param p The array of parameter locations to be filled. - */ - void (*get_call_abi)(const void *self, ir_type *method_type, be_abi_call_t *abi); - - /** - * The irn handler for this architecture. - * The irn handler is registered by the Firm back end - * when the architecture is initialized. - * (May be NULL). - */ - const arch_irn_handler_t *(*get_irn_handler)(const void *self); - - /** - * Get the code generator interface. - * @param self The this pointer. - * @return Some code generator interface. - */ - const arch_code_generator_if_t *(*get_code_generator_if)(void *self); - - /** - * Get the list scheduler to use. There is already a selector given, the - * backend is free to modify and/or ignore it. - * - * @param self The isa object. - * @param selector The selector given by options. - * @return The list scheduler selector. - */ - const list_sched_selector_t *(*get_list_sched_selector)(const void *self, list_sched_selector_t *selector); - - /** - * Get the ILP scheduler to use. - * @param self The isa object. - * @return The ILP scheduler selector - */ - const ilp_sched_selector_t *(*get_ilp_sched_selector)(const void *self); - - /** - * Get the necessary alignment for storing a register of given class. - * @param self The isa object. - * @param cls The register class. - * @return The alignment in bytes. - */ - int (*get_reg_class_alignment)(const void *self, const arch_register_class_t *cls); - - /** - * A "static" function, returns the frontend settings - * needed for this backend. - */ - const backend_params *(*get_params)(void); - - /** - * Returns an 2-dim array of execution units, @p irn can be executed on. - * The first dimension is the type, the second the allowed units of this type. - * Each dimension is a NULL terminated list. - * @param self The isa object. - * @param irn The node. - * @return An array of allowed execution units. - * exec_unit = { - * { unit1_of_tp1, ..., unitX1_of_tp1, NULL }, - * ..., - * { unit1_of_tpY, ..., unitXn_of_tpY, NULL }, - * NULL - * }; - */ - const be_execution_unit_t ***(*get_allowed_execution_units)(const void *self, const ir_node *irn); - - /** - * Return the abstract machine for this isa. - * @param self The isa object. - */ - const be_machine_t *(*get_machine)(const void *self); - - /** - * Return an ordered list of irgs where code should be generated for. - * If NULL is returned, all irg will be taken into account and they will be - * generated in an arbitrary order. - * @param self The isa object. - * @param irgs A flexible array ARR_F of length 0 where the backend cann append the desired irgs. - * @return A flexible array ARR_F containing all desired irgs in the desired order. - */ - ir_graph **(*get_backend_irg_list)(const void *self, ir_graph ***irgs); -}; - -#define arch_isa_get_n_reg_class(isa) ((isa)->impl->get_n_reg_class(isa)) -#define arch_isa_get_reg_class(isa,i) ((isa)->impl->get_reg_class(isa, i)) -#define arch_isa_get_irn_handler(isa) ((isa)->impl->get_irn_handler(isa)) -#define arch_isa_get_call_abi(isa,tp,abi) ((isa)->impl->get_call_abi((isa), (tp), (abi))) -#define arch_isa_get_reg_class_for_mode(isa,mode) ((isa)->impl->get_reg_class_for_mode((isa), (mode))) -#define arch_isa_make_code_generator(isa,irg) ((isa)->impl->make_code_generator((isa), (irg))) -#define arch_isa_get_reg_class_alignment(isa, cls) ((isa)->impl->get_reg_class_alignment((isa), (cls))) -#define arch_isa_get_allowed_execution_units(isa, irn) ((isa)->impl->get_allowed_execution_units((isa), (irn))) -#define arch_isa_get_machine(isa) ((isa)->impl->get_machine((isa))) -#define arch_isa_get_backend_irg_list(isa, irgs) ((isa)->impl->get_backend_irg_list((isa), (irgs))) - -#define ARCH_MAX_HANDLERS 8 - -/** - * Environment for the architecture infrastructure. - * Keep this everywhere you're going. - */ -struct _arch_env_t { - arch_isa_t *isa; /**< The isa about which everything is. */ - - arch_irn_handler_t const *handlers[ARCH_MAX_HANDLERS]; /**< The handlers are organized as - a stack. */ - - int handlers_tos; /**< The stack pointer of the handler - stack. */ -}; - -/** - * Get the isa of an arch environment. - * @param env The environment. - * @return The isa with which the env was initialized with. - */ -#define arch_env_get_isa(env) ((env)->isa) - /** * Initialize the architecture environment struct. * @param isa The isa which shall be put into the environment. * @param file_handle The file handle * @return The environment. */ -extern arch_env_t *arch_env_init(arch_env_t *env, const arch_isa_if_t *isa, FILE *file_handle, be_main_env_t *main_env); +extern arch_env_t *arch_env_init(arch_env_t *env, const arch_isa_if_t *isa, + FILE *file_handle, be_main_env_t *main_env); /** * Add a node handler to the environment. @@ -788,4 +268,4 @@ extern const arch_irn_handler_t *arch_env_pop_irn_handler(arch_env_t *env); */ void be_register_isa_if(const char *name, const arch_isa_if_t *isa); -#endif /* _FIRM_BEARCH_H */ +#endif diff --git a/ir/be/bearch_t.h b/ir/be/bearch_t.h deleted file mode 100644 index 50e5d0beb..000000000 --- a/ir/be/bearch_t.h +++ /dev/null @@ -1,21 +0,0 @@ - -/** - * Type declarations for the BEARCH module. - * $Id$ - */ - -#ifndef _BEARCH_T_H_ -#define _BEARCH_T_H_ - -typedef struct _arch_register_class_t arch_register_class_t; -typedef struct _arch_register_t arch_register_t; -typedef struct _arch_isa_if_t arch_isa_if_t; -typedef struct _arch_isa_t arch_isa_t; -typedef struct _arch_env_t arch_env_t; -typedef struct _arch_irn_ops_if_t arch_irn_ops_if_t; -typedef struct _arch_irn_ops_t arch_irn_ops_t; -typedef struct _arch_irn_handler_t arch_irn_handler_t; -typedef struct _arch_code_generator_t arch_code_generator_t; -typedef struct _arch_code_generator_if_t arch_code_generator_if_t; - -#endif /* _BEARCH_T_H_ */ diff --git a/ir/be/bechordal.c b/ir/be/bechordal.c index ad144c488..3ee60f5e5 100644 --- a/ir/be/bechordal.c +++ b/ir/be/bechordal.c @@ -37,7 +37,7 @@ #include "besched_t.h" #include "belive_t.h" #include "benode_t.h" -#include "bearch.h" +#include "bearch_t.h" #include "beirgmod.h" #include "beifg.h" #include "beinsn_t.h" @@ -145,7 +145,7 @@ static INLINE border_t *border_add(be_chordal_env_t *env, struct list_head *head b->irn = irn; b->step = step; list_add_tail(&b->list, head); - DBG((env->dbg, LEVEL_5, "\t\t%s adding %+F, step: %d\n", is_def ? "def" : "use", irn, step)); + DBG((dbg, LEVEL_5, "\t\t%s adding %+F, step: %d\n", is_def ? "def" : "use", irn, step)); return b; @@ -250,7 +250,7 @@ static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn) sched_add_before(irn, copy); set_irn_n(irn, i, copy); - DBG((env->dbg, LEVEL_3, "inserting ignore arg copy %+F for %+F pos %d\n", copy, irn, i)); + DBG((dbg, LEVEL_3, "inserting ignore arg copy %+F for %+F pos %d\n", copy, irn, i)); } insn = chordal_scan_insn(env, irn); @@ -277,7 +277,7 @@ static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn) sched_add_before(insn->irn, copy); set_irn_n(insn->irn, a_op->pos, copy); - DBG((env->dbg, LEVEL_3, "inserting multiple constr copy %+F for %+F pos %d\n", copy, insn->irn, a_op->pos)); + DBG((dbg, LEVEL_3, "inserting multiple constr copy %+F for %+F pos %d\n", copy, insn->irn, a_op->pos)); } } @@ -323,7 +323,7 @@ static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn) sched_add_before(insn->irn, copy); set_irn_n(insn->irn, op->pos, copy); - DBG((env->dbg, LEVEL_3, "inserting constr copy %+F for %+F pos %d\n", copy, insn->irn, op->pos)); + DBG((dbg, LEVEL_3, "inserting constr copy %+F for %+F pos %d\n", copy, insn->irn, op->pos)); be_liveness_update(lv, op->carrier); } diff --git a/ir/be/bechordal.h b/ir/be/bechordal.h index a9c42960d..695a7c863 100644 --- a/ir/be/bechordal.h +++ b/ir/be/bechordal.h @@ -8,9 +8,9 @@ #ifndef __BECHORDAL_H #define __BECHORDAL_H -#include "bearch.h" +#include "bearch_t.h" #include "bera.h" -typedef struct _be_chordal_env_t be_chordal_env_t; +typedef struct be_chordal_env_t be_chordal_env_t; #endif diff --git a/ir/be/bechordal_draw.h b/ir/be/bechordal_draw.h index 63e491fc8..95d3866bb 100644 --- a/ir/be/bechordal_draw.h +++ b/ir/be/bechordal_draw.h @@ -13,7 +13,7 @@ #ifndef _BECHORDAL_DRAW_H #define _BECHORDAL_DRAW_H -#include "bearch.h" +#include "bearch_t.h" typedef struct _plotter_t plotter_t; typedef struct _plotter_if_t plotter_if_t; diff --git a/ir/be/bechordal_main.c b/ir/be/bechordal_main.c index 6a94f1796..3834e4d48 100644 --- a/ir/be/bechordal_main.c +++ b/ir/be/bechordal_main.c @@ -49,13 +49,14 @@ #include "besched.h" #include "besched_t.h" #include "belive_t.h" -#include "bearch.h" +#include "bearch_t.h" #include "beifg_t.h" #include "beifg_impl.h" #include "benode_t.h" #include "bestatevent.h" #include "bestat.h" #include "bemodule.h" +#include "be_t.h" #include "bespillbelady.h" #include "bespillmorgan.h" @@ -196,7 +197,6 @@ static void memory_operand_walker(ir_node *irn, void *env) { assert(src && "outedges broken!"); if (get_nodes_block(src) == block && arch_possible_memory_operand(aenv, src, pos)) { - DBG((cenv->dbg, LEVEL_3, "performing memory operand %+F at %+F\n", irn, src)); arch_perform_memory_operand(aenv, src, spill, pos); } } @@ -553,7 +553,6 @@ static void be_ra_chordal_main(be_irg_t *birg) chordal_env.opts = &options; chordal_env.irg = irg; chordal_env.birg = birg; - FIRM_DBG_REGISTER(chordal_env.dbg, "firm.be.chordal"); obstack_init(&chordal_env.obst); diff --git a/ir/be/bechordal_t.h b/ir/be/bechordal_t.h index bddf79f74..df2ba3c50 100644 --- a/ir/be/bechordal_t.h +++ b/ir/be/bechordal_t.h @@ -25,12 +25,13 @@ #include "be_t.h" #include "beifg.h" #include "bera.h" -#include "bearch.h" +#include "bearch_t.h" #include "bechordal.h" #include "belive.h" -#include "beirg.h" +#include "beirg_t.h" -typedef struct _be_ra_chordal_opts_t be_ra_chordal_opts_t; +typedef struct be_ra_chordal_opts_t be_ra_chordal_opts_t; +typedef struct border_t border_t; /** Defines an invalid register index. */ #define NO_COLOR (-1) @@ -38,32 +39,32 @@ typedef struct _be_ra_chordal_opts_t be_ra_chordal_opts_t; /** * A liveness interval border. */ -typedef struct _border_t { +struct border_t { DEBUG_ONLY(unsigned magic;) /**< A magic number for checking. */ - struct list_head list; /**< list head for queuing. */ - struct _border_t *other_end; /**< The other end of the border. */ - ir_node *irn; /**< The node. */ - unsigned step; /**< The number equal to the interval border. */ - unsigned pressure; /**< The pressure at this interval border. (The border itself is counting). */ - unsigned is_def : 1; /**< Does this border denote a use or a def. */ - unsigned is_real : 1; /**< Is the def/use real? Or is it just inserted - at block beginnings or ends to ensure that inside - a block, each value has one begin and one end. */ -} border_t; + struct list_head list; /**< list head for queuing. */ + border_t *other_end; /**< The other end of the border. */ + ir_node *irn; /**< The node. */ + unsigned step; /**< The number equal to the interval border. */ + unsigned pressure; /**< The pressure at this interval border. (The border itself is counting). */ + unsigned is_def : 1; /**< Does this border denote a use or a def. */ + unsigned is_real : 1; /**< Is the def/use real? Or is it just + inserted at block beginnings or ends + to ensure that inside a block, each + value has one begin and one end. */ +}; /** * Environment for each of the chordal register allocator phases */ -struct _be_chordal_env_t { - struct obstack obst; /**< An obstack for temporary storage. */ +struct be_chordal_env_t { + struct obstack obst; /**< An obstack for temporary storage. */ be_ra_chordal_opts_t *opts; /**< A pointer to the chordal ra options. */ - be_irg_t *birg; /**< Back-end IRG session. */ - ir_graph *irg; /**< The graph under examination. */ + be_irg_t *birg; /**< Back-end IRG session. */ + ir_graph *irg; /**< The graph under examination. */ const arch_register_class_t *cls; /**< The current register class. */ - pmap *border_heads; /**< Maps blocks to border heads. */ - be_ifg_t *ifg; /**< The interference graph. */ - bitset_t *ignore_colors; /**< A set of colors which shall be ignored in register allocation. */ - DEBUG_ONLY(firm_dbg_module_t *dbg;) /**< Debug module for the chordal register allocator. */ + pmap *border_heads; /**< Maps blocks to border heads. */ + be_ifg_t *ifg; /**< The interference graph. */ + bitset_t *ignore_colors;/**< A set of colors which shall be ignored in register allocation. */ }; static INLINE struct list_head *_get_block_border_head(const be_chordal_env_t *inf, ir_node *bl) { @@ -106,7 +107,7 @@ enum { BE_CH_VRFY_ASSERT = 3, }; -struct _be_ra_chordal_opts_t { +struct be_ra_chordal_opts_t { int dump_flags; int lower_perm_opt; int vrfy_option; diff --git a/ir/be/becopyopt.c b/ir/be/becopyopt.c index 480b4167a..899477dc1 100644 --- a/ir/be/becopyopt.c +++ b/ir/be/becopyopt.c @@ -24,7 +24,7 @@ #include "irprintf_t.h" #include "bemodule.h" -#include "bearch.h" +#include "bearch_t.h" #include "benode_t.h" #include "beutil.h" #include "beifg_t.h" @@ -1043,7 +1043,7 @@ static void appel_walker(ir_node *bl, void *data) irn = insn->next_insn; } - DBG((env->co->cenv->dbg, LEVEL_2, "%+F\n", bl)); + DBG((dbg, LEVEL_2, "%+F\n", bl)); be_liveness_end_of_block(lv, env->co->aenv, env->co->cls, bl, live); /* Generate the bad and ugly. */ diff --git a/ir/be/becopyopt_t.h b/ir/be/becopyopt_t.h index 48c795fc1..b565e459f 100644 --- a/ir/be/becopyopt_t.h +++ b/ir/be/becopyopt_t.h @@ -12,7 +12,7 @@ #include #include "list.h" -#include "bearch.h" +#include "bearch_t.h" #include "bechordal_t.h" #include "becopyopt.h" #include "benodesets.h" diff --git a/ir/be/becopystat.h b/ir/be/becopystat.h index b9b3f3f7d..fddac8a38 100644 --- a/ir/be/becopystat.h +++ b/ir/be/becopystat.h @@ -10,7 +10,7 @@ #include "firm_config.h" #include "irgraph.h" -#include "bearch.h" +#include "bearch_t.h" #include "bechordal_t.h" void copystat_add_max_costs(int costs); diff --git a/ir/be/beilpsched.c b/ir/be/beilpsched.c index a6b9d8893..a6a3eb42f 100644 --- a/ir/be/beilpsched.c +++ b/ir/be/beilpsched.c @@ -48,6 +48,7 @@ #include "beilpsched.h" #include "beutil.h" #include "bestat.h" +#include "beirg_t.h" typedef struct _ilpsched_options_t { unsigned regpress; @@ -1996,9 +1997,11 @@ static void create_ilp(ir_node *block, void *walk_env) { */ void be_ilp_sched(const be_irg_t *birg, be_options_t *be_opts) { be_ilpsched_env_t env; - const char *name = "be ilp scheduling"; - arch_isa_t *isa = birg->main_env->arch_env->isa; - const ilp_sched_selector_t *sel = isa->impl->get_ilp_sched_selector(isa); + const char *name = "be ilp scheduling"; + ir_graph *irg = be_get_birg_irg(birg); + const arch_env_t *arch_env = be_get_birg_arch_env(birg); + const arch_isa_t *isa = arch_env->isa; + const ilp_sched_selector_t *sel = isa->impl->get_ilp_sched_selector(isa); FIRM_DBG_REGISTER(env.dbg, "firm.be.sched.ilp"); @@ -2011,13 +2014,13 @@ void be_ilp_sched(const be_irg_t *birg, be_options_t *be_opts) { // firm_dbg_set_mask(env.dbg, 1); - env.irg_env = be_ilp_sched_init_irg_ilp_schedule(sel, birg->irg); + env.irg_env = be_ilp_sched_init_irg_ilp_schedule(sel, irg); env.sel = sel; - env.irg = birg->irg; - env.height = heights_new(birg->irg); + env.irg = irg; + env.height = heights_new(irg); env.main_env = birg->main_env; - env.arch_env = birg->main_env->arch_env; - env.cpu = arch_isa_get_machine(birg->main_env->arch_env->isa); + env.arch_env = arch_env; + env.cpu = arch_isa_get_machine(arch_env->isa); env.opts = &ilp_opts; env.birg = birg; env.be_opts = be_opts; diff --git a/ir/be/beinsn.c b/ir/be/beinsn.c index 78404106f..0ff3955c8 100644 --- a/ir/be/beinsn.c +++ b/ir/be/beinsn.c @@ -8,6 +8,7 @@ #include "besched_t.h" #include "beinsn_t.h" +#include "beirg_t.h" #include "beabi.h" #include "raw_bitset.h" @@ -112,9 +113,11 @@ be_insn_t *be_scan_insn(const be_insn_env_t *env, ir_node *irn) return insn; } -be_insn_env_t *be_insn_env_init(be_insn_env_t *ie, const be_irg_t *birg, const arch_register_class_t *cls, struct obstack *obst) +be_insn_env_t *be_insn_env_init(be_insn_env_t *ie, const be_irg_t *birg, + const arch_register_class_t *cls, + struct obstack *obst) { - ie->aenv = birg->main_env->arch_env; + ie->aenv = be_get_birg_arch_env(birg); ie->cls = cls; ie->obst = obst; ie->ignore_colors = bitset_obstack_alloc(obst, cls->n_regs); diff --git a/ir/be/beinsn_t.h b/ir/be/beinsn_t.h index e084f4fa9..69700e5a8 100644 --- a/ir/be/beinsn_t.h +++ b/ir/be/beinsn_t.h @@ -9,7 +9,7 @@ #include "bitset.h" -#include "bearch.h" +#include "bearch_t.h" typedef struct _be_operand_t be_operand_t; typedef struct _be_insn_t be_insn_t; diff --git a/ir/be/beirg.c b/ir/be/beirg.c index 42460def6..d498e3d1d 100644 --- a/ir/be/beirg.c +++ b/ir/be/beirg.c @@ -59,3 +59,28 @@ void be_free_birg(be_irg_t *birg) birg->lv = NULL; } } + +ir_graph* (be_get_birg_irg) (const be_irg_t *birg) +{ + return _be_get_birg_irg(birg); +} + +ir_exec_freq* (be_get_birg_exec_freq) (const be_irg_t *birg) +{ + return _be_get_birg_exec_freq(birg); +} + +be_lv_t* (be_get_birg_liveness) (const be_irg_t *birg) +{ + return _be_get_birg_liveness(birg); +} + +be_dom_front_info_t* (be_get_birg_dom_front) (const be_irg_t *birg) +{ + return _be_get_birg_dom_front(birg); +} + +const arch_env_t* (be_get_birg_arch_env) (const be_irg_t *birg) +{ + return _be_get_birg_arch_env(birg); +} diff --git a/ir/be/beirg.h b/ir/be/beirg.h index 757b0f29d..fe10b8ba9 100644 --- a/ir/be/beirg.h +++ b/ir/be/beirg.h @@ -6,13 +6,13 @@ * * Backend irg - a ir_graph with additional analysis information */ -#ifndef BEIRG_H_ -#define BEIRG_H_ +#ifndef BEIRG_H +#define BEIRG_H #include "belive.h" #include "bedomfront.h" -typedef struct _be_irg_t be_irg_t; +typedef struct be_irg_t be_irg_t; ir_graph *be_get_birg_irg(const be_irg_t *birg); @@ -24,6 +24,8 @@ void be_assure_dom_front(be_irg_t *birg); void be_invalidate_dom_front(be_irg_t *birg); be_dom_front_info_t *be_get_birg_dom_front(const be_irg_t *birg); +const arch_env_t *be_get_birg_arch_env(const be_irg_t *birg); + ir_exec_freq *be_get_birg_exec_freq(const be_irg_t *birg); /** diff --git a/ir/be/beirg_t.h b/ir/be/beirg_t.h index 71f5efb58..7d17aeb2c 100644 --- a/ir/be/beirg_t.h +++ b/ir/be/beirg_t.h @@ -6,23 +6,24 @@ * * Backend irg - a ir_graph with additional analysis information */ -#ifndef BEIRG_T_H_ -#define BEIRG_T_H_ +#ifndef BEIRG_T_H +#define BEIRG_T_H #include "beirg.h" +#include "be_t.h" /** * An ir_graph with additional analysis data about this irg. Also includes some * backend structures */ -struct _be_irg_t { - ir_graph *irg; - struct _be_main_env_t *main_env; - struct _be_abi_irg_t *abi; - struct _arch_code_generator_t *cg; - ir_exec_freq *exec_freq; - be_dom_front_info_t *dom_front; - be_lv_t *lv; +struct be_irg_t { + ir_graph *irg; + be_main_env_t *main_env; + be_abi_irg_t *abi; + arch_code_generator_t *cg; + ir_exec_freq *exec_freq; + be_dom_front_info_t *dom_front; + be_lv_t *lv; }; static INLINE be_lv_t * @@ -45,6 +46,11 @@ _be_get_birg_irg(const be_irg_t *birg) { return birg->irg; } +static INLINE const arch_env_t * +_be_get_birg_arch_env(const be_irg_t *birg) { + return birg->main_env->arch_env; +} + #define be_get_birg_exec_freq(birg) _be_get_birg_exec_freq(birg) #define be_get_birg_liveness(birg) _be_get_birg_liveness(birg) #define be_get_birg_dom_front(birg) _be_get_birg_dom_front(birg) diff --git a/ir/be/beirgmod.c b/ir/be/beirgmod.c index 1a9f768ad..e692c5bd6 100644 --- a/ir/be/beirgmod.c +++ b/ir/be/beirgmod.c @@ -41,7 +41,7 @@ #include "be_t.h" #include "bechordal_t.h" -#include "bearch.h" +#include "bearch_t.h" #include "besched_t.h" #include "belive_t.h" #include "benode_t.h" diff --git a/ir/be/belistsched.c b/ir/be/belistsched.c index ef1c27e70..728f7831c 100644 --- a/ir/be/belistsched.c +++ b/ir/be/belistsched.c @@ -38,8 +38,9 @@ #include "belistsched.h" #include "beschedmris.h" #include "beschedrss.h" -#include "bearch.h" +#include "bearch_t.h" #include "bestat.h" +#include "beirg_t.h" #include #include diff --git a/ir/be/belive.h b/ir/be/belive.h index 4772ac30f..23bc394f8 100644 --- a/ir/be/belive.h +++ b/ir/be/belive.h @@ -4,13 +4,12 @@ * @date 6.12.2004 * @cvs-id $Id$ */ - -#ifndef _BELIVE_H -#define _BELIVE_H +#ifndef FIRM_BELIVE_H +#define FIRM_BELIVE_H #include "firm_types.h" #include "pset.h" -#include "bearch_t.h" +#include "bearch.h" #include diff --git a/ir/be/beloopana.c b/ir/be/beloopana.c index 9acc15652..b89394c62 100644 --- a/ir/be/beloopana.c +++ b/ir/be/beloopana.c @@ -17,8 +17,9 @@ #include "irtools.h" #include "irloop_t.h" #include "error.h" +#include "debug.h" -#include "bearch.h" +#include "bearch_t.h" #include "belive.h" #include "besched.h" #include "beloopana.h" @@ -54,7 +55,9 @@ static int cmp_loop_info(const void *a, const void *b, size_t sz) { * @return The highest register pressure in the given block. */ static unsigned be_compute_block_pressure(be_loopana_t *loop_ana, ir_node *block, const arch_register_class_t *cls) { - const arch_env_t *aenv = loop_ana->birg->main_env->arch_env; + const be_irg_t *birg = loop_ana->birg; + const arch_env_t *aenv = be_get_birg_arch_env(birg); + be_lv_t *lv = be_get_birg_liveness(birg); pset *live_nodes = pset_new_ptr_default(); ir_node *irn; int max_live; @@ -62,7 +65,7 @@ static unsigned be_compute_block_pressure(be_loopana_t *loop_ana, ir_node *block DBG((dbg, LEVEL_1, "Processing Block %+F\n", block)); /* determine largest pressure with this block */ - live_nodes = be_liveness_end_of_block(loop_ana->birg->lv, aenv, cls, block, live_nodes); + live_nodes = be_liveness_end_of_block(lv, aenv, cls, block, live_nodes); max_live = pset_count(live_nodes); sched_foreach_reverse(block, irn) { @@ -135,7 +138,9 @@ static unsigned be_compute_loop_pressure(be_loopana_t *loop_ana, ir_loop *loop, * @param cls The register class to compute the pressure for * @return The loop analysis object. */ -be_loopana_t *be_new_loop_pressure_cls(be_irg_t *birg, const arch_register_class_t *cls) { +be_loopana_t *be_new_loop_pressure_cls(be_irg_t *birg, + const arch_register_class_t *cls) { + ir_graph *irg = be_get_birg_irg(birg); be_loopana_t *loop_ana = xmalloc(sizeof(*loop_ana)); loop_ana->data = new_set(cmp_loop_info, 16); @@ -145,7 +150,7 @@ be_loopana_t *be_new_loop_pressure_cls(be_irg_t *birg, const arch_register_class DBG((dbg, LEVEL_1, " Computing register pressure for class %s:\n", cls->name)); DBG((dbg, LEVEL_1, "=====================================================\n", cls->name)); - be_compute_loop_pressure(loop_ana, get_irg_loop(birg->irg), cls); + be_compute_loop_pressure(loop_ana, get_irg_loop(irg), cls); return loop_ana; } @@ -156,15 +161,18 @@ be_loopana_t *be_new_loop_pressure_cls(be_irg_t *birg, const arch_register_class * @return The loop analysis object. */ be_loopana_t *be_new_loop_pressure(be_irg_t *birg) { - be_loopana_t *loop_ana = xmalloc(sizeof(*loop_ana)); - ir_loop *irg_loop = get_irg_loop(birg->irg); - int i; + ir_graph *irg = be_get_birg_irg(birg); + be_loopana_t *loop_ana = xmalloc(sizeof(*loop_ana)); + ir_loop *irg_loop = get_irg_loop(irg); + const arch_env_t *arch_env = be_get_birg_arch_env(birg); + const arch_isa_t *isa = arch_env->isa; + int i; loop_ana->data = new_set(cmp_loop_info, 16); loop_ana->birg = birg; - for (i = arch_isa_get_n_reg_class(birg->main_env->arch_env->isa) - 1; i >= 0; --i) { - const arch_register_class_t *cls = arch_isa_get_reg_class(birg->main_env->arch_env->isa, i); + for (i = arch_isa_get_n_reg_class(isa) - 1; i >= 0; --i) { + const arch_register_class_t *cls = arch_isa_get_reg_class(isa, i); DBG((dbg, LEVEL_1, "\n=====================================================\n", cls->name)); DBG((dbg, LEVEL_1, " Computing register pressure for class %s:\n", cls->name)); DBG((dbg, LEVEL_1, "=====================================================\n", cls->name)); diff --git a/ir/be/beloopana.h b/ir/be/beloopana.h index 98f575ceb..ffa1eeece 100644 --- a/ir/be/beloopana.h +++ b/ir/be/beloopana.h @@ -10,7 +10,7 @@ #include "irloop.h" -#include "bearch.h" +#include "bearch_t.h" #include "beirg.h" typedef struct _be_loopana_t be_loopana_t; diff --git a/ir/be/belower.c b/ir/be/belower.c index c83744d49..fbad31688 100644 --- a/ir/be/belower.c +++ b/ir/be/belower.c @@ -18,7 +18,7 @@ #include "irhooks.h" #include "xmalloc.h" -#include "bearch.h" +#include "bearch_t.h" #include "belower.h" #include "benode_t.h" #include "besched_t.h" @@ -263,6 +263,7 @@ static perm_cycle_t *get_perm_cycle(perm_cycle_t *cycle, reg_pair_t *pairs, int * @param walk_env The environment */ static void lower_perm_node(ir_node *irn, void *walk_env) { + ir_graph *irg = get_irn_irg(irn); const arch_register_class_t *reg_class; const arch_env_t *arch_env; lower_env_t *env = walk_env; @@ -430,7 +431,7 @@ static void lower_perm_node(ir_node *irn, void *walk_env) { DBG((mod, LEVEL_1, "%+F (%+F, %s) and (%+F, %s)\n", irn, res1, cycle->elems[i]->name, res2, cycle->elems[i + 1]->name)); - cpyxchg = be_new_Perm(reg_class, env->birg->irg, block, 2, in); + cpyxchg = be_new_Perm(reg_class, irg, block, 2, in); n_ops++; if (i > 0) { @@ -438,7 +439,7 @@ static void lower_perm_node(ir_node *irn, void *walk_env) { int pidx = get_pairidx_for_regidx(pairs, n, cycle->elems[i]->index, 0); /* create intermediate proj */ - res1 = new_r_Proj(get_irn_irg(irn), block, cpyxchg, get_irn_mode(res1), 0); + res1 = new_r_Proj(irg, block, cpyxchg, get_irn_mode(res1), 0); /* set as in for next Perm */ pairs[pidx].in_node = res1; @@ -472,7 +473,7 @@ static void lower_perm_node(ir_node *irn, void *walk_env) { DBG((mod, LEVEL_1, "%+F creating copy node (%+F, %s) -> (%+F, %s)\n", irn, arg1, cycle->elems[i]->name, res2, cycle->elems[i + 1]->name)); - cpyxchg = be_new_Copy(reg_class, env->birg->irg, block, arg1); + cpyxchg = be_new_Copy(reg_class, irg, block, arg1); arch_set_irn_register(arch_env, cpyxchg, cycle->elems[i + 1]); n_ops++; @@ -523,7 +524,7 @@ static INLINE ir_node *belower_skip_proj(ir_node *irn) { } static ir_node *find_copy(constraint_env_t *env, ir_node *irn, ir_node *op) { - const arch_env_t *arch_env = env->birg->main_env->arch_env; + const arch_env_t *arch_env = be_get_birg_arch_env(env->birg); ir_node *block = get_nodes_block(irn); ir_node *cur_node; @@ -540,8 +541,9 @@ static ir_node *find_copy(constraint_env_t *env, ir_node *irn, ir_node *op) { static void gen_assure_different_pattern(ir_node *irn, ir_node *other_different, constraint_env_t *env) { be_irg_t *birg = env->birg; + ir_graph *irg = be_get_birg_irg(birg); pset *op_set = env->op_set; - const arch_env_t *arch_env = birg->main_env->arch_env; + const arch_env_t *arch_env = be_get_birg_arch_env(birg); ir_node *block = get_nodes_block(irn); const arch_register_class_t *cls = arch_get_irn_reg_class(arch_env, other_different, -1); ir_node *in[2], *keep, *cpy; @@ -561,7 +563,7 @@ static void gen_assure_different_pattern(ir_node *irn, ir_node *other_different, /* check if already exists such a copy in the schedule immediatly before */ cpy = find_copy(env, belower_skip_proj(irn), other_different); if (! cpy) { - cpy = be_new_Copy(cls, birg->irg, block, other_different); + cpy = be_new_Copy(cls, irg, block, other_different); be_node_set_flags(cpy, BE_OUT_POS(0), arch_irn_flags_dont_spill); DBG((mod, LEVEL_1, "created non-spillable %+F for value %+F\n", cpy, other_different)); } @@ -575,10 +577,10 @@ static void gen_assure_different_pattern(ir_node *irn, ir_node *other_different, /* Add the Keep resp. CopyKeep and reroute the users */ /* of the other_different irn in case of CopyKeep. */ if (get_n_out_edges(other_different) == 0) { - keep = be_new_Keep(cls, birg->irg, block, 2, in); + keep = be_new_Keep(cls, irg, block, 2, in); } else { - keep = be_new_CopyKeep_single(cls, birg->irg, block, cpy, irn, get_irn_mode(other_different)); + keep = be_new_CopyKeep_single(cls, irg, block, cpy, irn, get_irn_mode(other_different)); be_node_set_reg_class(keep, 1, cls); } @@ -618,8 +620,9 @@ static void gen_assure_different_pattern(ir_node *irn, ir_node *other_different, */ static void assure_different_constraints(ir_node *irn, constraint_env_t *env) { const arch_register_req_t *req; + const arch_env_t *arch_env = be_get_birg_arch_env(env->birg); - req = arch_get_register_req(env->birg->main_env->arch_env, irn, -1); + req = arch_get_register_req(arch_env, irn, -1); if (arch_register_req_is(req, should_be_different)) { ir_node *different_from = get_irn_n(belower_skip_proj(irn), req->other_different); @@ -655,6 +658,8 @@ static void assure_constraints_walker(ir_node *irn, void *walk_env) { * (or Projs of the same node), copying the same operand. */ static void melt_copykeeps(constraint_env_t *cenv) { + be_irg_t *birg = cenv->birg; + ir_graph *irg = be_get_birg_irg(birg); op_copy_assoc_t *entry; /* for all */ @@ -737,10 +742,10 @@ static void melt_copykeeps(constraint_env_t *cenv) { } #ifdef KEEP_ALIVE_COPYKEEP_HACK - new_ck = be_new_CopyKeep(entry->cls, cenv->birg->irg, get_nodes_block(ref), be_get_CopyKeep_op(ref), n_melt, new_ck_in, mode_ANY); + new_ck = be_new_CopyKeep(entry->cls, irg, get_nodes_block(ref), be_get_CopyKeep_op(ref), n_melt, new_ck_in, mode_ANY); keep_alive(new_ck); #else - new_ck = be_new_CopyKeep(entry->cls, cenv->birg->irg, get_nodes_block(ref), be_get_CopyKeep_op(ref), n_melt, new_ck_in, get_irn_mode(ref)); + new_ck = be_new_CopyKeep(entry->cls, irg, get_nodes_block(ref), be_get_CopyKeep_op(ref), n_melt, new_ck_in, get_irn_mode(ref)); #endif /* KEEP_ALIVE_COPYKEEP_HACK */ /* set register class for all keeped inputs */ @@ -777,6 +782,8 @@ static void melt_copykeeps(constraint_env_t *cenv) { * @param birg The birg structure containing the irg */ void assure_constraints(be_irg_t *birg) { + ir_graph *irg = be_get_birg_irg(birg); + const arch_env_t *arch_env = be_get_birg_arch_env(birg); constraint_env_t cenv; op_copy_assoc_t *entry; ir_node **nodes; @@ -789,7 +796,7 @@ void assure_constraints(be_irg_t *birg) { cenv.op_set = new_pset(cmp_op_copy_assoc, 16); obstack_init(&cenv.obst); - irg_walk_blkwise_graph(birg->irg, NULL, assure_constraints_walker, &cenv); + irg_walk_blkwise_graph(irg, NULL, assure_constraints_walker, &cenv); /* melt copykeeps, pointing to projs of */ /* the same mode_T node and keeping the */ @@ -832,8 +839,8 @@ void assure_constraints(be_irg_t *birg) { ir_node *keep; int n = get_irn_arity(cp); - keep = be_new_Keep(arch_get_irn_reg_class(birg->main_env->arch_env, cp, -1), - birg->irg, get_nodes_block(cp), n, (ir_node **)&get_irn_in(cp)[1]); + keep = be_new_Keep(arch_get_irn_reg_class(arch_env, cp, -1), + irg, get_nodes_block(cp), n, (ir_node **)&get_irn_in(cp)[1]); sched_add_before(cp, keep); /* Set all ins (including the block) of the CopyKeep BAD to keep the verifier happy. */ @@ -877,11 +884,12 @@ static void lower_nodes_after_ra_walker(ir_node *irn, void *walk_env) { */ void lower_nodes_after_ra(be_irg_t *birg, int do_copy) { lower_env_t env; + ir_graph *irg = be_get_birg_irg(birg); env.birg = birg; - env.arch_env = birg->main_env->arch_env; + env.arch_env = be_get_birg_arch_env(birg); env.do_copy = do_copy; FIRM_DBG_REGISTER(env.dbg_module, "firm.be.lower"); - irg_walk_blkwise_graph(birg->irg, NULL, lower_nodes_after_ra_walker, &env); + irg_walk_blkwise_graph(irg, NULL, lower_nodes_after_ra_walker, &env); } diff --git a/ir/be/bemain.c b/ir/be/bemain.c index 9d5471467..2c3ab5721 100644 --- a/ir/be/bemain.c +++ b/ir/be/bemain.c @@ -34,7 +34,7 @@ #include "cfopt.h" #include "execfreq.h" -#include "bearch.h" +#include "bearch_t.h" #include "be_t.h" #include "bemodule.h" #include "beutil.h" @@ -225,7 +225,6 @@ static be_main_env_t *be_init_env(be_main_env_t *env, FILE *file_handle) obstack_init(&env->obst); env->arch_env = obstack_alloc(&env->obst, sizeof(env->arch_env[0])); env->options = &be_options; - FIRM_DBG_REGISTER(env->dbg, "be.main"); arch_env_init(env->arch_env, isa_if, file_handle, env); @@ -282,7 +281,6 @@ static void initialize_birg(be_irg_t *birg, ir_graph *irg, be_main_env_t *env) edges_deactivate_kind(irg, EDGE_KIND_DEP); edges_activate_kind(irg, EDGE_KIND_DEP); - DBG((env->dbg, LEVEL_2, "====> IRG: %F\n", irg)); dump(DUMP_INITIAL, irg, "-begin", dump_ir_block_graph); be_stat_init_irg(env->arch_env, irg); diff --git a/ir/be/benode_t.h b/ir/be/benode_t.h index ebb0371dc..274b7ebe9 100644 --- a/ir/be/benode_t.h +++ b/ir/be/benode_t.h @@ -21,7 +21,7 @@ #include "entity_t.h" #include "be_t.h" -#include "bearch.h" +#include "bearch_t.h" #define BE_OUT_POS(p) (-((p) + 1)) diff --git a/ir/be/bepressurestat.c b/ir/be/bepressurestat.c index 5cae11aa1..20c77b497 100644 --- a/ir/be/bepressurestat.c +++ b/ir/be/bepressurestat.c @@ -37,7 +37,7 @@ #include "belive_t.h" #include "besched_t.h" #include "beirgmod.h" -#include "bearch.h" +#include "bearch_t.h" #include "benode_t.h" #include "beutil.h" #include "bespillremat.h" diff --git a/ir/be/beprofile.c b/ir/be/beprofile.c index 100551ce9..fcffa8d97 100644 --- a/ir/be/beprofile.c +++ b/ir/be/beprofile.c @@ -38,7 +38,7 @@ #include "belive_t.h" #include "besched_t.h" #include "beirgmod.h" -#include "bearch.h" +#include "bearch_t.h" #include "beabi.h" #include "benode_t.h" #include "beutil.h" diff --git a/ir/be/beraextern.c b/ir/be/beraextern.c index d3464508f..8ba6c2493 100644 --- a/ir/be/beraextern.c +++ b/ir/be/beraextern.c @@ -82,7 +82,7 @@ alloc ::= node-nr reg-nr . #include "bemodule.h" #include "beraextern.h" #include "beabi.h" -#include "bearch.h" +#include "bearch_t.h" #include "benode_t.h" #include "beirgmod.h" #include "besched_t.h" diff --git a/ir/be/besched.c b/ir/be/besched.c index fa6e061e0..1ad2130cc 100644 --- a/ir/be/besched.c +++ b/ir/be/besched.c @@ -19,7 +19,7 @@ #include "debug.h" #include "bemodule.h" -#include "bearch.h" +#include "bearch_t.h" #include "besched_t.h" #include "beutil.h" #include "belistsched.h" diff --git a/ir/be/beschedmris.c b/ir/be/beschedmris.c index d0b1addf8..e004c1142 100644 --- a/ir/be/beschedmris.c +++ b/ir/be/beschedmris.c @@ -31,6 +31,7 @@ #include "besched_t.h" #include "beschedmris.h" #include "benodesets.h" +#include "beirg.h" struct _mris_env_t { ir_phase ph; @@ -487,17 +488,18 @@ void dump_ir_block_graph_mris(mris_env_t *env, const char *suffix) { mris_env_t *be_sched_mris_preprocess(const be_irg_t *birg) { mris_env_t *env = xmalloc(sizeof(env[0])); + ir_graph *irg = be_get_birg_irg(birg); - phase_init(&env->ph, "mris", birg->irg, 2 * PHASE_DEFAULT_GROWTH, mris_irn_data_init); - env->aenv = birg->main_env->arch_env; - env->irg = birg->irg; + phase_init(&env->ph, "mris", irg, 2 * PHASE_DEFAULT_GROWTH, mris_irn_data_init); + env->aenv = be_get_birg_arch_env(birg); + env->irg = irg; env->visited = 0; - env->heights = heights_new(birg->irg); + env->heights = heights_new(irg); INIT_LIST_HEAD(&env->lineage_head); FIRM_DBG_REGISTER(env->dbg, "firm.be.sched.mris"); obstack_init(&env->obst); - irg_walk_graph(env->irg, firm_clear_link, NULL, NULL); - irg_block_walk_graph(birg->irg, block_walker, NULL, env); + irg_walk_graph(irg, firm_clear_link, NULL, NULL); + irg_block_walk_graph(irg, block_walker, NULL, env); obstack_free(&env->obst, NULL); // dump_ir_block_graph_mris(env, "-mris"); return env; diff --git a/ir/be/beschedrss.c b/ir/be/beschedrss.c index 61d84a605..ec7385a0a 100644 --- a/ir/be/beschedrss.c +++ b/ir/be/beschedrss.c @@ -37,6 +37,7 @@ #include "bemodule.h" #include "benode_t.h" #include "besched_t.h" +#include "beirg_t.h" #include #include @@ -2126,22 +2127,23 @@ BE_REGISTER_MODULE_CONSTRUCTOR(be_init_schedrss); * Preprocess the irg for scheduling. */ void rss_schedule_preparation(const be_irg_t *birg) { + ir_graph *irg = be_get_birg_irg(birg); rss_t rss; FIRM_DBG_REGISTER(rss.dbg, "firm.be.sched.rss"); //firm_dbg_set_mask(rss.dbg, LEVEL_1 | LEVEL_2 | LEVEL_3); - init_rss_special_nodes(birg->irg); + init_rss_special_nodes(irg); - rss.irg = birg->irg; - rss.arch_env = birg->main_env->arch_env; + rss.irg = irg; + rss.arch_env = be_get_birg_arch_env(birg); rss.abi = birg->abi; - rss.h = heights_new(birg->irg); + rss.h = heights_new(irg); rss.nodes = plist_new(); rss.opts = &rss_options; - rss.liveness = be_liveness(birg->irg); - irg_block_walk_graph(birg->irg, NULL, process_block, &rss); + rss.liveness = be_liveness(irg); + irg_block_walk_graph(irg, NULL, process_block, &rss); heights_free(rss.h); plist_free(rss.nodes); be_liveness_free(rss.liveness); diff --git a/ir/be/bespill.h b/ir/be/bespill.h index 585b7aaf5..8a159ae4e 100644 --- a/ir/be/bespill.h +++ b/ir/be/bespill.h @@ -15,7 +15,7 @@ #include "bechordal.h" #include "be_t.h" -#include "bearch.h" +#include "bearch_t.h" typedef struct _spill_env_t spill_env_t; diff --git a/ir/be/bespillbelady.c b/ir/be/bespillbelady.c index b80cdf9d5..c5e58b727 100644 --- a/ir/be/bespillbelady.c +++ b/ir/be/bespillbelady.c @@ -24,7 +24,7 @@ #include "xmalloc.h" #include "beutil.h" -#include "bearch.h" +#include "bearch_t.h" #include "bespillbelady.h" #include "beuses_t.h" #include "besched_t.h" diff --git a/ir/be/bespillbelady.h b/ir/be/bespillbelady.h index 2c0c12d0d..9375bed55 100644 --- a/ir/be/bespillbelady.h +++ b/ir/be/bespillbelady.h @@ -11,7 +11,7 @@ #include "be_t.h" #include "bechordal.h" -#include "bearch.h" +#include "bearch_t.h" #include "bespill.h" /** diff --git a/ir/be/bespillloc.c b/ir/be/bespillloc.c index 132481100..fae1addff 100644 --- a/ir/be/bespillloc.c +++ b/ir/be/bespillloc.c @@ -52,7 +52,7 @@ #include "irtools.h" #include "return.h" -#include "bearch.h" +#include "bearch_t.h" #include "firm/bearch_firm.h" #include "ia32/bearch_ia32.h" #include "arm/bearch_arm.h" diff --git a/ir/be/bespillremat.c b/ir/be/bespillremat.c index e742f8a39..4380b3bfd 100644 --- a/ir/be/bespillremat.c +++ b/ir/be/bespillremat.c @@ -42,10 +42,11 @@ #include #include "be_t.h" +#include "beirg_t.h" #include "belive_t.h" #include "besched_t.h" #include "bessaconstr.h" -#include "bearch.h" +#include "bearch_t.h" #include "beabi.h" #include "benode_t.h" #include "beutil.h" diff --git a/ir/be/bessadestr.c b/ir/be/bessadestr.c index 39f4480b3..c91f96897 100644 --- a/ir/be/bessadestr.c +++ b/ir/be/bessadestr.c @@ -24,7 +24,7 @@ #include "be_t.h" #include "beutil.h" #include "bechordal_t.h" -#include "bearch.h" +#include "bearch_t.h" #include "belive_t.h" #include "benode_t.h" #include "besched_t.h" diff --git a/ir/be/bessadestrsimple.c b/ir/be/bessadestrsimple.c index a8db0ff82..20e816b35 100644 --- a/ir/be/bessadestrsimple.c +++ b/ir/be/bessadestrsimple.c @@ -29,7 +29,7 @@ #include "beraextern.h" #include "beabi.h" -#include "bearch.h" +#include "bearch_t.h" #include "benode_t.h" #include "beirgmod.h" #include "besched_t.h" diff --git a/ir/be/bestat.c b/ir/be/bestat.c index c576fe6f8..4e57152f8 100644 --- a/ir/be/bestat.c +++ b/ir/be/bestat.c @@ -101,7 +101,8 @@ struct a_pressure_walker { static void stat_reg_pressure_block(ir_node *block, void *data) { struct a_pressure_walker *env = data; be_irg_t *birg = env->birg; - const arch_env_t *aenv = birg->main_env->arch_env; + ir_graph *irg = be_get_birg_irg(birg); + const arch_env_t *aenv = be_get_birg_arch_env(birg); int i, n = arch_isa_get_n_reg_class(aenv->isa); for (i = 0; i < n; i++) { @@ -124,18 +125,20 @@ static void stat_reg_pressure_block(ir_node *block, void *data) { max_live = cnt < max_live ? max_live : cnt; } - stat_be_block_regpressure(birg->irg, block, max_live, cls->name); + stat_be_block_regpressure(irg, block, max_live, cls->name); } } void be_do_stat_reg_pressure(be_irg_t *birg) { + ir_graph *irg = be_get_birg_irg(birg); + if (stat_is_active()) { struct a_pressure_walker w; w.birg = birg; - w.lv = be_liveness(birg->irg); + w.lv = be_liveness(irg); /* Collect register pressure information for each block */ - irg_block_walk_graph(birg->irg, stat_reg_pressure_block, NULL, &w); + irg_block_walk_graph(irg, stat_reg_pressure_block, NULL, &w); be_liveness_free(w.lv); } } diff --git a/ir/be/bestate.c b/ir/be/bestate.c index f953bcd26..34544232c 100644 --- a/ir/be/bestate.c +++ b/ir/be/bestate.c @@ -23,7 +23,7 @@ #include "ircons_t.h" #include "irgmod.h" -#include "bearch.h" +#include "bearch_t.h" #include "beuses_t.h" #include "besched_t.h" #include "belive_t.h" @@ -495,7 +495,7 @@ void be_assure_state(be_irg_t *birg, const arch_register_t *reg, void *func_env, } obstack_init(&env.obst); - env.arch_env = birg->main_env->arch_env; + env.arch_env = be_get_birg_arch_env(birg); env.reg = reg; env.func_env = func_env; env.create_spill = create_spill; diff --git a/ir/be/bestate.h b/ir/be/bestate.h index 947b37dd1..54a955ee8 100644 --- a/ir/be/bestate.h +++ b/ir/be/bestate.h @@ -13,7 +13,7 @@ #include "irnode.h" #include "beirg.h" -#include "bearch.h" +#include "bearch_t.h" /** * Callback that should create a spill for a certain value. Can return NULL diff --git a/ir/be/beuses.c b/ir/be/beuses.c index bdb987549..e6f340e19 100644 --- a/ir/be/beuses.c +++ b/ir/be/beuses.c @@ -33,7 +33,7 @@ #include "benode_t.h" #include "besched_t.h" #include "beirgmod.h" -#include "bearch.h" +#include "bearch_t.h" #include "beuses_t.h" #include "benodesets.h" diff --git a/ir/be/beuses.h b/ir/be/beuses.h index b69ddc106..5a63f95d4 100644 --- a/ir/be/beuses.h +++ b/ir/be/beuses.h @@ -11,7 +11,7 @@ #ifndef _BEUSES_H #define _BEUSES_H -#include "bearch.h" +#include "bearch_t.h" #include "belive.h" typedef struct _be_next_use_t { diff --git a/ir/be/beutil.c b/ir/be/beutil.c index 5a133a0f4..c8a666e4c 100644 --- a/ir/be/beutil.c +++ b/ir/be/beutil.c @@ -24,7 +24,7 @@ #include "beutil.h" #include "besched_t.h" -#include "bearch.h" +#include "bearch_t.h" /* Get an always empty set. */ pset *be_empty_set(void) diff --git a/ir/be/beutil.h b/ir/be/beutil.h index 5f17a78a8..47af83a60 100644 --- a/ir/be/beutil.h +++ b/ir/be/beutil.h @@ -8,7 +8,7 @@ #include "pset.h" #include "irnode.h" -#include "bearch.h" +#include "bearch_t.h" /* iterate over a list of ir_nodes linked by link field */ #define foreach_linked_irns(head, iter) for ((iter) = (head); (iter); (iter) = get_irn_link((iter))) diff --git a/ir/be/beverify.c b/ir/be/beverify.c index 62ee7d560..2368a9a53 100644 --- a/ir/be/beverify.c +++ b/ir/be/beverify.c @@ -26,6 +26,7 @@ #include "belive.h" #include "besched_t.h" #include "benode_t.h" +#include "beirg_t.h" static int my_values_interfere(const ir_node *a, const ir_node *b); @@ -92,7 +93,9 @@ static void verify_liveness_walker(ir_node *block, void *data) { /** * Start a walk over the irg and check the register pressure. */ -int be_verify_register_pressure(const be_irg_t *birg, const arch_register_class_t *cls, ir_graph *irg) { +int be_verify_register_pressure(const be_irg_t *birg, + const arch_register_class_t *cls, + ir_graph *irg) { be_verify_register_pressure_env_t env; env.lv = be_liveness(irg); diff --git a/ir/be/firm/bearch_firm.c b/ir/be/firm/bearch_firm.c index c60d23b54..a808ad854 100644 --- a/ir/be/firm/bearch_firm.c +++ b/ir/be/firm/bearch_firm.c @@ -18,7 +18,7 @@ #include "irtools.h" #include "../be_t.h" -#include "../bearch.h" +#include "../bearch_t.h" #include "../besched.h" #include "../beutil.h" #include "../beabi.h" @@ -581,7 +581,7 @@ static void *firm_cg_init(be_irg_t *birg) { firm_code_gen_t *cg = xmalloc(sizeof(*cg)); cg->impl = &firm_code_gen_if; - cg->irg = birg->irg; + cg->irg = be_get_birg_irg(birg); return cg; } diff --git a/ir/be/firm/bearch_firm.h b/ir/be/firm/bearch_firm.h index 7217e195f..5d0235680 100644 --- a/ir/be/firm/bearch_firm.h +++ b/ir/be/firm/bearch_firm.h @@ -13,7 +13,7 @@ #ifndef _BEARCH_FIRM_H #define _BEARCH_FIRM_H -#include "../bearch.h" +#include "../bearch_t.h" extern const arch_isa_if_t firm_isa; extern const arch_irn_handler_t firm_irn_handler; diff --git a/ir/be/ia32/bearch_ia32.c b/ir/be/ia32/bearch_ia32.c index ecaa4eb44..010e51aa0 100644 --- a/ir/be/ia32/bearch_ia32.c +++ b/ir/be/ia32/bearch_ia32.c @@ -29,7 +29,7 @@ #include "xmalloc.h" #include "../beabi.h" -#include "../beirg.h" +#include "../beirg_t.h" #include "../benode_t.h" #include "../belower.h" #include "../besched_t.h" @@ -1074,15 +1074,12 @@ static void transform_to_Store(ia32_code_gen_t *cg, ir_node *node) { store = new_rd_ia32_xStore(dbg, irg, block, ptr, noreg, val, nomem); else store = new_rd_ia32_vfst(dbg, irg, block, ptr, noreg, val, nomem); - } - else if (get_mode_size_bits(mode) == 128) { + } else if (get_mode_size_bits(mode) == 128) { // Spill 128 bit SSE registers store = new_rd_ia32_xxStore(dbg, irg, block, ptr, noreg, val, nomem); - } - else if (get_mode_size_bits(mode) == 8) { + } else if (get_mode_size_bits(mode) == 8) { store = new_rd_ia32_Store8Bit(dbg, irg, block, ptr, noreg, val, nomem); - } - else { + } else { store = new_rd_ia32_Store(dbg, irg, block, ptr, noreg, val, nomem); } diff --git a/ir/be/ia32/ia32_emitter.c b/ir/be/ia32/ia32_emitter.c index 19e80a0f9..68905ea5e 100644 --- a/ir/be/ia32/ia32_emitter.c +++ b/ir/be/ia32/ia32_emitter.c @@ -30,6 +30,7 @@ #include "../be_dbgout.h" #include "../beemitter.h" #include "../begnuas.h" +#include "../beirg_t.h" #include "ia32_emitter.h" #include "gen_ia32_emitter.h" @@ -253,6 +254,8 @@ void ia32_emit_immediate(ia32_emit_env_t *env, const ir_node *node) ir_entity *ent; ident *id; + be_emit_char(env, '$'); + switch(get_ia32_immop_type(node)) { case ia32_ImmConst: tv = get_ia32_Immop_tarval(node); @@ -372,7 +375,6 @@ void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) { switch(get_ia32_op_type(node)) { case ia32_Normal: if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) { - be_emit_char(env, '$'); ia32_emit_immediate(env, node); be_emit_cstring(env, ", "); ia32_emit_source_register(env, node, 2); @@ -399,24 +401,19 @@ void ia32_emit_binop(ia32_emit_env_t *env, const ir_node *node) { } break; case ia32_AddrModeS: + ia32_emit_am(env, node); + be_emit_cstring(env, ", "); if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) { assert(!produces_result(node) && "Source AM with Const must not produce result"); - ia32_emit_am(env, node); - be_emit_cstring(env, ", $"); ia32_emit_immediate(env, node); } else if (produces_result(node)) { - ia32_emit_am(env, node); - be_emit_cstring(env, ", "); ia32_emit_dest_register(env, node, 0); } else { - ia32_emit_am(env, node); - be_emit_cstring(env, ", "); ia32_emit_source_register(env, node, 2); } break; case ia32_AddrModeD: if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) { - be_emit_char(env, '$'); ia32_emit_immediate(env, node); be_emit_cstring(env, ", "); ia32_emit_am(env, node); @@ -485,7 +482,6 @@ void ia32_emit_unop(ia32_emit_env_t *env, const ir_node *node) { switch(get_ia32_op_type(node)) { case ia32_Normal: if (is_ia32_ImmConst(node) || is_ia32_ImmSymConst(node)) { - be_emit_char(env, '$'); ia32_emit_immediate(env, node); } else { if (is_ia32_Mul(node) || is_ia32_IMul1OP(node)) { @@ -783,7 +779,7 @@ void emit_ia32_CondJmp(ia32_emit_env_t *env, const ir_node *node) { static void TestJmp_emitter(ia32_emit_env_t *env, const ir_node *node) { if(is_ia32_ImmSymConst(node) || is_ia32_ImmConst(node)) { - be_emit_cstring(env, "\ttest $"); + be_emit_cstring(env, "\ttest "); ia32_emit_immediate(env, node); be_emit_cstring(env, ", "); ia32_emit_source_register(env, node, 0); @@ -1581,12 +1577,14 @@ static void Copy_emitter(ia32_emit_env_t *env, const ir_node *node, const ir_node *op) { const arch_env_t *aenv = env->arch_env; + ir_mode *mode; if (REGS_ARE_EQUAL(arch_get_irn_register(aenv, node), arch_get_irn_register(aenv, op)) || arch_register_type_is(arch_get_irn_register(aenv, op), virtual)) return; - if (mode_is_float(get_irn_mode(node))) { + mode = get_irn_mode(node); + if (mode == mode_LLu) { be_emit_cstring(env, "\tmovsd "); ia32_emit_source_register(env, node, 0); be_emit_cstring(env, ", "); @@ -1665,7 +1663,7 @@ void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) { ia32_immop_type_t imm_tp = get_ia32_immop_type(node); if (imm_tp == ia32_ImmSymConst) { - be_emit_cstring(env, "\tmovl $"); + be_emit_cstring(env, "\tmovl "); ia32_emit_immediate(env, node); be_emit_cstring(env, ", "); ia32_emit_dest_register(env, node, 0); @@ -1684,7 +1682,7 @@ void emit_ia32_Const(ia32_emit_env_t *env, const ir_node *node) { be_emit_cstring(env, ", "); ia32_emit_dest_register(env, node, 0); } else { - be_emit_cstring(env, "\tmovl $"); + be_emit_cstring(env, "\tmovl "); ia32_emit_immediate(env, node); be_emit_cstring(env, ", "); ia32_emit_dest_register(env, node, 0); diff --git a/ir/be/ia32/ia32_emitter.h b/ir/be/ia32/ia32_emitter.h index aa2705f89..d272af33f 100644 --- a/ir/be/ia32/ia32_emitter.h +++ b/ir/be/ia32/ia32_emitter.h @@ -10,7 +10,7 @@ #include "irnode.h" #include "debug.h" -#include "../bearch.h" +#include "../bearch_t.h" #include "../beemitter.h" #include "bearch_ia32_t.h" diff --git a/ir/be/ia32/ia32_finish.c b/ir/be/ia32/ia32_finish.c index 804202b8b..8b932c426 100644 --- a/ir/be/ia32/ia32_finish.c +++ b/ir/be/ia32/ia32_finish.c @@ -16,7 +16,7 @@ #include "pdeq.h" #include "error.h" -#include "../bearch.h" +#include "../bearch_t.h" #include "../besched_t.h" #include "../benode_t.h" diff --git a/ir/be/ia32/ia32_fpu.c b/ir/be/ia32/ia32_fpu.c index 4ab0fbbcc..ee9f1b8df 100644 --- a/ir/be/ia32/ia32_fpu.c +++ b/ir/be/ia32/ia32_fpu.c @@ -23,13 +23,14 @@ #include "array.h" #include "../beirgmod.h" -#include "../bearch.h" +#include "../bearch_t.h" #include "../besched.h" #include "../beabi.h" #include "../benode_t.h" #include "../bestate.h" #include "../beutil.h" #include "../bessaconstr.h" +#include "../beirg_t.h" static ir_node *create_fpu_mode_spill(void *env, ir_node *state, int force, ir_node *after) @@ -163,7 +164,7 @@ void rewire_fpu_mode_nodes(be_irg_t *birg) int i, len; /* do ssa construction for the fpu modes */ - env.arch_env = birg->main_env->arch_env; + env.arch_env = be_get_birg_arch_env(birg); env.state_nodes = NEW_ARR_F(ir_node*, 0); irg_walk_graph(irg, collect_fpu_mode_nodes_walker, NULL, &env); diff --git a/ir/be/ia32/ia32_map_regs.h b/ir/be/ia32/ia32_map_regs.h index ea2b63086..ac102199f 100644 --- a/ir/be/ia32/ia32_map_regs.h +++ b/ir/be/ia32/ia32_map_regs.h @@ -10,7 +10,7 @@ #include "irnode.h" #include "set.h" -#include "../bearch.h" +#include "../bearch_t.h" #include "ia32_nodes_attr.h" /** diff --git a/ir/be/ia32/ia32_new_nodes.c b/ir/be/ia32/ia32_new_nodes.c index a445dd25d..f9980872a 100644 --- a/ir/be/ia32/ia32_new_nodes.c +++ b/ir/be/ia32/ia32_new_nodes.c @@ -25,7 +25,7 @@ #include "raw_bitset.h" #include "xmalloc.h" -#include "../bearch.h" +#include "../bearch_t.h" #include "ia32_nodes_attr.h" #include "ia32_new_nodes.h" diff --git a/ir/be/ia32/ia32_nodes_attr.h b/ir/be/ia32/ia32_nodes_attr.h index 8560e262a..ff15086f2 100644 --- a/ir/be/ia32/ia32_nodes_attr.h +++ b/ir/be/ia32/ia32_nodes_attr.h @@ -12,7 +12,7 @@ #include #include "firm_types.h" -#include "../bearch.h" +#include "../bearch_t.h" #include "../bemachine.h" typedef enum { flavour_Div = 1, flavour_Mod, flavour_DivMod } ia32_op_flavour_t; @@ -107,7 +107,8 @@ typedef struct _ia32_attr_t { ir_entity *sc; /**< the symconst ident */ } cnst_val; - ir_mode *ls_mode; /**< the mode of the stored/loaded value, or the mode to convert to */ + ir_mode *ls_mode; /**< Load/Store mode: This is the mode of the value + that is manipulated by this node. */ ir_entity *frame_ent; /**< the frame entity attached to this node */ diff --git a/ir/be/ia32/ia32_spec.pl b/ir/be/ia32/ia32_spec.pl index 3446d3f05..123be3576 100644 --- a/ir/be/ia32/ia32_spec.pl +++ b/ir/be/ia32/ia32_spec.pl @@ -132,7 +132,7 @@ $arch = "ia32"; { name => "xmm7", type => 1 }, { name => "xmm_NOREG", type => 4 | 16 }, # we need a dummy register for NoReg nodes { name => "xmm_UKNWN", type => 4 | 8 | 16}, # we need a dummy register for Unknown nodes - { mode => "mode_E" } + { mode => "mode_LLu" } ], vfp => [ { name => "vf0", type => 1 | 16 }, @@ -162,8 +162,66 @@ $arch = "ia32"; { name => "fpcw", type => 4 | 32}, { mode => "mode_Hu" } ], + flags => [ + { name => "eflags", type => 4 }, + { mode => "mode_Iu" } + ], + fp_sw => [ + { name => "fpsw", type => 4 }, + { mode => "mode_Hu" } + ], ); # %reg_classes +%flags = ( + CF => { reg => "eflags", bit => 0 }, + PF => { reg => "eflags", bit => 2 }, + AF => { reg => "eflags", bit => 4 }, + ZF => { reg => "eflags", bit => 6 }, + SF => { reg => "eflags", bit => 7 }, + TF => { reg => "eflags", bit => 8 }, + IF => { reg => "eflags", bit => 9 }, + DF => { reg => "eflags", bit => 10 }, + OF => { reg => "eflags", bit => 11 }, + IOPL0 => { reg => "eflags", bit => 12 }, + IOPL1 => { reg => "eflags", bit => 13 }, + NT => { reg => "eflags", bit => 14 }, + RF => { reg => "eflags", bit => 16 }, + VM => { reg => "eflags", bit => 17 }, + AC => { reg => "eflags", bit => 18 }, + VIF => { reg => "eflags", bit => 19 }, + VIP => { reg => "eflags", bit => 20 }, + ID => { reg => "eflags", bit => 21 }, + + FP_IE => { reg => "fpsw", bit => 0 }, + FP_DE => { reg => "fpsw", bit => 1 }, + FP_ZE => { reg => "fpsw", bit => 2 }, + FP_OE => { reg => "fpsw", bit => 3 }, + FP_UE => { reg => "fpsw", bit => 4 }, + FP_PE => { reg => "fpsw", bit => 5 }, + FP_SF => { reg => "fpsw", bit => 6 }, + FP_ES => { reg => "fpsw", bit => 7 }, + FP_C0 => { reg => "fpsw", bit => 8 }, + FP_C1 => { reg => "fpsw", bit => 9 }, + FP_C2 => { reg => "fpsw", bit => 10 }, + FP_TOP0 => { reg => "fpsw", bit => 11 }, + FP_TOP1 => { reg => "fpsw", bit => 12 }, + FP_TOP2 => { reg => "fpsw", bit => 13 }, + FP_C3 => { reg => "fpsw", bit => 14 }, + FP_B => { reg => "fpsw", bit => 15 }, + + FP_IM => { reg => "fpcw", bit => 0 }, + FP_DM => { reg => "fpcw", bit => 1 }, + FP_ZM => { reg => "fpcw", bit => 2 }, + FP_OM => { reg => "fpcw", bit => 3 }, + FP_UM => { reg => "fpcw", bit => 4 }, + FP_PM => { reg => "fpcw", bit => 5 }, + FP_PC0 => { reg => "fpcw", bit => 8 }, + FP_PC1 => { reg => "fpcw", bit => 9 }, + FP_RC0 => { reg => "fpcw", bit => 10 }, + FP_RC1 => { reg => "fpcw", bit => 11 }, + FP_X => { reg => "fpcw", bit => 12 } +); # %flags + %cpu = ( GP => [ 1, "GP_EAX", "GP_EBX", "GP_ECX", "GP_EDX", "GP_ESI", "GP_EDI", "GP_EBP" ], SSE => [ 1, "SSE_XMM0", "SSE_XMM1", "SSE_XMM2", "SSE_XMM3", "SSE_XMM4", "SSE_XMM5", "SSE_XMM6", "SSE_XMM7" ], @@ -201,7 +259,7 @@ $arch = "ia32"; C => "${arch}_emit_immediate(env, node);", SE => "${arch}_emit_extend_suffix(env, get_ia32_ls_mode(node));", ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n - ia32_emit_mode_suffix(env, get_ia32_ls_mode(node));", + ia32_emit_mode_suffix(env, get_ia32_ls_mode(node));", M => "${arch}_emit_mode_suffix(env, get_ia32_ls_mode(node));", XM => "${arch}_emit_x87_mode_suffix(env, node);", XXM => "${arch}_emit_xmm_mode_suffix(env, node);", @@ -228,6 +286,12 @@ $default_cmp_attr = "return ia32_compare_attr(attr_a, attr_b);"; %operands = ( ); +$mode_xmm = "mode_LLu"; +$mode_gp = "mode_Iu"; +$status_flags = [ "CF", "PF", "AF", "ZF", "SF", "OF" ]; +$fpcw_flags = [ "FP_IM", "FP_DM", "FP_ZM", "FP_OM", "FP_UM", "FP_PM", + "FP_PC0", "FP_PC1", "FP_RC0", "FP_RC1", "FP_X" ]; + %nodes = ( #-----------------------------------------------------------------# @@ -257,7 +321,8 @@ Add => { reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] }, emit => '. addl %binop', units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, + modified_flags => $status_flags }, Adc => { @@ -265,7 +330,8 @@ Adc => { reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] }, emit => '. adcl %binop', units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, + modified_flags => $status_flags }, Add64Bit => { @@ -281,6 +347,7 @@ Add64Bit => { ', outs => [ "low_res", "high_res" ], units => [ "GP" ], + modified_flags => $status_flags }, l_Add => { @@ -307,6 +374,7 @@ Mul => { outs => [ "EAX", "EDX", "M" ], latency => 10, units => [ "GP" ], + modified_flags => $status_flags }, l_Mul => { @@ -326,7 +394,8 @@ IMul => { emit => '. imull %binop', latency => 5, units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, + modified_flags => $status_flags }, IMul1OP => { @@ -337,6 +406,7 @@ IMul1OP => { outs => [ "EAX", "EDX", "M" ], latency => 5, units => [ "GP" ], + modified_flags => $status_flags }, l_IMul => { @@ -352,7 +422,8 @@ And => { reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] }, emit => '. andl %binop', units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, + modified_flags => $status_flags }, Or => { @@ -361,7 +432,8 @@ Or => { reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] }, emit => '. orl %binop', units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, + modified_flags => $status_flags }, Xor => { @@ -370,14 +442,16 @@ Xor => { reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] }, emit => '. xorl %binop', units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, + modified_flags => $status_flags }, l_Xor => { op_flags => "C", cmp_attr => "return 1;", comment => "construct lowered Xor: Xor(a, b) = Xor(b, a) = a XOR b", - arity => 2 + arity => 2, + modified_flags => $status_flags }, # not commutative operations @@ -388,7 +462,8 @@ Sub => { reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3" ] }, emit => '. subl %binop', units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, + modified_flags => $status_flags }, Sbb => { @@ -396,7 +471,8 @@ Sbb => { reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "in_r3 !in_r4" ] }, emit => '. sbbl %binop', units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, + modified_flags => $status_flags }, Sub64Bit => { @@ -412,6 +488,7 @@ Sub64Bit => { ', outs => [ "low_res", "high_res" ], units => [ "GP" ], + modified_flags => $status_flags }, l_Sub => { @@ -437,6 +514,7 @@ IDiv => { outs => [ "div_res", "mod_res", "M" ], latency => 25, units => [ "GP" ], + modified_flags => $status_flags }, Div => { @@ -449,6 +527,7 @@ Div => { outs => [ "div_res", "mod_res", "M" ], latency => 25, units => [ "GP" ], + modified_flags => $status_flags }, Shl => { @@ -457,7 +536,8 @@ Shl => { reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] }, emit => '. shll %binop', units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, + modified_flags => $status_flags }, l_Shl => { @@ -496,7 +576,8 @@ if (get_ia32_immop_type(node) == ia32_ImmNone) { ', latency => 6, units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, + modified_flags => $status_flags }, l_ShlD => { @@ -511,7 +592,8 @@ Shr => { reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] }, emit => '. shrl %binop', units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, + modified_flags => $status_flags }, l_Shr => { @@ -549,7 +631,8 @@ if (get_ia32_immop_type(node) == ia32_ImmNone) { ', latency => 6, units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, + modified_flags => $status_flags }, l_ShrD => { @@ -564,7 +647,8 @@ Sar => { reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] }, emit => '. sarl %binop', units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, + modified_flags => $status_flags }, l_Sar => { @@ -579,7 +663,8 @@ Ror => { reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] }, emit => '. rorl %binop', units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, + modified_flags => $status_flags }, Rol => { @@ -588,7 +673,8 @@ Rol => { reg_req => { in => [ "gp", "gp", "gp", "ecx", "none" ], out => [ "in_r3 !in_r4" ] }, emit => '. roll %binop', units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, + modified_flags => $status_flags }, # unary operations @@ -599,7 +685,8 @@ Neg => { reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] }, emit => '. negl %unop', units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, + modified_flags => $status_flags }, Minus64Bit => { @@ -615,6 +702,7 @@ Minus64Bit => { ', outs => [ "low_res", "high_res" ], units => [ "GP" ], + modified_flags => $status_flags }, @@ -630,7 +718,8 @@ Inc => { reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] }, emit => '. incl %unop', units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, + modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ] }, Dec => { @@ -639,7 +728,8 @@ Dec => { reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] }, emit => '. decl %unop', units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, + modified_flags => [ "OF", "SF", "ZF", "AF", "PF" ] }, Not => { @@ -648,7 +738,8 @@ Not => { reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3" ] }, emit => '. notl %unop', units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, + modified_flags => [] }, # other operations @@ -705,7 +796,7 @@ Const => { comment => "represents an integer constant", reg_req => { out => [ "gp" ] }, units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, }, Unknown_GP => { @@ -716,7 +807,7 @@ Unknown_GP => { reg_req => { out => [ "gp_UKNWN" ] }, units => [], emit => "", - mode => "mode_Iu" + mode => $mode_gp }, Unknown_VFP => { @@ -749,7 +840,7 @@ NoReg_GP => { reg_req => { out => [ "gp_NOREG" ] }, units => [], emit => "", - mode => "mode_Iu" + mode => $mode_gp }, NoReg_VFP => { @@ -783,6 +874,7 @@ ChangeCW => { mode => "mode_Hu", latency => 3, units => [ "GP" ], + modified_flags => $fpcw_flags }, FldCW => { @@ -794,6 +886,7 @@ FldCW => { emit => ". fldcw %AM", mode => "mode_Hu", units => [ "GP" ], + modified_flags => $fpcw_flags }, FnstCW => { @@ -876,7 +969,8 @@ Lea => { emit => '. leal %AM, %D1', latency => 2, units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, + modified_flags => [], }, Push => { @@ -886,6 +980,7 @@ Push => { outs => [ "stack:I|S", "M" ], latency => 3, units => [ "GP" ], + modified_flags => [], }, Pop => { @@ -895,6 +990,7 @@ Pop => { outs => [ "stack:I|S", "res", "M" ], latency => 4, units => [ "GP" ], + modified_flags => [], }, Enter => { @@ -922,6 +1018,7 @@ AddSP => { emit => '. addl %binop', outs => [ "stack:S", "M" ], units => [ "GP" ], + modified_flags => $status_flags }, SubSP => { @@ -931,6 +1028,7 @@ SubSP => { emit => '. subl %binop', outs => [ "stack:S", "M" ], units => [ "GP" ], + modified_flags => $status_flags }, LdTls => { @@ -1121,6 +1219,25 @@ xStoreSimple => { mode => "mode_M", }, +CvtSI2SS => { + op_flags => "L|F", + reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] }, + emit => '. cvtsi2ss %D1, %AM', + latency => 2, + units => [ "SSE" ], + mode => $mode_xmm +}, + +CvtSI2SD => { + op_flags => "L|F", + reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "xmm" ] }, + emit => '. cvtsi2sd %unop', + latency => 2, + units => [ "SSE" ], + mode => $mode_xmm +}, + + l_X87toSSE => { op_flags => "L|F", comment => "construct: transfer a value from x87 FPU into a SSE register", @@ -1167,7 +1284,8 @@ CopyB => { comment => "implements a memcopy: CopyB(dst, src, size, mem) == memcpy(dst, src, size)", reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] }, outs => [ "DST", "SRC", "CNT", "M" ], - units => [ "GP" ], + units => [ "GP" ], + modified_flags => [ "DF" ] }, CopyB_i => { @@ -1176,7 +1294,8 @@ CopyB_i => { comment => "implements a memcopy: CopyB(dst, src, mem) == memcpy(dst, src, attr(size))", reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] }, outs => [ "DST", "SRC", "M" ], - units => [ "GP" ], + units => [ "GP" ], + modified_flags => [ "DF" ] }, # Conversions @@ -1184,15 +1303,17 @@ CopyB_i => { Conv_I2I => { reg_req => { in => [ "gp", "gp", "gp", "none" ], out => [ "in_r3", "none" ] }, comment => "construct Conv Int -> Int", - units => [ "GP" ], - mode => "mode_Iu", + units => [ "GP" ], + mode => $mode_gp, + modified_flags => $status_flags }, Conv_I2I8Bit => { reg_req => { in => [ "gp", "gp", "eax ebx ecx edx", "none" ], out => [ "in_r3", "none" ] }, comment => "construct Conv Int -> Int", - units => [ "GP" ], - mode => "mode_Iu", + units => [ "GP" ], + mode => $mode_gp, + modified_flags => $status_flags }, Conv_I2FP => { @@ -1208,7 +1329,7 @@ Conv_FP2I => { comment => "construct Conv Floating Point -> Int", latency => 10, units => [ "SSE" ], - mode => "mode_Iu", + mode => $mode_gp, }, Conv_FP2FP => { @@ -1225,7 +1346,7 @@ CmpCMov => { reg_req => { in => [ "gp", "gp", "gp", "gp" ], out => [ "in_r4" ] }, latency => 2, units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, }, PsiCondCMov => { @@ -1234,7 +1355,7 @@ PsiCondCMov => { reg_req => { in => [ "gp", "gp", "gp" ], out => [ "in_r3" ] }, latency => 2, units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, }, xCmpCMov => { @@ -1243,7 +1364,7 @@ xCmpCMov => { reg_req => { in => [ "xmm", "xmm", "gp", "gp" ], out => [ "in_r4" ] }, latency => 5, units => [ "SSE" ], - mode => "mode_Iu", + mode => $mode_gp, }, vfCmpCMov => { @@ -1252,7 +1373,7 @@ vfCmpCMov => { reg_req => { in => [ "vfp", "vfp", "gp", "gp" ], out => [ "in_r4" ] }, latency => 10, units => [ "VFP" ], - mode => "mode_Iu", + mode => $mode_gp, }, CmpSet => { @@ -1261,7 +1382,7 @@ CmpSet => { reg_req => { in => [ "gp", "gp", "gp", "gp", "none" ], out => [ "eax ebx ecx edx" ] }, latency => 2, units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, }, PsiCondSet => { @@ -1270,7 +1391,7 @@ PsiCondSet => { reg_req => { in => [ "gp" ], out => [ "eax ebx ecx edx" ] }, latency => 2, units => [ "GP" ], - mode => "mode_Iu", + mode => $mode_gp, }, xCmpSet => { @@ -1279,7 +1400,7 @@ xCmpSet => { reg_req => { in => [ "gp", "gp", "xmm", "xmm", "none" ], out => [ "eax ebx ecx edx" ] }, latency => 5, units => [ "SSE" ], - mode => "mode_Iu", + mode => $mode_gp, }, vfCmpSet => { @@ -1288,7 +1409,7 @@ vfCmpSet => { reg_req => { in => [ "gp", "gp", "vfp", "vfp", "none" ], out => [ "eax ebx ecx edx" ] }, latency => 10, units => [ "VFP" ], - mode => "mode_Iu", + mode => $mode_gp, }, vfCMov => { diff --git a/ir/be/ia32/ia32_transform.c b/ir/be/ia32/ia32_transform.c index cf0c1a230..b44fb7bbe 100644 --- a/ir/be/ia32/ia32_transform.c +++ b/ir/be/ia32/ia32_transform.c @@ -38,6 +38,7 @@ #include "../besched.h" #include "../beabi.h" #include "../beutil.h" +#include "../beirg_t.h" #include "bearch_ia32_t.h" #include "ia32_nodes_attr.h" @@ -65,6 +66,9 @@ #define ENT_SFP_ABS "IA32_SFP_ABS" #define ENT_DFP_ABS "IA32_DFP_ABS" +#define mode_vfp (ia32_reg_classes[CLASS_ia32_vfp].mode) +#define mode_xmm (ia32_reg_classes[CLASS_ia32_xmm].mode) + DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;) typedef struct ia32_transform_env_t { @@ -226,9 +230,10 @@ static ir_entity *get_entity_for_tv(ia32_code_gen_t *cg, ir_node *cnst) current_ir_graph = rem; pmap_insert(cg->isa->tv_ent, tv, res); - } - else + } else { res = e->value; + } + return res; } @@ -254,32 +259,34 @@ static ir_node *gen_Const(ia32_transform_env_t *env, ir_node *node) { if (clss == CNST_NULL) { load = new_rd_ia32_vfldz(dbgi, irg, block); - res = load; + res = load; } else if (clss == CNST_ONE) { load = new_rd_ia32_vfld1(dbgi, irg, block); - res = load; + res = load; } else { floatent = get_entity_for_tv(env->cg, node); - load = new_rd_ia32_vfld(dbgi, irg, block, noreg, noreg, nomem); + load = new_rd_ia32_vfld(dbgi, irg, block, noreg, noreg, nomem); set_ia32_am_support(load, ia32_am_Source); set_ia32_op_type(load, ia32_AddrModeS); set_ia32_am_flavour(load, ia32_am_N); set_ia32_am_sc(load, floatent); - res = new_r_Proj(irg, block, load, mode_E, pn_ia32_vfld_res); + res = new_r_Proj(irg, block, load, mode_vfp, pn_ia32_vfld_res); } + set_ia32_ls_mode(load, mode); } else { floatent = get_entity_for_tv(env->cg, node); - load = new_rd_ia32_xLoad(dbgi, irg, block, noreg, noreg, nomem); + load = new_rd_ia32_xLoad(dbgi, irg, block, noreg, noreg, nomem); set_ia32_am_support(load, ia32_am_Source); set_ia32_op_type(load, ia32_AddrModeS); set_ia32_am_flavour(load, ia32_am_N); set_ia32_am_sc(load, floatent); - res = new_r_Proj(irg, block, load, mode_E, pn_ia32_xLoad_res); + set_ia32_ls_mode(load, mode); + + res = new_r_Proj(irg, block, load, mode_xmm, pn_ia32_xLoad_res); } - set_ia32_ls_mode(load, mode); SET_IA32_ORIG_NODE(load, ia32_get_old_node_name(env->cg, node)); /* Const Nodes before the initial IncSP are a bad idea, because @@ -366,8 +373,8 @@ static ir_node *gen_sse_conv_int2float(ia32_code_gen_t *cg, dbg_info *dbgi, } /** -* SSE convert of an float node into a double node. -*/ + * SSE convert of an float node into a double node. + */ static ir_node *gen_sse_conv_f2d(ia32_code_gen_t *cg, dbg_info *dbgi, ir_graph *irg, ir_node *block, ir_node *in, ir_node *old_node) @@ -377,7 +384,7 @@ static ir_node *gen_sse_conv_f2d(ia32_code_gen_t *cg, dbg_info *dbgi, ir_node *conv = new_rd_ia32_Conv_FP2FP(dbgi, irg, block, noreg, noreg, in, nomem); set_ia32_am_support(conv, ia32_am_Source); - set_ia32_ls_mode(conv, mode_E); + set_ia32_ls_mode(conv, mode_xmm); SET_IA32_ORIG_NODE(conv, ia32_get_old_node_name(cg, old_node)); return conv; @@ -411,7 +418,7 @@ ir_entity *ia32_gen_fp_known_const(ia32_known_const_t kct) { cnst_str = names[kct].cnst_str; //mode = kct == ia32_SSIGN || kct == ia32_SABS ? mode_Iu : mode_Lu; - mode = mode_LLu; + mode = mode_xmm; tv = new_tarval_from_str(cnst_str, strlen(cnst_str), mode); tp = new_type_primitive(new_id_from_str(tp_name), mode); ent = new_entity(get_glob_type(), new_id_from_str(ent_name), tp); @@ -452,9 +459,11 @@ const char *ia32_get_old_node_name(ia32_code_gen_t *cg, ir_node *irn) { /* determine if one operator is an Imm */ static ir_node *get_immediate_op(ir_node *op1, ir_node *op2) { - if (op1) + if (op1) { return is_ia32_Cnst(op1) ? op1 : (is_ia32_Cnst(op2) ? op2 : NULL); - else return is_ia32_Cnst(op2) ? op2 : NULL; + } else { + return is_ia32_Cnst(op2) ? op2 : NULL; + } } /* determine if one operator is not an Imm */ @@ -2035,8 +2044,8 @@ static ir_node *gen_Psi(ia32_transform_env_t *env, ir_node *node) { /* in case the compare operands are int, we move them into xmm register */ if (! mode_is_float(get_irn_mode(cmp_a))) { - new_cmp_a = gen_sse_conv_int2float(cg, dbgi, irg, block, new_cmp_a, node, mode_E); - new_cmp_b = gen_sse_conv_int2float(cg, dbgi, irg, block, new_cmp_b, node, mode_E); + new_cmp_a = gen_sse_conv_int2float(cg, dbgi, irg, block, new_cmp_a, node, mode_xmm); + new_cmp_b = gen_sse_conv_int2float(cg, dbgi, irg, block, new_cmp_b, node, mode_xmm); pnc |= 8; /* transform integer compare to fp compare */ } @@ -2218,8 +2227,7 @@ static ir_node *gen_x87_gp_to_fp(ia32_transform_env_t *env, ir_node *node, ir_mo ia32_code_gen_t *cg = env->cg; #endif ir_graph *irg = env->irg; - dbg_info *dbgi = get_irn_dbg_info(node); - ir_mode *mode = get_irn_mode(node); + dbg_info *dbgi = get_irn_dbg_info(node); ir_node *block = transform_node(env, get_nodes_block(node)); ir_node *noreg = ia32_new_NoReg_gp(env->cg); ir_node *nomem = new_NoMem(); @@ -2260,7 +2268,7 @@ static ir_node *gen_x87_gp_to_fp(ia32_transform_env_t *env, ir_node *node, ir_mo set_ia32_am_flavour(fild, ia32_am_OB); set_ia32_ls_mode(fild, mode_Iu); - return new_r_Proj(irg, block, fild, mode_F, pn_ia32_vfild_res); + return new_r_Proj(irg, block, fild, mode_vfp, pn_ia32_vfild_res); } /** @@ -2328,8 +2336,8 @@ static ir_node *gen_Conv(ia32_transform_env_t *env, ir_node *node) { } else { return gen_x87_gp_to_fp(env, node, src_mode); } - } - else { + } else { + /* to int */ ir_mode *smaller_mode; int smaller_bits; @@ -2409,13 +2417,13 @@ static ir_node *gen_be_StackParam(ia32_transform_env_t *env, ir_node *node) { FP_USED(env->cg); if (USE_SSE2(env->cg)) { new_op = new_rd_ia32_xLoad(dbgi, irg, block, new_ptr, noreg, nomem); - pn_res = pn_ia32_xLoad_res; + pn_res = pn_ia32_xLoad_res; + proj_mode = mode_xmm; } else { new_op = new_rd_ia32_vfld(dbgi, irg, block, new_ptr, noreg, nomem); - pn_res = pn_ia32_vfld_res; + pn_res = pn_ia32_vfld_res; + proj_mode = mode_vfp; } - - proj_mode = mode_E; } else { new_op = new_rd_ia32_Load(dbgi, irg, block, new_ptr, noreg, nomem); proj_mode = mode_Iu; @@ -2527,15 +2535,12 @@ static ir_node *gen_be_FrameStore(ia32_transform_env_t *env, ir_node *node) { FP_USED(env->cg); if (USE_SSE2(env->cg)) { new_op = new_rd_ia32_xStore(dbgi, irg, block, new_ptr, noreg, new_val, new_mem); - } - else { + } else { new_op = new_rd_ia32_vfst(dbgi, irg, block, new_ptr, noreg, new_val, new_mem); } - } - else if (get_mode_size_bits(mode) == 8) { + } else if (get_mode_size_bits(mode) == 8) { new_op = new_rd_ia32_Store8Bit(dbgi, irg, block, new_ptr, noreg, new_val, new_mem); - } - else { + } else { new_op = new_rd_ia32_Store(dbgi, irg, block, new_ptr, noreg, new_val, new_mem); } @@ -2624,7 +2629,7 @@ static ir_node *gen_be_Return(ia32_transform_env_t *env, ir_node *node) { set_ia32_am_support(fld, ia32_am_Source); mproj = new_r_Proj(irg, block, fld, mode_M, pn_ia32_SetST0_M); - fld = new_r_Proj(irg, block, fld, mode_E, pn_ia32_SetST0_res); + fld = new_r_Proj(irg, block, fld, mode_vfp, pn_ia32_SetST0_res); arch_set_irn_register(env->cg->arch_env, fld, &ia32_vfp_regs[REG_VF0]); /* create a new barrier */ @@ -2745,8 +2750,11 @@ static ir_node *gen_Phi(ia32_transform_env_t *env, ir_node *node) { mode = mode_Iu; } else if(mode_is_float(mode)) { assert(mode == mode_D || mode == mode_F); - // all float operations are on mode_E registers - mode = mode_E; + if (USE_SSE2(env->cg)) { + mode = mode_xmm; + } else { + mode = mode_vfp; + } } /* phi nodes allow loops, so we use the old arguments for now @@ -3132,7 +3140,7 @@ static ir_node *gen_ia32_l_X87toSSE(ia32_transform_env_t *env, ir_node *node) { set_ia32_am_support(res, ia32_am_Source); set_ia32_am_flavour(res, ia32_B); set_ia32_op_type(res, ia32_AddrModeS); - res = new_rd_Proj(dbgi, irg, block, res, mode_E, pn_ia32_xLoad_res); + res = new_rd_Proj(dbgi, irg, block, res, mode_xmm, pn_ia32_xLoad_res); return res; } @@ -3193,7 +3201,7 @@ static ir_node *gen_ia32_l_SSEtoX87(ia32_transform_env_t *env, ir_node *node) { set_ia32_am_support(res, ia32_am_Source); set_ia32_am_flavour(res, ia32_B); set_ia32_op_type(res, ia32_AddrModeS); - res = new_rd_Proj(dbgi, irg, block, res, lsmode, pn_ia32_vfld_res); + res = new_rd_Proj(dbgi, irg, block, res, mode_vfp, pn_ia32_vfld_res); return res; } @@ -3336,13 +3344,13 @@ static ir_node *gen_Proj_Load(ia32_transform_env_t *env, ir_node *node) { } } else if(is_ia32_xLoad(new_pred)) { if(proj == pn_Load_res) { - return new_rd_Proj(dbgi, irg, block, new_pred, mode_E, pn_ia32_xLoad_res); + return new_rd_Proj(dbgi, irg, block, new_pred, mode_xmm, pn_ia32_xLoad_res); } else if(proj == pn_Load_M) { return new_rd_Proj(dbgi, irg, block, new_pred, mode_M, pn_ia32_xLoad_M); } } else if(is_ia32_vfld(new_pred)) { if(proj == pn_Load_res) { - return new_rd_Proj(dbgi, irg, block, new_pred, mode_E, pn_ia32_vfld_res); + return new_rd_Proj(dbgi, irg, block, new_pred, mode_vfp, pn_ia32_vfld_res); } else if(proj == pn_Load_M) { return new_rd_Proj(dbgi, irg, block, new_pred, mode_M, pn_ia32_vfld_M); } @@ -3449,7 +3457,7 @@ static ir_node *gen_Proj_l_vfdiv(ia32_transform_env_t *env, ir_node *node) case pn_ia32_l_vfdiv_M: return new_rd_Proj(dbgi, irg, block, new_pred, mode_M, pn_ia32_vfdiv_M); case pn_ia32_l_vfdiv_res: - return new_rd_Proj(dbgi, irg, block, new_pred, mode_E, pn_ia32_vfdiv_res); + return new_rd_Proj(dbgi, irg, block, new_pred, mode_vfp, pn_ia32_vfdiv_res); default: assert(0); } @@ -3480,10 +3488,10 @@ static ir_node *gen_Proj_Quot(ia32_transform_env_t *env, ir_node *node) break; case pn_Quot_res: if(is_ia32_xDiv(new_pred)) { - return new_rd_Proj(dbgi, irg, block, new_pred, mode_E, + return new_rd_Proj(dbgi, irg, block, new_pred, mode_xmm, pn_ia32_xDiv_res); } else if(is_ia32_vfdiv(new_pred)) { - return new_rd_Proj(dbgi, irg, block, new_pred, mode_E, + return new_rd_Proj(dbgi, irg, block, new_pred, mode_vfp, pn_ia32_vfdiv_res); } break; @@ -3571,8 +3579,7 @@ static ir_node *gen_Proj_be_Call(ia32_transform_env_t *env, ir_node *node) { set_ia32_am_flavour(sse_load, ia32_am_B); set_ia32_am_support(sse_load, ia32_am_Source); - //mproj = new_rd_Proj(dbgi, irg, block, sse_load, mode_M, pn_ia32_xLoad_M); - sse_load = new_rd_Proj(dbgi, irg, block, sse_load, mode_E, pn_ia32_xLoad_res); + sse_load = new_rd_Proj(dbgi, irg, block, sse_load, mode_xmm, pn_ia32_xLoad_res); /* now: create new Keep whith all former ins and one additional in - the result Proj */ @@ -3592,7 +3599,7 @@ static ir_node *gen_Proj_be_Call(ia32_transform_env_t *env, ir_node *node) { return sse_load; } - /* transform call modes to the mode_Iu or mode_E */ + /* transform call modes */ if(mode != mode_M) { cls = arch_get_irn_reg_class(env->cg->arch_env, node, -1); mode = cls->mode; @@ -4068,8 +4075,7 @@ static void transform_psi_cond(ir_node *cond, ir_mode *mode, ia32_code_gen_t *cg if (! mode_is_float(m)) { cmp_a = gen_sse_conv_int2float(cg, dbgi, irg, block, cmp_a, cmp_a, mode); cmp_b = gen_sse_conv_int2float(cg, dbgi, irg, block, cmp_b, cmp_b, mode); - } - else if (m == mode_F) { + } else if (m == mode_F) { /* we convert cmp values always to double, to get correct bitmask with cmpsd */ cmp_a = gen_sse_conv_f2d(cg, dbgi, irg, block, cmp_a, cmp_a); cmp_b = gen_sse_conv_f2d(cg, dbgi, irg, block, cmp_b, cmp_b); @@ -4078,13 +4084,11 @@ static void transform_psi_cond(ir_node *cond, ir_mode *mode, ia32_code_gen_t *cg new_op = new_rd_ia32_xCmp(dbgi, irg, block, noreg, noreg, cmp_a, cmp_b, nomem); set_ia32_pncode(new_op, pnc); SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(cg, cmp)); - } - else { + } else { /* x87 FPU */ assert(0); } - } - else { + } else { /* integer Psi */ construct_binop_func *set_func = NULL; @@ -4095,15 +4099,13 @@ static void transform_psi_cond(ir_node *cond, ir_mode *mode, ia32_code_gen_t *cg if (USE_SSE2(cg)) { /* SSE FPU */ set_func = new_rd_ia32_xCmpSet; - } - else { + } else { /* x87 FPU */ set_func = new_rd_ia32_vfCmpSet; } pnc &= 7; /* fp compare -> int compare */ - } - else { + } else { /* 2nd case: compare operand are integer too */ set_func = new_rd_ia32_CmpSet; } @@ -4118,8 +4120,7 @@ static void transform_psi_cond(ir_node *cond, ir_mode *mode, ia32_code_gen_t *cg /* the the new compare as in */ set_irn_n(cond, i, new_op); - } - else { + } else { /* another complex condition */ transform_psi_cond(in, mode, cg); } @@ -4128,8 +4129,8 @@ static void transform_psi_cond(ir_node *cond, ir_mode *mode, ia32_code_gen_t *cg /** * The Psi selector can be a tree of compares combined with "And"s and "Or"s. - * We create a Set node, respectively a xCmp in case the Psi is a float, for each - * compare, which causes the compare result to be stores in a register. The + * We create a Set node, respectively a xCmp in case the Psi is a float, for + * each compare, which causes the compare result to be stored in a register. The * "And"s and "Or"s are transformed later, we just have to set their mode right. */ void ia32_transform_psi_cond_tree(ir_node *node, void *env) { @@ -4145,11 +4146,13 @@ void ia32_transform_psi_cond_tree(ir_node *node, void *env) { psi_sel = get_Psi_cond(node, 0); /* if psi_cond is a cmp: do nothing, this case is covered by gen_Psi */ - if (is_Proj(psi_sel)) + if (is_Proj(psi_sel)) { + assert(is_Cmp(get_Proj_pred(psi_sel))); return; + } //mode = get_irn_mode(node); - // TODO this is probably wrong... + // TODO probably wrong... mode = mode_Iu; transform_psi_cond(psi_sel, mode, cg); @@ -4158,15 +4161,17 @@ void ia32_transform_psi_cond_tree(ir_node *node, void *env) { block = get_nodes_block(node); /* we need to compare the evaluated condition tree with 0 */ - mode = get_irn_mode(node); + mode = get_irn_mode(node); if (mode_is_float(mode)) { - psi_sel = gen_sse_conv_int2float(cg, NULL, irg, block, psi_sel, NULL, mode); /* BEWARE: new_r_Const_long works for floating point as well */ - new_cmp = new_r_Cmp(irg, block, psi_sel, new_r_Const_long(irg, block, mode, 0)); + ir_node *zero = new_r_Const_long(irg, block, mode, 0); + + psi_sel = gen_sse_conv_int2float(cg, NULL, irg, block, psi_sel, NULL, mode); + new_cmp = new_r_Cmp(irg, block, psi_sel, zero); new_cmp = new_r_Proj(irg, block, new_cmp, mode_b, pn_Cmp_Ne); - } - else { - new_cmp = new_r_Cmp(irg, block, psi_sel, new_r_Const_long(irg, block, mode_Iu, 0)); + } else { + ir_node *zero = new_r_Const_long(irg, block, mode_Iu, 0); + new_cmp = new_r_Cmp(irg, block, psi_sel, zero); new_cmp = new_r_Proj(irg, block, new_cmp, mode_b, pn_Cmp_Gt | pn_Cmp_Lt); } diff --git a/ir/be/ia32/ia32_x87.c b/ir/be/ia32/ia32_x87.c index 4061b6a3d..ac1d0d36f 100644 --- a/ir/be/ia32/ia32_x87.c +++ b/ir/be/ia32/ia32_x87.c @@ -2102,7 +2102,7 @@ void x87_simulate_graph(const arch_env_t *arch_env, be_irg_t *birg) { ir_node *block, *start_block; blk_state *bl_state; x87_simulator sim; - ir_graph *irg = birg->irg; + ir_graph *irg = be_get_birg_irg(birg); /* create the simulator */ x87_init_simulator(&sim, irg, arch_env); @@ -2119,7 +2119,7 @@ void x87_simulate_graph(const arch_env_t *arch_env, be_irg_t *birg) { be_invalidate_liveness(birg); be_assure_liveness(birg); - sim.lv = birg->lv; + sim.lv = be_get_birg_liveness(birg); /* Calculate the liveness for all nodes. We must precalculate this info, * because the simulator adds new nodes (possible before Phi nodes) which diff --git a/ir/be/ia32/ia32_x87.h b/ir/be/ia32/ia32_x87.h index 302488a37..11eae512a 100644 --- a/ir/be/ia32/ia32_x87.h +++ b/ir/be/ia32/ia32_x87.h @@ -7,7 +7,7 @@ #ifndef _IA32_X87_H_ #define _IA32_X87_H_ -#include "../bearch.h" +#include "../bearch_t.h" /** * Run a simulation and fix all virtual instructions for a graph. diff --git a/ir/be/mips/bearch_mips.c b/ir/be/mips/bearch_mips.c index d80bdb4db..2ac831157 100644 --- a/ir/be/mips/bearch_mips.c +++ b/ir/be/mips/bearch_mips.c @@ -19,7 +19,7 @@ #include "bitset.h" #include "debug.h" -#include "../bearch.h" /* the general register allocator interface */ +#include "../bearch_t.h" /* the general register allocator interface */ #include "../benode_t.h" #include "../belower.h" #include "../besched_t.h" @@ -488,13 +488,14 @@ static const arch_code_generator_if_t mips_code_gen_if = { * Initializes the code generator. */ static void *mips_cg_init(be_irg_t *birg) { - mips_isa_t *isa = (mips_isa_t *)birg->main_env->arch_env->isa; + const arch_env_t *arch_env = be_get_birg_arch_env(birg); + mips_isa_t *isa = (mips_isa_t *) arch_env->isa; mips_code_gen_t *cg = xmalloc(sizeof(*cg)); cg->impl = &mips_code_gen_if; - cg->irg = birg->irg; + cg->irg = be_get_birg_irg(birg); cg->reg_set = new_set(mips_cmp_irn_reg_assoc, 1024); - cg->arch_env = birg->main_env->arch_env; + cg->arch_env = arch_env; cg->isa = isa; cg->birg = birg; cg->bl_list = NULL; diff --git a/ir/be/mips/bearch_mips.h b/ir/be/mips/bearch_mips.h index bc0fdc118..bf4ba4743 100644 --- a/ir/be/mips/bearch_mips.h +++ b/ir/be/mips/bearch_mips.h @@ -1,7 +1,7 @@ #ifndef _BEARCH_MIPS_H_ #define _BEARCH_MIPS_H_ -#include "../bearch.h" +#include "../bearch_t.h" typedef struct _mips_code_gen_t mips_code_gen_t; diff --git a/ir/be/mips/mips_emitter.h b/ir/be/mips/mips_emitter.h index 993788ae1..2e0e7c63a 100644 --- a/ir/be/mips/mips_emitter.h +++ b/ir/be/mips/mips_emitter.h @@ -5,7 +5,7 @@ #include "irnode.h" #include "debug.h" -#include "../bearch.h" +#include "../bearch_t.h" #include "bearch_mips_t.h" diff --git a/ir/be/mips/mips_map_regs.h b/ir/be/mips/mips_map_regs.h index 40edbac2e..aec44fb47 100644 --- a/ir/be/mips/mips_map_regs.h +++ b/ir/be/mips/mips_map_regs.h @@ -4,7 +4,7 @@ #include "irnode.h" #include "set.h" -#include "../bearch.h" +#include "../bearch_t.h" #include "mips_nodes_attr.h" int mips_cmp_irn_reg_assoc(const void *a, const void *b, size_t len); diff --git a/ir/be/mips/mips_new_nodes.c b/ir/be/mips/mips_new_nodes.c index dbe9e268d..94ed37450 100644 --- a/ir/be/mips/mips_new_nodes.c +++ b/ir/be/mips/mips_new_nodes.c @@ -21,7 +21,7 @@ #include "irprintf.h" #include "xmalloc.h" -#include "../bearch.h" +#include "../bearch_t.h" #include "mips_nodes_attr.h" #include "mips_new_nodes.h" diff --git a/ir/be/mips/mips_nodes_attr.h b/ir/be/mips/mips_nodes_attr.h index 0602a7d21..36fbe2123 100644 --- a/ir/be/mips/mips_nodes_attr.h +++ b/ir/be/mips/mips_nodes_attr.h @@ -1,7 +1,7 @@ #ifndef _MIPS_NODES_ATTR_H_ #define _MIPS_NODES_ATTR_H_ -#include "../bearch.h" +#include "../bearch_t.h" #include "irmode_t.h" typedef struct _mips_attr_t { diff --git a/ir/be/mips/mips_transform.c b/ir/be/mips/mips_transform.c index 4732b1ec5..a7f60f2c8 100644 --- a/ir/be/mips/mips_transform.c +++ b/ir/be/mips/mips_transform.c @@ -22,6 +22,7 @@ #include "../beabi.h" #include "../besched.h" #include "../besched_t.h" +#include "../beirg_t.h" #include "bearch_mips_t.h" #include "mips_nodes_attr.h" diff --git a/ir/be/ppc32/bearch_ppc32.c b/ir/be/ppc32/bearch_ppc32.c index 757aad8f9..f6234599b 100644 --- a/ir/be/ppc32/bearch_ppc32.c +++ b/ir/be/ppc32/bearch_ppc32.c @@ -15,7 +15,7 @@ #include "bitset.h" #include "debug.h" -#include "../bearch.h" /* the general register allocator interface */ +#include "../bearch_t.h" /* the general register allocator interface */ #include "../benode_t.h" #include "../belower.h" #include "../besched_t.h" @@ -24,6 +24,7 @@ #include "../bemachine.h" #include "../bemodule.h" #include "../beblocksched.h" +#include "../beirg_t.h" #include "pset.h" diff --git a/ir/be/ppc32/bearch_ppc32.h b/ir/be/ppc32/bearch_ppc32.h index 16b0472ed..b974e6719 100644 --- a/ir/be/ppc32/bearch_ppc32.h +++ b/ir/be/ppc32/bearch_ppc32.h @@ -1,7 +1,7 @@ #ifndef _BEARCH_PPC32_H_ #define _BEARCH_PPC32_H_ -#include "../bearch.h" +#include "../bearch_t.h" extern const arch_isa_if_t ppc32_isa_if; diff --git a/ir/be/ppc32/ppc32_emitter.h b/ir/be/ppc32/ppc32_emitter.h index edc9b3170..e6f48d3dc 100644 --- a/ir/be/ppc32/ppc32_emitter.h +++ b/ir/be/ppc32/ppc32_emitter.h @@ -5,7 +5,7 @@ #include "irnode.h" #include "debug.h" -#include "../bearch.h" +#include "../bearch_t.h" #include "bearch_ppc32_t.h" diff --git a/ir/be/ppc32/ppc32_map_regs.h b/ir/be/ppc32/ppc32_map_regs.h index 28cd25257..3f6487f63 100644 --- a/ir/be/ppc32/ppc32_map_regs.h +++ b/ir/be/ppc32/ppc32_map_regs.h @@ -4,7 +4,7 @@ #include "irnode.h" #include "set.h" -#include "../bearch.h" +#include "../bearch_t.h" #include "ppc32_nodes_attr.h" int ppc32_cmp_irn_reg_assoc(const void *a, const void *b, size_t len); diff --git a/ir/be/ppc32/ppc32_new_nodes.c b/ir/be/ppc32/ppc32_new_nodes.c index f71d29083..168c50fb0 100644 --- a/ir/be/ppc32/ppc32_new_nodes.c +++ b/ir/be/ppc32/ppc32_new_nodes.c @@ -21,7 +21,7 @@ #include "irprintf.h" #include "xmalloc.h" -#include "../bearch.h" +#include "../bearch_t.h" #include "ppc32_nodes_attr.h" #include "ppc32_new_nodes.h" diff --git a/ir/be/ppc32/ppc32_nodes_attr.h b/ir/be/ppc32/ppc32_nodes_attr.h index 402108397..d2c768516 100644 --- a/ir/be/ppc32/ppc32_nodes_attr.h +++ b/ir/be/ppc32/ppc32_nodes_attr.h @@ -1,7 +1,7 @@ #ifndef _PPC32_NODES_ATTR_H_ #define _PPC32_NODES_ATTR_H_ -#include "../bearch.h" +#include "../bearch_t.h" typedef struct { diff --git a/ir/be/scripts/generate_emitter.pl b/ir/be/scripts/generate_emitter.pl index 1326d9ab9..611ae8997 100755 --- a/ir/be/scripts/generate_emitter.pl +++ b/ir/be/scripts/generate_emitter.pl @@ -26,18 +26,18 @@ my $return; no strict "subs"; unless ($return = do $specfile) { - warn "couldn't parse $specfile: $@" if $@; - warn "couldn't do $specfile: $!" unless defined $return; - warn "couldn't run $specfile" unless $return; + die "couldn't parse $specfile: $@" if $@; + die "couldn't do $specfile: $!" unless defined $return; + die "couldn't run $specfile" unless $return; } use strict "subs"; if ($new_emit_syntax) { my $newscript = dirname($myname) . "/generate_emitter_new.pl"; unless ($return = do "$newscript") { - warn "couldn't parse $newscript: $@" if $@; - warn "couldn't do $newscript: $!" unless defined $return; - warn "couldn't run $newscript" unless $return; + die "couldn't parse $newscript: $@" if $@; + die "couldn't do $newscript: $!" unless defined $return; + die "couldn't run $newscript" unless $return; } exit; } diff --git a/ir/be/scripts/generate_machine.pl b/ir/be/scripts/generate_machine.pl index ac15b6496..3091aaf07 100755 --- a/ir/be/scripts/generate_machine.pl +++ b/ir/be/scripts/generate_machine.pl @@ -20,9 +20,9 @@ my $return; no strict "subs"; unless ($return = do $specfile) { - warn "couldn't parse $specfile: $@" if $@; - warn "couldn't do $specfile: $!" unless defined $return; - warn "couldn't run $specfile" unless $return; + die "couldn't parse $specfile: $@" if $@; + die "couldn't do $specfile: $!" unless defined $return; + die "couldn't run $specfile" unless $return; } use strict "subs"; diff --git a/ir/be/scripts/generate_new_opcodes.pl b/ir/be/scripts/generate_new_opcodes.pl index 0508c7c32..7e8a84c66 100755 --- a/ir/be/scripts/generate_new_opcodes.pl +++ b/ir/be/scripts/generate_new_opcodes.pl @@ -27,9 +27,9 @@ my $return; no strict "subs"; unless ($return = do $specfile) { - warn "couldn't parse $specfile: $@" if $@; - warn "couldn't do $specfile: $!" unless defined $return; - warn "couldn't run $specfile" unless $return; + die "couldn't parse $specfile: $@" if $@; + die "couldn't do $specfile: $!" unless defined $return; + die "couldn't run $specfile" unless $return; } use strict "subs"; diff --git a/ir/be/scripts/generate_regalloc_if.pl b/ir/be/scripts/generate_regalloc_if.pl index fd25393b4..a396511c5 100755 --- a/ir/be/scripts/generate_regalloc_if.pl +++ b/ir/be/scripts/generate_regalloc_if.pl @@ -23,9 +23,9 @@ my $return; use strict "subs"; unless ($return = do $specfile) { - warn "couldn't parse $specfile: $@" if $@; - warn "couldn't do $specfile: $!" unless defined $return; - warn "couldn't run $specfile" unless $return; + die "couldn't parse $specfile: $@" if $@; + die "couldn't do $specfile: $!" unless defined $return; + die "couldn't run $specfile" unless $return; } use strict "subs"; diff --git a/ir/be/test/langshootout/recursive.c b/ir/be/test/langshootout/recursive.c index cefabad08..7f1b1a031 100644 --- a/ir/be/test/langshootout/recursive.c +++ b/ir/be/test/langshootout/recursive.c @@ -3,7 +3,7 @@ // recursive test, by bearophile, Jan 24 2006 // Compile with: -O3 -s -fomit-frame-pointer -funroll-loops -#include +//#include int Ack(int x, int y) { if (x == 0) @@ -26,6 +26,7 @@ double FibFP(double n) { } int Tak(int x, int y, int z) { + printf("X %d Y %d Z %d\n", x, y, z); if (y < x) return Tak( Tak(x-1, y, z), Tak(y-1, z, x), Tak(z-1, x, y) ); return z; @@ -45,7 +46,9 @@ int main(int argc, char **argv) { printf("Ack(3,%d): %d\n", n+1, Ack(3, n+1)); printf("Fib(%.1f): %.1f\n", 28.0+n, FibFP(28.0+n)); printf("Tak(%d,%d,%d): %d\n", 3*n, 2*n, n, Tak(3*n, 2*n, n)); - printf("Fib(3): %d\n", Fib(3)); - printf("Tak(3.0,2.0,1.0): %.1f\n", TakFP(3.0, 2.0, 1.0)); +#if 0 + fprintf(stderr, "Fib(3): %d\n", Fib(3)); + fprintf(stderr, "Tak(3.0,2.0,1.0): %.1f\n", TakFP(3.0, 2.0, 1.0)); +#endif return 0; } -- 2.20.1