From 17b27b1659789d5b18b4923c04eb329f73f7b9f6 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Christian=20W=C3=BCrdig?= Date: Fri, 5 May 2006 15:18:49 +0000 Subject: [PATCH] added special nodes for Psi condition trees, so we can omit compare with 0 for Psi --- ir/be/ia32/ia32_emitter.c | 29 ++++++++++++++-- ir/be/ia32/ia32_spec.pl | 12 +++++++ ir/be/ia32/ia32_transform.c | 68 +++++++++++++++++++++++++------------ 3 files changed, 85 insertions(+), 24 deletions(-) diff --git a/ir/be/ia32/ia32_emitter.c b/ir/be/ia32/ia32_emitter.c index 4476029c9..cdc851084 100644 --- a/ir/be/ia32/ia32_emitter.c +++ b/ir/be/ia32/ia32_emitter.c @@ -996,10 +996,14 @@ static void CMov_emitter(ir_node *irn, ia32_emit_env_t *env) { else if (is_ia32_xCmpCMov(irn)) { lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "ucomis%M %1S, %2S", get_irn_n(irn, 0), irn, irn); } + else if (is_ia32_PsiCondCMov(irn)) { + /* omit compare because flags are already set by And/Or */ + snprintf(cmd_buf, SNPRINTF_BUF_LEN, " "); + } else { assert(0 && "unsupported CMov"); } - lc_esnprintf(arg_env, cmnt_buf, SNPRINTF_BUF_LEN, "/* Psi condition */" ); + snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Psi condition */" ); IA32_DO_EMIT(irn); if (REGS_ARE_EQUAL(out, in2)) { @@ -1030,6 +1034,10 @@ static void emit_ia32_CmpCMov(ir_node *irn, ia32_emit_env_t *env) { CMov_emitter(irn, env); } +static void emit_ia32_PsiCondCMov(ir_node *irn, ia32_emit_env_t *env) { + CMov_emitter(irn, env); +} + static void emit_ia32_xCmpCMov(ir_node *irn, ia32_emit_env_t *env) { CMov_emitter(irn, env); } @@ -1053,7 +1061,14 @@ static void Set_emitter(ir_node *irn, ia32_emit_env_t *env) { instr = "sub"; } - snprintf(cmd_buf, SNPRINTF_BUF_LEN, "%s %%%s, %%%s", instr, arch_register_get_name(out), arch_register_get_name(out)); + /* in case of a PsiCondSet use mov because it doesn't affect the eflags */ + if (is_ia32_PsiCondSet(irn)) { + snprintf(cmd_buf, SNPRINTF_BUF_LEN, "mov %%%s, 0", arch_register_get_name(out)); + } + else { + snprintf(cmd_buf, SNPRINTF_BUF_LEN, "%s %%%s, %%%s", instr, arch_register_get_name(out), arch_register_get_name(out)); + } + snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* clear target as set modifies only lower 8 bit */"); IA32_DO_EMIT(irn); @@ -1063,6 +1078,10 @@ static void Set_emitter(ir_node *irn, ia32_emit_env_t *env) { else if (is_ia32_xCmpSet(irn)) { lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "ucomis%M %s", get_irn_n(irn, 0), ia32_emit_binop(irn, env)); } + else if (is_ia32_PsiCondSet(irn)) { + /* omit compare because flags are already set by And/Or */ + snprintf(cmd_buf, SNPRINTF_BUF_LEN, " "); + } else { assert(0 && "unsupported Set"); } @@ -1078,6 +1097,10 @@ static void emit_ia32_CmpSet(ir_node *irn, ia32_emit_env_t *env) { Set_emitter(irn, env); } +static void emit_ia32_PsiCondSet(ir_node *irn, ia32_emit_env_t *env) { + Set_emitter(irn, env); +} + static void emit_ia32_xCmpSet(ir_node *irn, ia32_emit_env_t *env) { Set_emitter(irn, env); } @@ -1707,7 +1730,9 @@ static void ia32_register_emitters(void) { IA32_EMIT(CJmp); IA32_EMIT(CJmpAM); IA32_EMIT(CmpCMov); + IA32_EMIT(PsiCondCMov); IA32_EMIT(CmpSet); + IA32_EMIT(PsiCondSet); IA32_EMIT(SwitchJmp); IA32_EMIT(CopyB); IA32_EMIT(CopyB_i); diff --git a/ir/be/ia32/ia32_spec.pl b/ir/be/ia32/ia32_spec.pl index 8c01ca532..1c015ece3 100644 --- a/ir/be/ia32/ia32_spec.pl +++ b/ir/be/ia32/ia32_spec.pl @@ -759,6 +759,12 @@ else { "reg_req" => { "in" => [ "gp", "gp", "gp", "gp" ], "out" => [ "in_r4" ] } }, +"PsiCondCMov" => { + "irn_flags" => "R", + "comment" => "check if Psi condition tree evaluates to true and move result accordingly", + "reg_req" => { "in" => [ "gp", "gp", "gp" ], "out" => [ "in_r3" ] } +}, + "xCmpCMov" => { "irn_flags" => "R", "comment" => "construct Conditional Move: SSE Compare + int CMov ", @@ -778,6 +784,12 @@ else { "outs" => [ "res", "M" ], }, +"PsiCondSet" => { + "irn_flags" => "R", + "comment" => "check if Psi condition tree evaluates to true and set result accordingly", + "reg_req" => { "in" => [ "gp" ], "out" => [ "eax ebx ecx edx" ] }, +}, + "xCmpSet" => { "irn_flags" => "R", "comment" => "construct Set: SSE Compare + int Set", diff --git a/ir/be/ia32/ia32_transform.c b/ir/be/ia32/ia32_transform.c index 73f46ea70..4c468492c 100644 --- a/ir/be/ia32/ia32_transform.c +++ b/ir/be/ia32/ia32_transform.c @@ -1681,7 +1681,7 @@ static ir_node *gen_Psi(ia32_transform_env_t *env) { cmp_a = gen_sse_conv_int2float(cg, dbg, irg, block, cmp_a, node, mode_D); cmp_b = gen_sse_conv_int2float(cg, dbg, irg, block, cmp_b, node, mode_D); - pnc += pn_Cmp_Uo; /* transform integer compare to fp compare */ + pnc |= 8; /* transform integer compare to fp compare */ } new_op = new_rd_ia32_xCmp(dbg, irg, block, noreg, noreg, cmp_a, cmp_b, nomem); @@ -1697,7 +1697,7 @@ static ir_node *gen_Psi(ia32_transform_env_t *env) { SET_IA32_ORIG_NODE(and1, ia32_get_old_node_name(cg, node)); and1 = new_rd_Proj(dbg, irg, block, and1, mode, pn_ia32_xAnd_res); - and2 = new_rd_ia32_xAndNot(dbg, irg, block, noreg, noreg, psi_default, new_op, nomem); + and2 = new_rd_ia32_xAndNot(dbg, irg, block, noreg, noreg, new_op, psi_default, nomem); set_ia32_am_support(and2, ia32_am_Source); set_ia32_res_mode(and2, mode); SET_IA32_ORIG_NODE(and2, ia32_get_old_node_name(cg, node)); @@ -1736,7 +1736,7 @@ static ir_node *gen_Psi(ia32_transform_env_t *env) { cmov_func = new_rd_ia32_vfCmpCMov; } - pnc -= pn_Cmp_Uo; /* fp compare -> int compare */ + pnc &= 7; /* fp compare -> int compare */ } else { /* 2nd case: compare operand are integer too */ @@ -1745,25 +1745,49 @@ static ir_node *gen_Psi(ia32_transform_env_t *env) { } /* create the nodes */ - env->irn = cmp; - if (is_ia32_Const_1(psi_true) && is_ia32_Const_0(psi_default)) { - /* first case for SETcc: default is 0, set to 1 iff condition is true */ - new_op = gen_binop(env, cmp_a, cmp_b, set_func); - set_ia32_pncode(get_Proj_pred(new_op), pnc); - set_ia32_am_support(get_Proj_pred(new_op), ia32_am_Source); - } - else if (is_ia32_Const_0(psi_true) && is_ia32_Const_1(psi_default)) { - /* second case for SETcc: default is 1, set to 0 iff condition is true: */ - /* we invert condition and set default to 0 */ - new_op = gen_binop(env, cmp_a, cmp_b, set_func); - set_ia32_pncode(get_Proj_pred(new_op), get_negated_pnc(pnc, mode)); - set_ia32_am_support(get_Proj_pred(new_op), ia32_am_Source); + + /* check for special case first: And/Or -- Cmp with 0 -- Psi */ + if (is_ia32_Const_0(cmp_b) && is_Proj(cmp_a) && (is_ia32_And(get_Proj_pred(cmp_a)) || is_ia32_Or(get_Proj_pred(cmp_a)))) { + if (is_ia32_Const_1(psi_true) && is_ia32_Const_0(psi_default)) { + /* first case for SETcc: default is 0, set to 1 iff condition is true */ + new_op = new_rd_ia32_PsiCondSet(dbg, irg, block, cmp_a, mode); + set_ia32_pncode(new_op, pnc); + } + else if (is_ia32_Const_0(psi_true) && is_ia32_Const_1(psi_default)) { + /* second case for SETcc: default is 1, set to 0 iff condition is true: */ + /* we invert condition and set default to 0 */ + new_op = new_rd_ia32_PsiCondSet(dbg, irg, block, cmp_a, mode); + set_ia32_pncode(new_op, get_negated_pnc(pnc, mode)); + } + else { + /* otherwise: use CMOVcc */ + new_op = new_rd_ia32_PsiCondCMov(dbg, irg, block, cmp_a, psi_true, psi_default, mode); + set_ia32_pncode(new_op, pnc); + } + + SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(cg, node)); } else { - /* otherwise: use CMOVcc */ - new_op = cmov_func(dbg, irg, block, cmp_a, cmp_b, psi_true, psi_default, mode); - set_ia32_pncode(new_op, pnc); - SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(cg, node)); + env->irn = cmp; + if (is_ia32_Const_1(psi_true) && is_ia32_Const_0(psi_default)) { + /* first case for SETcc: default is 0, set to 1 iff condition is true */ + new_op = gen_binop(env, cmp_a, cmp_b, set_func); + set_ia32_pncode(get_Proj_pred(new_op), pnc); + set_ia32_am_support(get_Proj_pred(new_op), ia32_am_Source); + } + else if (is_ia32_Const_0(psi_true) && is_ia32_Const_1(psi_default)) { + /* second case for SETcc: default is 1, set to 0 iff condition is true: */ + /* we invert condition and set default to 0 */ + new_op = gen_binop(env, cmp_a, cmp_b, set_func); + set_ia32_pncode(get_Proj_pred(new_op), get_negated_pnc(pnc, mode)); + set_ia32_am_support(get_Proj_pred(new_op), ia32_am_Source); + } + else { + /* otherwise: use CMOVcc */ + new_op = cmov_func(dbg, irg, block, cmp_a, cmp_b, psi_true, psi_default, mode); + set_ia32_pncode(new_op, pnc); + SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(cg, node)); + } } } @@ -2583,7 +2607,7 @@ static void transform_psi_cond(ir_node *cond, ir_mode *mode, ia32_code_gen_t *cg if (! mode_is_float(get_irn_mode(cmp_a))) { cmp_a = gen_sse_conv_int2float(cg, dbg, irg, block, cmp_a, cmp_a, mode); cmp_b = gen_sse_conv_int2float(cg, dbg, irg, block, cmp_b, cmp_b, mode); - pnc += pn_Cmp_Uo; + pnc |= 8; } new_op = new_rd_ia32_xCmp(dbg, irg, block, noreg, noreg, cmp_a, cmp_b, nomem); @@ -2613,7 +2637,7 @@ static void transform_psi_cond(ir_node *cond, ir_mode *mode, ia32_code_gen_t *cg set_func = new_rd_ia32_vfCmpSet; } - pnc -= pn_Cmp_Uo; /* fp compare -> int compare */ + pnc &= 7; /* fp compare -> int compare */ } else { /* 2nd case: compare operand are integer too */ -- 2.20.1