From: Christian Würdig Date: Fri, 5 May 2006 13:05:15 +0000 (+0000) Subject: renamed Set to CmpSet and CMov to CmpCMov X-Git-Url: http://nsz.repo.hu/git/?a=commitdiff_plain;h=a75c46765b493aa204df414e83c7e85f6b89c346;p=libfirm renamed Set to CmpSet and CMov to CmpCMov CmpSet nodes are AM capable now fixed emitters fixed Psi transformation --- diff --git a/ir/be/ia32/bearch_ia32.c b/ir/be/ia32/bearch_ia32.c index 2cb5f2c27..b0da1e114 100644 --- a/ir/be/ia32/bearch_ia32.c +++ b/ir/be/ia32/bearch_ia32.c @@ -501,12 +501,12 @@ static void ia32_prepare_graph(void *self) { FIRM_DBG_REGISTER(cg->mod, "firm.be.ia32.transform"); - /* 1st: transform psi condition trees */ - irg_walk_blkwise_graph(cg->irg, NULL, ia32_transform_psi_cond_tree, cg); + /* 1st: transform constants and psi condition trees */ + irg_walk_blkwise_graph(cg->irg, ia32_place_consts_set_modes, ia32_transform_psi_cond_tree, cg); /* 2nd: transform all remaining nodes */ ia32_register_transformers(); - irg_walk_blkwise_graph(cg->irg, ia32_place_consts_set_modes, ia32_transform_node, cg); + irg_walk_blkwise_graph(cg->irg, NULL, ia32_transform_node, cg); be_dump(cg->irg, "-transformed", dump_ir_block_graph_sched); /* 3rd: optimize address mode */ @@ -521,8 +521,8 @@ static INLINE int need_constraint_copy(ir_node *irn) { ! is_ia32_Lea(irn) && \ ! is_ia32_Conv_I2I(irn) && \ ! is_ia32_Conv_I2I8Bit(irn) && \ - ! is_ia32_CMov(irn) && \ - ! is_ia32_Set(irn); + ! is_ia32_CmpCMov(irn) && \ + ! is_ia32_CmpSet(irn); } /** diff --git a/ir/be/ia32/ia32_emitter.c b/ir/be/ia32/ia32_emitter.c index 15400952b..2ef9daee8 100644 --- a/ir/be/ia32/ia32_emitter.c +++ b/ir/be/ia32/ia32_emitter.c @@ -963,7 +963,6 @@ static void emit_ia32_x87CondJmp(ir_node *irn, ia32_emit_env_t *env) { snprintf(cmd_buf, SNPRINTF_BUF_LEN, "%s %s", instr, reg); lc_esnprintf(ia32_get_arg_env(), cmnt_buf, SNPRINTF_BUF_LEN, "/* %+F */", irn); IA32_DO_EMIT(irn); -// lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "fnstsw %3D", irn); lc_esnprintf(ia32_get_arg_env(), cmd_buf, SNPRINTF_BUF_LEN, "fnstsw %%ax", irn); snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* Store x87 FPU Control Word */"); IA32_DO_EMIT(irn); @@ -989,7 +988,7 @@ static void CMov_emitter(ir_node *irn, ia32_emit_env_t *env) { /* we have to emit the cmp first, because the destination register */ /* could be one of the compare registers */ - if (is_ia32_CMov(irn)) { + if (is_ia32_CmpCMov(irn)) { lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %2S", irn, irn); } else if (is_ia32_xCmpCMov(irn)) { @@ -1025,7 +1024,7 @@ static void CMov_emitter(ir_node *irn, ia32_emit_env_t *env) { IA32_DO_EMIT(irn); } -static void emit_ia32_CMov(ir_node *irn, ia32_emit_env_t *env) { +static void emit_ia32_CmpCMov(ir_node *irn, ia32_emit_env_t *env) { CMov_emitter(irn, env); } @@ -1056,11 +1055,11 @@ static void Set_emitter(ir_node *irn, ia32_emit_env_t *env) { snprintf(cmnt_buf, SNPRINTF_BUF_LEN, "/* clear target as set modifies only lower 8 bit */"); IA32_DO_EMIT(irn); - if (is_ia32_Set(irn)) { - lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %1S, %2S", irn, irn); + if (is_ia32_CmpSet(irn)) { + lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "cmp %s", ia32_emit_binop(irn, env)); } else if (is_ia32_xCmpSet(irn)) { - lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "ucomis%M %1S, %2S", get_irn_n(irn, 0), irn, irn); + lc_esnprintf(arg_env, cmd_buf, SNPRINTF_BUF_LEN, "ucomis%M %s", get_irn_n(irn, 0), ia32_emit_binop(irn, env)); } else { assert(0 && "unsupported Set"); @@ -1073,7 +1072,7 @@ static void Set_emitter(ir_node *irn, ia32_emit_env_t *env) { IA32_DO_EMIT(irn); } -static void emit_ia32_Set(ir_node *irn, ia32_emit_env_t *env) { +static void emit_ia32_CmpSet(ir_node *irn, ia32_emit_env_t *env) { Set_emitter(irn, env); } @@ -1705,8 +1704,8 @@ static void ia32_register_emitters(void) { IA32_EMIT(TestJmp); IA32_EMIT(CJmp); IA32_EMIT(CJmpAM); - IA32_EMIT(CMov); - IA32_EMIT(Set); + IA32_EMIT(CmpCMov); + IA32_EMIT(CmpSet); IA32_EMIT(SwitchJmp); IA32_EMIT(CopyB); IA32_EMIT(CopyB_i); diff --git a/ir/be/ia32/ia32_spec.pl b/ir/be/ia32/ia32_spec.pl index f80950bf9..8c01ca532 100644 --- a/ir/be/ia32/ia32_spec.pl +++ b/ir/be/ia32/ia32_spec.pl @@ -753,7 +753,7 @@ else { "outs" => [ "res", "M" ], }, -"CMov" => { +"CmpCMov" => { "irn_flags" => "R", "comment" => "construct Conditional Move: CMov(sel, a, b) == sel ? a : b", "reg_req" => { "in" => [ "gp", "gp", "gp", "gp" ], "out" => [ "in_r4" ] } @@ -771,22 +771,25 @@ else { "reg_req" => { "in" => [ "vfp", "vfp", "gp", "gp" ], "out" => [ "in_r4" ] } }, -"Set" => { +"CmpSet" => { "irn_flags" => "R", "comment" => "construct Set: Set(sel) == sel ? 1 : 0", - "reg_req" => { "in" => [ "gp", "gp" ], "out" => [ "eax ebx ecx edx" ] }, + "reg_req" => { "in" => [ "gp", "gp", "gp", "gp", "none" ], "out" => [ "eax ebx ecx edx", "none" ] }, + "outs" => [ "res", "M" ], }, "xCmpSet" => { "irn_flags" => "R", "comment" => "construct Set: SSE Compare + int Set", - "reg_req" => { "in" => [ "xmm", "xmm" ], "out" => [ "eax ebx ecx edx" ] }, + "reg_req" => { "in" => [ "gp", "gp", "xmm", "xmm", "none" ], "out" => [ "eax ebx ecx edx", "none" ] }, + "outs" => [ "res", "M" ], }, "vfCmpSet" => { "irn_flags" => "R", "comment" => "construct Set: x87 Compare + int Set", - "reg_req" => { "in" => [ "vfp", "vfp" ], "out" => [ "eax ebx ecx edx" ] }, + "reg_req" => { "in" => [ "gp", "gp", "vfp", "vfp", "none" ], "out" => [ "eax ebx ecx edx", "none" ] }, + "outs" => [ "res", "M" ], }, "vfCMov" => { diff --git a/ir/be/ia32/ia32_transform.c b/ir/be/ia32/ia32_transform.c index 08749087f..4ca5e9123 100644 --- a/ir/be/ia32/ia32_transform.c +++ b/ir/be/ia32/ia32_transform.c @@ -1632,7 +1632,6 @@ static ir_node *gen_Mux(ia32_transform_env_t *env) { return NULL; } -typedef ir_node *set_func_t(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *cmp_a, ir_node *cmp_b, ir_mode *mode); typedef ir_node *cmov_func_t(dbg_info *db, ir_graph *irg, ir_node *block, ir_node *cmp_a, ir_node *cmp_b, \ ir_node *psi_true, ir_node *psi_default, ir_mode *mode); @@ -1718,8 +1717,8 @@ static ir_node *gen_Psi(ia32_transform_env_t *env) { } else { /* integer psi */ - set_func_t *set_func = NULL; - cmov_func_t *cmov_func = NULL; + construct_binop_func *set_func = NULL; + cmov_func_t *cmov_func = NULL; if (mode_is_float(get_irn_mode(cmp_a))) { /* 1st case: compare operands are floats */ @@ -1735,33 +1734,34 @@ static ir_node *gen_Psi(ia32_transform_env_t *env) { set_func = new_rd_ia32_vfCmpSet; cmov_func = new_rd_ia32_vfCmpCMov; } + + pnc -= pn_Cmp_Uo; /* fp compare -> int compare */ } else { /* 2nd case: compare operand are integer too */ - set_func = new_rd_ia32_Set; - cmov_func = new_rd_ia32_CMov; + set_func = new_rd_ia32_CmpSet; + cmov_func = new_rd_ia32_CmpCMov; } /* create the nodes */ - + env->irn = cmp; if (is_ia32_Const_1(psi_true) && is_ia32_Const_0(psi_default)) { /* first case for SETcc: default is 0, set to 1 iff condition is true */ - new_op = set_func(dbg, irg, block, cmp_a, cmp_b, mode); - set_ia32_pncode(new_op, pnc); + new_op = gen_binop(env, cmp_a, cmp_b, set_func); + set_ia32_pncode(get_Proj_pred(new_op), pnc); } else if (is_ia32_Const_0(psi_true) && is_ia32_Const_1(psi_default)) { /* second case for SETcc: default is 1, set to 0 iff condition is true: */ /* we invert condition and set default to 0 */ - new_op = set_func(dbg, irg, block, cmp_a, cmp_b, mode); - set_ia32_pncode(new_op, get_negated_pnc(pnc, get_irn_mode(cmp_a))); + new_op = gen_binop(env, cmp_a, cmp_b, set_func); + set_ia32_pncode(get_Proj_pred(new_op), get_negated_pnc(pnc, mode)); } else { /* otherwise: use CMOVcc */ new_op = cmov_func(dbg, irg, block, cmp_a, cmp_b, psi_true, psi_default, mode); set_ia32_pncode(new_op, pnc); + SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(cg, node)); } - - SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(cg, node)); } return new_op; @@ -2594,9 +2594,18 @@ static void transform_psi_cond(ir_node *cond, ir_mode *mode, ia32_code_gen_t *cg } else { /* integer Psi */ - new_op = new_rd_ia32_Set(dbg, irg, block, cmp_a, cmp_b, mode); - set_ia32_pncode(new_op, pnc); - SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(cg, cmp)); + ia32_transform_env_t tenv; + + tenv.block = block; + tenv.cg = cg; + tenv.dbg = dbg; + tenv.irg = irg; + tenv.irn = cmp; + tenv.mode = mode; + tenv.mod = cg->mod; + + new_op = gen_binop(&tenv, cmp_a, cmp_b, new_rd_ia32_CmpSet); + set_ia32_pncode(get_Proj_pred(new_op), pnc); } /* exchange with old compare */ @@ -2642,6 +2651,8 @@ void ia32_transform_psi_cond_tree(ir_node *node, void *env) { /* BEWARE: new_r_Const_long works for floating point as well */ new_cmp = new_r_Cmp(irg, block, psi_sel, new_r_Const_long(irg, block, mode, 0)); + /* transform the const */ + ia32_place_consts_set_modes(new_cmp, cg); new_cmp = new_r_Proj(irg, block, new_cmp, mode_b, pn_Cmp_Ne + (mode_is_float(mode) ? pn_Cmp_Uo : 0)); set_Psi_cond(node, 0, new_cmp);