From: Matthias Braun Date: Mon, 4 Jun 2007 13:49:48 +0000 (+0000) Subject: - Allocate register slots array separately on obstack X-Git-Url: http://nsz.repo.hu/git/?a=commitdiff_plain;h=7f81d2a2c9293cf34e4db08fc402a5c33ef919eb;p=libfirm - Allocate register slots array separately on obstack - "Fix" TEMPLATE backend - Load TEMPLATE backend in bemodules - fix ppc32 not scheduling alot of nodes [r14319] --- diff --git a/ir/be/TEMPLATE/TEMPLATE_new_nodes.c b/ir/be/TEMPLATE/TEMPLATE_new_nodes.c index 9bae2001c..de2200a7a 100644 --- a/ir/be/TEMPLATE/TEMPLATE_new_nodes.c +++ b/ir/be/TEMPLATE/TEMPLATE_new_nodes.c @@ -157,15 +157,15 @@ static int TEMPLATE_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { } /* dump OUT requirements */ - if (attr->n_res > 0) { + if (ARR_LEN(attr->slots) > 0) { reqs = get_TEMPLATE_out_req_all(n); dump_reg_req(F, n, reqs, 1); } /* dump assigned registers */ slots = get_TEMPLATE_slots(n); - if (slots && attr->n_res > 0) { - for (i = 0; i < attr->n_res; i++) { + if (slots && ARR_LEN(attr->slots) > 0) { + for (i = 0; i < ARR_LEN(attr->slots); i++) { if (slots[i]) { fprintf(F, "reg #%d = %s\n", i, slots[i]->name); } @@ -318,7 +318,7 @@ const char *get_TEMPLATE_out_reg_name(const ir_node *node, int pos) { const TEMPLATE_attr_t *attr = get_TEMPLATE_attr_const(node); assert(is_TEMPLATE_irn(node) && "Not an TEMPLATE node."); - assert(pos < attr->n_res && "Invalid OUT position."); + assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); assert(attr->slots[pos] && "No register assigned"); return arch_register_get_name(attr->slots[pos]); @@ -331,7 +331,7 @@ int get_TEMPLATE_out_regnr(const ir_node *node, int pos) { const TEMPLATE_attr_t *attr = get_TEMPLATE_attr_const(node); assert(is_TEMPLATE_irn(node) && "Not an TEMPLATE node."); - assert(pos < attr->n_res && "Invalid OUT position."); + assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); assert(attr->slots[pos] && "No register assigned"); return arch_register_get_index(attr->slots[pos]); @@ -344,26 +344,18 @@ const arch_register_t *get_TEMPLATE_out_reg(const ir_node *node, int pos) { const TEMPLATE_attr_t *attr = get_TEMPLATE_attr_const(node); assert(is_TEMPLATE_irn(node) && "Not an TEMPLATE node."); - assert(pos < attr->n_res && "Invalid OUT position."); + assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); assert(attr->slots[pos] && "No register assigned"); return attr->slots[pos]; } -/** - * Sets the number of results. - */ -void set_TEMPLATE_n_res(ir_node *node, int n_res) { - TEMPLATE_attr_t *attr = get_TEMPLATE_attr(node); - attr->n_res = n_res; -} - /** * Returns the number of results. */ int get_TEMPLATE_n_res(const ir_node *node) { const TEMPLATE_attr_t *attr = get_TEMPLATE_attr_const(node); - return attr->n_res; + return ARR_LEN(attr->slots); } /** @@ -375,14 +367,16 @@ void init_TEMPLATE_attributes(ir_node *node, arch_irn_flags_t flags, const be_execution_unit_t ***execution_units, int n_res, unsigned latency) { + ir_graph *irg = get_irn_irg(node); + struct obstack *obst = get_irg_obstack(irg); TEMPLATE_attr_t *attr = get_TEMPLATE_attr(node); - attr->flags = flags; + attr->flags = flags; attr->out_req = out_reqs; - attr->in_req = in_reqs; - attr->n_res = n_res; + attr->in_req = in_reqs; - memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0])); + attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res); + memset(attr->slots, 0, n_res * sizeof(attr->slots[0])); } /*************************************************************************************** diff --git a/ir/be/TEMPLATE/TEMPLATE_new_nodes.h b/ir/be/TEMPLATE/TEMPLATE_new_nodes.h index 19b0e9699..95bf4a983 100644 --- a/ir/be/TEMPLATE/TEMPLATE_new_nodes.h +++ b/ir/be/TEMPLATE/TEMPLATE_new_nodes.h @@ -107,11 +107,6 @@ int get_TEMPLATE_out_regnr(const ir_node *node, int pos); */ const arch_register_t *get_TEMPLATE_out_reg(const ir_node *node, int pos); -/** - * Sets the number of results. - */ -void set_TEMPLATE_n_res(ir_node *node, int n_res); - /** * Returns the number of results. */ diff --git a/ir/be/TEMPLATE/TEMPLATE_nodes_attr.h b/ir/be/TEMPLATE/TEMPLATE_nodes_attr.h index bb473537b..5f9154e09 100644 --- a/ir/be/TEMPLATE/TEMPLATE_nodes_attr.h +++ b/ir/be/TEMPLATE/TEMPLATE_nodes_attr.h @@ -32,13 +32,11 @@ typedef struct TEMPLATE_attr_t TEMPLATE_attr_t; struct TEMPLATE_attr_t { arch_irn_flags_t flags; /**< indicating if spillable, rematerializeable ... etc. */ - int n_res; /**< number of results for this node */ const arch_register_req_t **in_req; /**< register requirements for arguments */ const arch_register_req_t **out_req; /**< register requirements for results */ - /* must be last, dynamically allocated */ - const arch_register_t *slots[1]; /**< register slots for assigned registers */ + const arch_register_t **slots; /**< register slots for assigned registers */ }; #endif diff --git a/ir/be/TEMPLATE/bearch_TEMPLATE.c b/ir/be/TEMPLATE/bearch_TEMPLATE.c index 008e0963a..a5150da22 100644 --- a/ir/be/TEMPLATE/bearch_TEMPLATE.c +++ b/ir/be/TEMPLATE/bearch_TEMPLATE.c @@ -558,7 +558,10 @@ const arch_irn_handler_t *TEMPLATE_get_irn_handler(const void *self) { } int TEMPLATE_to_appear_in_schedule(void *block_env, const ir_node *irn) { - return is_TEMPLATE_irn(irn); + if(!is_TEMPLATE_irn(irn)) + return -1; + + return 1; } /** @@ -594,7 +597,7 @@ static int TEMPLATE_get_reg_class_alignment(const void *self, const arch_registe /** * Returns the libFirm configuration parameter for this backend. */ -static const backend_params *TEMPLATE_get_libfirm_params(void) { +static const backend_params *TEMPLATE_get_backend_params(void) { static arch_dep_params_t ad = { 1, /* allow subs */ 0, /* Muls are fast enough on Firm */ @@ -630,6 +633,10 @@ static const be_machine_t *TEMPLATE_get_machine(const void *self) { return NULL; } +static ir_graph **TEMPLATE_get_backend_irg_list(const void *self, ir_graph ***irgs) { + return NULL; +} + const arch_isa_if_t TEMPLATE_isa_if = { TEMPLATE_init, @@ -643,9 +650,10 @@ const arch_isa_if_t TEMPLATE_isa_if = { TEMPLATE_get_list_sched_selector, TEMPLATE_get_ilp_sched_selector, TEMPLATE_get_reg_class_alignment, - TEMPLATE_get_libfirm_params, + TEMPLATE_get_backend_params, TEMPLATE_get_allowed_execution_units, - TEMPLATE_get_machine + TEMPLATE_get_machine, + TEMPLATE_get_backend_irg_list }; void be_init_arch_TEMPLATE(void) diff --git a/ir/be/arm/arm_new_nodes.c b/ir/be/arm/arm_new_nodes.c index 899499ca0..161e475ea 100644 --- a/ir/be/arm/arm_new_nodes.c +++ b/ir/be/arm/arm_new_nodes.c @@ -170,15 +170,15 @@ static int arm_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { } /* dump OUT requirements */ - if (attr->n_res > 0) { + if (ARR_LEN(attr->slots) > 0) { reqs = get_arm_out_req_all(n); dump_reg_req(F, n, reqs, 1); } /* dump assigned registers */ slots = get_arm_slots(n); - if (slots && attr->n_res > 0) { - for (i = 0; i < attr->n_res; i++) { + if (slots && ARR_LEN(attr->slots) > 0) { + for (i = 0; i < ARR_LEN(attr->slots); i++) { if (slots[i]) { fprintf(F, "reg #%d = %s\n", i, slots[i]->name); } @@ -347,7 +347,7 @@ const char *get_arm_out_reg_name(const ir_node *node, int pos) { arm_attr_t *attr = get_arm_attr(node); assert(is_arm_irn(node) && "Not an arm node."); - assert(pos < attr->n_res && "Invalid OUT position."); + assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); assert(attr->slots[pos] && "No register assigned"); return arch_register_get_name(attr->slots[pos]); @@ -360,7 +360,7 @@ int get_arm_out_regnr(const ir_node *node, int pos) { arm_attr_t *attr = get_arm_attr(node); assert(is_arm_irn(node) && "Not an arm node."); - assert(pos < attr->n_res && "Invalid OUT position."); + assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); assert(attr->slots[pos] && "No register assigned"); return arch_register_get_index(attr->slots[pos]); @@ -373,26 +373,18 @@ const arch_register_t *get_arm_out_reg(const ir_node *node, int pos) { arm_attr_t *attr = get_arm_attr(node); assert(is_arm_irn(node) && "Not an arm node."); - assert(pos < attr->n_res && "Invalid OUT position."); + assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); assert(attr->slots[pos] && "No register assigned"); return attr->slots[pos]; } -/** - * Sets the number of results. - */ -void set_arm_n_res(ir_node *node, int n_res) { - arm_attr_t *attr = get_arm_attr(node); - attr->n_res = n_res; -} - /** * Returns the number of results. */ int get_arm_n_res(const ir_node *node) { arm_attr_t *attr = get_arm_attr(node); - return attr->n_res; + return ARR_LEN(attr->slots); } /** * Returns the tarvalue @@ -487,10 +479,12 @@ arm_shift_modifier get_arm_shift_modifier(const ir_node *node) { void init_arm_attributes(ir_node *node, int flags, const arch_register_req_t ** in_reqs, const arch_register_req_t ** out_reqs, const be_execution_unit_t ***execution_units, int n_res, unsigned latency) { - arm_attr_t *attr = get_arm_attr(node); + ir_graph *irg = get_irn_irg(node); + struct obstack *obst = get_irg_obstack(irg); + arm_attr_t *attr = get_arm_attr(node); + attr->in_req = in_reqs; attr->out_req = out_reqs; - attr->n_res = n_res; attr->flags = flags; attr->instr_fl = (ARM_COND_AL << 3) | ARM_SHF_NONE; attr->value = NULL; @@ -499,7 +493,8 @@ void init_arm_attributes(ir_node *node, int flags, const arch_register_req_t ** attr->n_projs = 0; attr->default_proj_num = 0; - memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0])); + attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res); + memset(attr->slots, 0, n_res * sizeof(attr->slots[0])); } static int arm_comp_condJmp(arm_attr_t *attr_a, arm_attr_t *attr_b) { diff --git a/ir/be/arm/arm_new_nodes.h b/ir/be/arm/arm_new_nodes.h index 82f021891..1ace38768 100644 --- a/ir/be/arm/arm_new_nodes.h +++ b/ir/be/arm/arm_new_nodes.h @@ -110,11 +110,6 @@ int get_arm_out_regnr(const ir_node *node, int pos); */ const arch_register_t *get_arm_out_reg(const ir_node *node, int pos); -/** - * Sets the number of results. - */ -void set_arm_n_res(ir_node *node, int n_res); - /** * Returns the number of results. */ diff --git a/ir/be/arm/arm_nodes_attr.h b/ir/be/arm/arm_nodes_attr.h index d1c3814b5..795736e5d 100644 --- a/ir/be/arm/arm_nodes_attr.h +++ b/ir/be/arm/arm_nodes_attr.h @@ -82,7 +82,6 @@ typedef enum _arm_condition { typedef struct _arm_attr_t { arch_irn_flags_t flags; /**< indicating if spillable, rematerializeable ... etc. */ - int n_res; /**< number of results for this node */ const arch_register_req_t **in_req; /**< register requirements for arguments */ const arch_register_req_t **out_req; /**< register requirements for results */ @@ -95,8 +94,7 @@ typedef struct _arm_attr_t { int n_projs; long default_proj_num; - /* must be last, dynamically allocated */ - const arch_register_t *slots[1]; /**< register slots for assigned registers */ + const arch_register_t **slots; /**< register slots for assigned registers */ } arm_attr_t; /** diff --git a/ir/be/bemodule.c b/ir/be/bemodule.c index 8d1c33c9c..ef974fabb 100644 --- a/ir/be/bemodule.c +++ b/ir/be/bemodule.c @@ -52,6 +52,7 @@ void be_init_arch_ppc32(void); void be_init_arch_mips(void); void be_init_arch_arm(void); void be_init_arch_sta(void); +void be_init_arch_TEMPLATE(void); void be_init_ilpsched(void); void be_init_copyilp(void); void be_init_javacoal(void); @@ -109,6 +110,7 @@ void be_init_modules(void) be_init_arch_ppc32(); be_init_arch_mips(); be_init_arch_arm(); + be_init_arch_TEMPLATE(); #ifdef WITH_ILP be_init_ilpsched(); diff --git a/ir/be/ia32/bearch_ia32.c b/ir/be/ia32/bearch_ia32.c index 96b19317b..599ac14dd 100644 --- a/ir/be/ia32/bearch_ia32.c +++ b/ir/be/ia32/bearch_ia32.c @@ -1764,8 +1764,6 @@ const arch_irn_handler_t *ia32_get_irn_handler(const void *self) { int ia32_to_appear_in_schedule(void *block_env, const ir_node *irn) { if(!is_ia32_irn(irn)) { - if (is_ASM(irn)) - return 1; return -1; } diff --git a/ir/be/ia32/ia32_emitter.c b/ir/be/ia32/ia32_emitter.c index cb5dd2309..295452895 100644 --- a/ir/be/ia32/ia32_emitter.c +++ b/ir/be/ia32/ia32_emitter.c @@ -250,7 +250,7 @@ void ia32_emit_dest_register(ia32_emit_env_t *env, const ir_node *node, int pos) void ia32_emit_x87_name(ia32_emit_env_t *env, const ir_node *node, int pos) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); assert(pos < 3); be_emit_char(env, '%'); @@ -472,10 +472,10 @@ void ia32_emit_x87_binop(ia32_emit_env_t *env, const ir_node *node) { // should not happen... assert(0); } else { - ia32_attr_t *attr = get_ia32_attr(node); - const arch_register_t *in1 = attr->x87[0]; - const arch_register_t *in2 = attr->x87[1]; - const arch_register_t *out = attr->x87[2]; + const ia32_attr_t *attr = get_ia32_attr_const(node); + const arch_register_t *in1 = attr->x87[0]; + const arch_register_t *in2 = attr->x87[1]; + const arch_register_t *out = attr->x87[2]; const arch_register_t *in; in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2; @@ -870,9 +870,9 @@ void emit_ia32_xCondJmp(ia32_emit_env_t *env, const ir_node *node) { */ static void emit_ia32_x87CondJmp(ia32_emit_env_t *env, const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); - const char *reg = attr->x87[1]->name; - long pnc = get_ia32_pncode(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); + const char *reg = attr->x87[1]->name; + long pnc = get_ia32_pncode(node); switch (get_ia32_irn_opcode(node)) { case iro_ia32_fcomrJmp: @@ -1316,7 +1316,7 @@ void emit_Jmp(ia32_emit_env_t *env, const ir_node *node) { static void emit_ia32_Immediate(ia32_emit_env_t *env, const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); if(attr->am_sc != NULL) { ident *id = get_entity_ld_ident(attr->am_sc); @@ -1339,13 +1339,13 @@ const char* emit_asm_operand(ia32_emit_env_t *env, const ir_node *node, const char *s) { const arch_register_t *reg; - const char *reg_name; - char c; - char modifier = 0; - int num = -1; - ia32_attr_t *attr; - int n_outs; - int p; + const char *reg_name; + char c; + char modifier = 0; + int num = -1; + const ia32_attr_t *attr; + int n_outs; + int p; assert(*s == '%'); c = *(++s); @@ -1394,8 +1394,8 @@ const char* emit_asm_operand(ia32_emit_env_t *env, const ir_node *node, } /* get register */ - attr = get_ia32_attr(node); - n_outs = attr->data.n_res; + attr = get_ia32_attr_const(node); + n_outs = ARR_LEN(attr->slots); if(num < n_outs) { reg = get_out_reg(env, node, num); } else { @@ -1449,9 +1449,9 @@ const char* emit_asm_operand(ia32_emit_env_t *env, const ir_node *node, static void emit_ia32_Asm(ia32_emit_env_t *env, const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); - ident *asm_text = attr->cnst_val.asm_text; - const char *s = get_id_str(asm_text); + const ia32_attr_t *attr = get_ia32_attr_const(node); + ident *asm_text = attr->cnst_val.asm_text; + const char *s = get_id_str(asm_text); be_emit_cstring(env, "# Begin ASM \t"); be_emit_finish_line_gas(env, node); diff --git a/ir/be/ia32/ia32_new_nodes.c b/ir/be/ia32/ia32_new_nodes.c index 977670059..169fea6b7 100644 --- a/ir/be/ia32/ia32_new_nodes.c +++ b/ir/be/ia32/ia32_new_nodes.c @@ -418,13 +418,9 @@ static int ia32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { * |___/ ***************************************************************************************************/ -/** - * Wraps get_irn_generic_attr() as it takes no const ir_node, so we need to do a cast. - * Firm was made by people hating const :-( - */ -ia32_attr_t *get_ia32_attr(const ir_node *node) { +ia32_attr_t *get_ia32_attr(ir_node *node) { assert(is_ia32_irn(node) && "need ia32 node to get ia32 attributes"); - return (ia32_attr_t *)get_irn_generic_attr((ir_node *)node); + return (ia32_attr_t *)get_irn_generic_attr(node); } const ia32_attr_t *get_ia32_attr_const(const ir_node *node) { @@ -436,7 +432,7 @@ const ia32_attr_t *get_ia32_attr_const(const ir_node *node) { * Gets the type of an ia32 node. */ ia32_op_type_t get_ia32_op_type(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->data.tp; } @@ -452,7 +448,7 @@ void set_ia32_op_type(ir_node *node, ia32_op_type_t tp) { * Gets the immediate op type of an ia32 node. */ ia32_immop_type_t get_ia32_immop_type(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->data.imm_tp; } @@ -460,7 +456,7 @@ ia32_immop_type_t get_ia32_immop_type(const ir_node *node) { * Gets the supported address mode of an ia32 node */ ia32_am_type_t get_ia32_am_support(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->data.am_support; } @@ -476,7 +472,7 @@ void set_ia32_am_support(ir_node *node, ia32_am_type_t am_tp) { * Gets the address mode flavour of an ia32 node */ ia32_am_flavour_t get_ia32_am_flavour(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->data.am_flavour; } @@ -492,7 +488,7 @@ void set_ia32_am_flavour(ir_node *node, ia32_am_flavour_t am_flavour) { * Gets the address mode offset as int. */ int get_ia32_am_offs_int(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->am_offs; } @@ -513,7 +509,7 @@ void add_ia32_am_offs_int(ir_node *node, int offset) { * Returns the symconst entity associated to address mode. */ ir_entity *get_ia32_am_sc(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->am_sc; } @@ -545,7 +541,7 @@ void clear_ia32_am_sc_sign(ir_node *node) { * Returns the sign bit for address mode symconst. */ int is_ia32_am_sc_sign(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->data.am_sc_sign; } @@ -553,7 +549,7 @@ int is_ia32_am_sc_sign(const ir_node *node) { * Gets the addr mode const. */ int get_ia32_am_scale(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->data.am_scale; } @@ -569,7 +565,7 @@ void set_ia32_am_scale(ir_node *node, int scale) { * Return the tarval of an immediate operation or NULL in case of SymConst */ tarval *get_ia32_Immop_tarval(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); assert(attr->data.imm_tp == ia32_ImmConst); return attr->cnst_val.tv; } @@ -590,7 +586,7 @@ void set_ia32_Immop_symconst(ir_node *node, ir_entity *entity) { } ir_entity *get_ia32_Immop_symconst(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); assert(attr->data.imm_tp == ia32_ImmSymConst); return attr->cnst_val.sc; } @@ -615,7 +611,7 @@ void clear_ia32_use_frame(ir_node *node) { * Gets the uses_frame flag. */ int is_ia32_use_frame(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->data.use_frame; } @@ -639,7 +635,7 @@ void clear_ia32_commutative(ir_node *node) { * Checks if node is commutative. */ int is_ia32_commutative(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->data.is_commutative; } @@ -663,7 +659,7 @@ void clear_ia32_emit_cl(ir_node *node) { * Checks if node needs %cl. */ int is_ia32_emit_cl(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->data.emit_cl; } @@ -687,7 +683,7 @@ void clear_ia32_got_lea(ir_node *node) { * Checks if node got lea. */ int is_ia32_got_lea(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->data.got_lea; } @@ -702,7 +698,7 @@ void clear_ia32_need_stackent(ir_node *node) { } int is_ia32_need_stackent(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->data.need_stackent; } @@ -710,7 +706,7 @@ int is_ia32_need_stackent(const ir_node *node) { * Gets the mode of the stored/loaded value (only set for Store/Load) */ ir_mode *get_ia32_ls_mode(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->ls_mode; } @@ -726,7 +722,7 @@ void set_ia32_ls_mode(ir_node *node, ir_mode *mode) { * Gets the frame entity assigned to this node. */ ir_entity *get_ia32_frame_ent(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->frame_ent; } @@ -747,7 +743,7 @@ void set_ia32_frame_ent(ir_node *node, ir_entity *ent) { * Gets the instruction latency. */ unsigned get_ia32_latency(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->latency; } @@ -763,7 +759,7 @@ void set_ia32_latency(ir_node *node, unsigned latency) { * Returns the argument register requirements of an ia32 node. */ const arch_register_req_t **get_ia32_in_req_all(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->in_req; } @@ -779,7 +775,7 @@ void set_ia32_in_req_all(ir_node *node, const arch_register_req_t **reqs) { * Returns the result register requirements of an ia32 node. */ const arch_register_req_t **get_ia32_out_req_all(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->out_req; } @@ -795,7 +791,7 @@ void set_ia32_out_req_all(ir_node *node, const arch_register_req_t **reqs) { * Returns the argument register requirement at position pos of an ia32 node. */ const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); if(attr->in_req == NULL) return arch_no_register_req; @@ -806,7 +802,7 @@ const arch_register_req_t *get_ia32_in_req(const ir_node *node, int pos) { * Returns the result register requirement at position pos of an ia32 node. */ const arch_register_req_t *get_ia32_out_req(const ir_node *node, int pos) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); if(attr->out_req == NULL) return arch_no_register_req; @@ -833,7 +829,7 @@ void set_ia32_req_in(ir_node *node, const arch_register_req_t *req, int pos) { * Returns the register flag of an ia32 node. */ arch_irn_flags_t get_ia32_flags(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->data.flags; } @@ -849,31 +845,23 @@ void set_ia32_flags(ir_node *node, arch_irn_flags_t flags) { * Returns the result register slots of an ia32 node. */ const arch_register_t **get_ia32_slots(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->slots; } -/** - * Sets the number of results. - */ -void set_ia32_n_res(ir_node *node, int n_res) { - ia32_attr_t *attr = get_ia32_attr(node); - attr->data.n_res = n_res; -} - /** * Returns the number of results. */ int get_ia32_n_res(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); - return attr->data.n_res; + const ia32_attr_t *attr = get_ia32_attr_const(node); + return ARR_LEN(attr->slots); } /** * Returns the flavour of an ia32 node, */ ia32_op_flavour_t get_ia32_flavour(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->data.op_flav; } @@ -889,7 +877,7 @@ void set_ia32_flavour(ir_node *node, ia32_op_flavour_t op_flav) { * Returns the projnum code. */ pn_Cmp get_ia32_pncode(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->pn_code; } @@ -906,7 +894,7 @@ void set_ia32_pncode(ir_node *node, pn_Cmp code) { */ void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) { ia32_attr_t *attr = get_ia32_attr(node); - assert(pos < (int) attr->data.n_res && "Invalid OUT position."); + assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position."); attr->out_flags[pos] = flags; } @@ -914,15 +902,16 @@ void set_ia32_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) { * Gets the flags for the n'th out. */ arch_irn_flags_t get_ia32_out_flags(const ir_node *node, int pos) { - ia32_attr_t *attr = get_ia32_attr(node); - return pos < (int)attr->data.n_res ? attr->out_flags[pos] : arch_irn_flags_none; + const ia32_attr_t *attr = get_ia32_attr_const(node); + assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position."); + return attr->out_flags[pos]; } /** * Get the list of available execution units. */ const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->exec_units; } @@ -930,7 +919,7 @@ const be_execution_unit_t ***get_ia32_exec_units(const ir_node *node) { * Get the exception label attribute. */ unsigned get_ia32_exc_label(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->data.except_label; } @@ -948,7 +937,7 @@ void set_ia32_exc_label(ir_node *node, unsigned flag) { * Returns the name of the original ir node. */ const char *get_ia32_orig_node(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return attr->orig_node; } @@ -1060,7 +1049,7 @@ void set_ia32_AddrMode(ir_node *node, char direction) { * Returns whether or not the node is an immediate operation with Const. */ int is_ia32_ImmConst(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return (attr->data.imm_tp == ia32_ImmConst); } @@ -1068,7 +1057,7 @@ int is_ia32_ImmConst(const ir_node *node) { * Returns whether or not the node is an immediate operation with SymConst. */ int is_ia32_ImmSymConst(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return (attr->data.imm_tp == ia32_ImmSymConst); } @@ -1076,7 +1065,7 @@ int is_ia32_ImmSymConst(const ir_node *node) { * Returns whether or not the node is an AddrModeS node. */ int is_ia32_AddrModeS(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return (attr->data.tp == ia32_AddrModeS); } @@ -1084,7 +1073,7 @@ int is_ia32_AddrModeS(const ir_node *node) { * Returns whether or not the node is an AddrModeD node. */ int is_ia32_AddrModeD(const ir_node *node) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); return (attr->data.tp == ia32_AddrModeD); } @@ -1124,9 +1113,9 @@ int is_ia32_Cnst(const ir_node *node) { * Returns the name of the OUT register at position pos. */ const char *get_ia32_out_reg_name(const ir_node *node, int pos) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); - assert(pos < (int) attr->data.n_res && "Invalid OUT position."); + assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); assert(attr->slots[pos] && "No register assigned"); return arch_register_get_name(attr->slots[pos]); @@ -1136,9 +1125,9 @@ const char *get_ia32_out_reg_name(const ir_node *node, int pos) { * Returns the index of the OUT register at position pos within its register class. */ int get_ia32_out_regnr(const ir_node *node, int pos) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); - assert(pos < (int) attr->data.n_res && "Invalid OUT position."); + assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); assert(attr->slots[pos] && "No register assigned"); return arch_register_get_index(attr->slots[pos]); @@ -1148,9 +1137,9 @@ int get_ia32_out_regnr(const ir_node *node, int pos) { * Returns the OUT register at position pos. */ const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos) { - ia32_attr_t *attr = get_ia32_attr(node); + const ia32_attr_t *attr = get_ia32_attr_const(node); - assert(pos < (int) attr->data.n_res && "Invalid OUT position."); + assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); assert(attr->slots[pos] && "No register assigned"); return attr->slots[pos]; @@ -1165,20 +1154,22 @@ void init_ia32_attributes(ir_node *node, arch_irn_flags_t flags, const be_execution_unit_t ***execution_units, int n_res, unsigned latency) { - ia32_attr_t *attr = get_ia32_attr(node); + ir_graph *irg = get_irn_irg(node); + struct obstack *obst = get_irg_obstack(irg); + ia32_attr_t *attr = get_ia32_attr(node); set_ia32_flags(node, flags); set_ia32_in_req_all(node, in_reqs); set_ia32_out_req_all(node, out_reqs); set_ia32_latency(node, latency); - set_ia32_n_res(node, n_res); attr->exec_units = execution_units; - attr->out_flags = NEW_ARR_D(int, get_irg_obstack(get_irn_irg(node)), n_res); + attr->out_flags = NEW_ARR_D(int, obst, n_res); memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0])); - memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0])); + attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res); + memset(attr->slots, 0, n_res * sizeof(attr->slots[0])); } ir_node *get_ia32_result_proj(const ir_node *node) @@ -1205,7 +1196,7 @@ ir_node *get_ia32_result_proj(const ir_node *node) ***************************************************************************************/ /* default compare operation to compare attributes */ -int ia32_compare_attr(ia32_attr_t *a, ia32_attr_t *b) { +int ia32_compare_attr(const ia32_attr_t *a, const ia32_attr_t *b) { if (a->data.tp != b->data.tp || a->data.imm_tp != b->data.imm_tp) return 1; @@ -1248,16 +1239,22 @@ int ia32_compare_attr(ia32_attr_t *a, ia32_attr_t *b) { } /* copies the ia32 attributes */ -static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node) { - ia32_attr_t *attr_old = get_ia32_attr(old_node); - ia32_attr_t *attr_new = get_ia32_attr(new_node); +static void ia32_copy_attr(const ir_node *old_node, ir_node *new_node) +{ + ir_graph *irg = get_irn_irg(new_node); + struct obstack *obst = get_irg_obstack(irg); + const ia32_attr_t *attr_old = get_ia32_attr_const(old_node); + ia32_attr_t *attr_new = get_ia32_attr(new_node); /* copy the attributes */ memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node))); /* copy out flags */ attr_new->out_flags = - DUP_ARR_D(int, get_irg_obstack(get_irn_irg(new_node)), attr_old->out_flags); + DUP_ARR_D(int, obst, attr_old->out_flags); + /* copy register assignments */ + attr_new->slots = + DUP_ARR_D(const arch_register_t*, obst, attr_old->slots); } /* Include the generated constructor functions */ diff --git a/ir/be/ia32/ia32_new_nodes.h b/ir/be/ia32/ia32_new_nodes.h index c3cce8c25..1224b345d 100644 --- a/ir/be/ia32/ia32_new_nodes.h +++ b/ir/be/ia32/ia32_new_nodes.h @@ -51,7 +51,7 @@ int ia32_has_x87_register(const ir_node *n); /** * Returns the attributes of an ia32 node. */ -ia32_attr_t *get_ia32_attr(const ir_node *node); +ia32_attr_t *get_ia32_attr(ir_node *node); const ia32_attr_t *get_ia32_attr_const(const ir_node *node); @@ -327,11 +327,6 @@ int get_ia32_out_regnr(const ir_node *node, int pos); */ const arch_register_t *get_ia32_out_reg(const ir_node *node, int pos); -/** - * Sets the number of results. - */ -void set_ia32_n_res(ir_node *node, int n_res); - /** * Returns the number of results. */ diff --git a/ir/be/ia32/ia32_nodes_attr.h b/ir/be/ia32/ia32_nodes_attr.h index 4742d79f7..89064a736 100644 --- a/ir/be/ia32/ia32_nodes_attr.h +++ b/ir/be/ia32/ia32_nodes_attr.h @@ -110,8 +110,6 @@ struct ia32_attr_t { unsigned got_lea:1; /**< Indicates whether or not this node already consumed a LEA. */ unsigned need_stackent:1; /**< Set to 1 if node need space on stack. */ - - unsigned n_res:6; /**< Number of results produced by this node. */ } data; int *out_flags; /**< flags for each produced value */ @@ -145,8 +143,7 @@ struct ia32_attr_t { const arch_register_t *x87[3]; /**< register slots for x87 register */ - /* must be last, dynamic */ - const arch_register_t *slots[1]; /**< register slots for assigned registers */ + const arch_register_t **slots; /**< register slots for assigned registers */ }; #endif /* FIRM_BE_IA32_IA32_NODES_ATTR_H */ diff --git a/ir/be/ia32/ia32_transform.c b/ir/be/ia32/ia32_transform.c index 7245f6918..90194922d 100644 --- a/ir/be/ia32/ia32_transform.c +++ b/ir/be/ia32/ia32_transform.c @@ -1273,8 +1273,6 @@ static ir_node *generate_DivMod(ir_node *node, ir_node *dividend, set_ia32_am_support(res, ia32_am_Source); #endif - set_ia32_n_res(res, 2); - /* check, which Proj-Keep, we need to add */ i = 0; if (proj_div == NULL) { diff --git a/ir/be/mips/mips_new_nodes.c b/ir/be/mips/mips_new_nodes.c index cc095d33a..9d0a42c78 100644 --- a/ir/be/mips/mips_new_nodes.c +++ b/ir/be/mips/mips_new_nodes.c @@ -158,15 +158,15 @@ static int mips_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { } /* dump OUT requirements */ - if (attr->n_res > 0) { + if (ARR_LEN(attr->slots) > 0) { reqs = get_mips_out_req_all(n); dump_reg_req(F, n, reqs, 1); } /* dump assigned registers */ slots = get_mips_slots(n); - if (slots && attr->n_res > 0) { - for (i = 0; i < attr->n_res; i++) { + if (slots && ARR_LEN(attr->slots) > 0) { + for (i = 0; i < ARR_LEN(attr->slots); i++) { if (slots[i]) { fprintf(F, "reg #%d = %s\n", i, slots[i]->name); } @@ -319,7 +319,7 @@ const char *get_mips_out_reg_name(const ir_node *node, int pos) { mips_attr_t *attr = get_mips_attr(node); assert(is_mips_irn(node) && "Not an mips node."); - assert(pos < attr->n_res && "Invalid OUT position."); + assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); assert(attr->slots[pos] && "No register assigned"); return arch_register_get_name(attr->slots[pos]); @@ -332,7 +332,7 @@ int get_mips_out_regnr(const ir_node *node, int pos) { mips_attr_t *attr = get_mips_attr(node); assert(is_mips_irn(node) && "Not an mips node."); - assert(pos < attr->n_res && "Invalid OUT position."); + assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); assert(attr->slots[pos] && "No register assigned"); return arch_register_get_index(attr->slots[pos]); @@ -345,26 +345,18 @@ const arch_register_t *get_mips_out_reg(const ir_node *node, int pos) { mips_attr_t *attr = get_mips_attr(node); assert(is_mips_irn(node) && "Not an mips node."); - assert(pos < attr->n_res && "Invalid OUT position."); + assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); assert(attr->slots[pos] && "No register assigned"); return attr->slots[pos]; } -/** - * Sets the number of results. - */ -void set_mips_n_res(ir_node *node, int n_res) { - mips_attr_t *attr = get_mips_attr(node); - attr->n_res = n_res; -} - /** * Returns the number of results. */ int get_mips_n_res(const ir_node *node) { mips_attr_t *attr = get_mips_attr(node); - return attr->n_res; + return ARR_LEN(attr->slots); } /** @@ -375,19 +367,20 @@ void init_mips_attributes(ir_node *node, arch_irn_flags_t flags, const arch_regi const be_execution_unit_t ***execution_units, int n_res, unsigned latency) { - mips_attr_t *attr = get_mips_attr(node); + ir_graph *irg = get_irn_irg(node); + struct obstack *obst = get_irg_obstack(irg); + mips_attr_t *attr = get_mips_attr(node); - attr->flags = flags; + attr->flags = flags; attr->out_req = out_reqs; + attr->in_req = in_reqs; - attr->n_res = n_res; - attr->in_req = in_reqs; - - memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0])); + attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res); + memset(attr->slots, 0, n_res * sizeof(attr->slots[0])); } static -int mips_compare_attr(mips_attr_t *a, mips_attr_t *b) +int mips_compare_attr(const mips_attr_t *a, const mips_attr_t *b) { if(a->tv != b->tv) return 1; @@ -397,7 +390,7 @@ int mips_compare_attr(mips_attr_t *a, mips_attr_t *b) return 1; if(a->flags != b->flags) return 1; - if(a->n_res != b->n_res) + if(ARR_LEN(a->slots) != ARR_LEN(b->slots)) return 1; if(a->switch_default_pn != b->switch_default_pn) return 1; diff --git a/ir/be/mips/mips_new_nodes.h b/ir/be/mips/mips_new_nodes.h index 1d1a45dca..b74fcf379 100644 --- a/ir/be/mips/mips_new_nodes.h +++ b/ir/be/mips/mips_new_nodes.h @@ -104,11 +104,6 @@ int get_mips_out_regnr(const ir_node *node, int pos); */ const arch_register_t *get_mips_out_reg(const ir_node *node, int pos); -/** - * Sets the number of results. - */ -void set_mips_n_res(ir_node *node, int n_res); - /** * Returns the number of results. */ diff --git a/ir/be/mips/mips_nodes_attr.h b/ir/be/mips/mips_nodes_attr.h index 5d1a4793b..eae48cd0d 100644 --- a/ir/be/mips/mips_nodes_attr.h +++ b/ir/be/mips/mips_nodes_attr.h @@ -31,7 +31,6 @@ typedef struct _mips_attr_t { arch_irn_flags_t flags; /**< indicating if spillable, rematerializeable ... etc. */ - int n_res; /**< number of results for this node */ tarval *tv; /**< contains the immediate value */ ir_entity *symconst; @@ -43,8 +42,7 @@ typedef struct _mips_attr_t { const arch_register_req_t **in_req; /**< register requirements for arguments */ const arch_register_req_t **out_req; /**< register requirements for results */ - /* must be last, dynamically allocated */ - const arch_register_t *slots[1]; /**< register slots for assigned registers */ + const arch_register_t **slots; /**< register slots for assigned registers */ } mips_attr_t; #endif diff --git a/ir/be/ppc32/bearch_ppc32.c b/ir/be/ppc32/bearch_ppc32.c index 003974274..aa590faf7 100644 --- a/ir/be/ppc32/bearch_ppc32.c +++ b/ir/be/ppc32/bearch_ppc32.c @@ -832,7 +832,10 @@ const arch_irn_handler_t *ppc32_get_irn_handler(const void *self) { } int ppc32_to_appear_in_schedule(void *block_env, const ir_node *irn) { - return is_ppc32_irn(irn); + if(!is_ppc32_irn(irn)) + return -1; + + return 1; } /** diff --git a/ir/be/ppc32/ppc32_new_nodes.c b/ir/be/ppc32/ppc32_new_nodes.c index af0734c9c..d7ec1e81a 100644 --- a/ir/be/ppc32/ppc32_new_nodes.c +++ b/ir/be/ppc32/ppc32_new_nodes.c @@ -157,15 +157,15 @@ static int ppc32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) { } /* dump OUT requirements */ - if (attr->n_res > 0) { + if (ARR_LEN(attr->slots) > 0) { reqs = get_ppc32_out_req_all(n); dump_reg_req(F, n, reqs, 1); } /* dump assigned registers */ slots = get_ppc32_slots(n); - if (slots && attr->n_res > 0) { - for (i = 0; i < attr->n_res; i++) { + if (slots && ARR_LEN(attr->slots) > 0) { + for (i = 0; i < ARR_LEN(attr->slots); i++) { if (slots[i]) { fprintf(F, "reg #%d = %s\n", i, slots[i]->name); } @@ -309,7 +309,7 @@ const char *get_ppc32_out_reg_name(const ir_node *node, int pos) { ppc32_attr_t *attr = get_ppc32_attr(node); assert(is_ppc32_irn(node) && "Not an ppc node."); - assert(pos < attr->n_res && "Invalid OUT position."); + assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); assert(attr->slots[pos] && "No register assigned"); return arch_register_get_name(attr->slots[pos]); @@ -322,7 +322,7 @@ int get_ppc32_out_regnr(const ir_node *node, int pos) { ppc32_attr_t *attr = get_ppc32_attr(node); assert(is_ppc32_irn(node) && "Not an ppc node."); - assert(pos < attr->n_res && "Invalid OUT position."); + assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); assert(attr->slots[pos] && "No register assigned"); return arch_register_get_index(attr->slots[pos]); @@ -335,26 +335,18 @@ const arch_register_t *get_ppc32_out_reg(const ir_node *node, int pos) { ppc32_attr_t *attr = get_ppc32_attr(node); assert(is_ppc32_irn(node) && "Not an ppc node."); - assert(pos < attr->n_res && "Invalid OUT position."); + assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position."); assert(attr->slots[pos] && "No register assigned"); return attr->slots[pos]; } -/** - * Sets the number of results. - */ -void set_ppc32_n_res(ir_node *node, int n_res) { - ppc32_attr_t *attr = get_ppc32_attr(node); - attr->n_res = n_res; -} - /** * Returns the number of results. */ int get_ppc32_n_res(const ir_node *node) { ppc32_attr_t *attr = get_ppc32_attr(node); - return attr->n_res; + return ARR_LEN(attr->slots); } /** @@ -503,18 +495,20 @@ void init_ppc32_attributes(ir_node *node, int flags, const arch_register_req_t **in_reqs, const arch_register_req_t **out_reqs, const be_execution_unit_t ***execution_units, int n_res, unsigned latency) { - ppc32_attr_t *attr = get_ppc32_attr(node); + ir_graph *irg = get_irn_irg(node); + struct obstack *obst = get_irg_obstack(irg); + ppc32_attr_t *attr = get_ppc32_attr(node); attr->flags = flags; attr->in_req = in_reqs; attr->out_req = out_reqs; - attr->n_res = n_res; attr->content_type = ppc32_ac_None; attr->offset_mode = ppc32_ao_Illegal; attr->data.empty = NULL; - memset((void *)attr->slots, 0, n_res * sizeof(attr->slots[0])); + attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res); + memset(attr->slots, 0, n_res * sizeof(attr->slots[0])); } diff --git a/ir/be/ppc32/ppc32_new_nodes.h b/ir/be/ppc32/ppc32_new_nodes.h index 631048e16..d57c877aa 100644 --- a/ir/be/ppc32/ppc32_new_nodes.h +++ b/ir/be/ppc32/ppc32_new_nodes.h @@ -104,11 +104,6 @@ int get_ppc32_out_regnr(const ir_node *node, int pos); */ const arch_register_t *get_ppc32_out_reg(const ir_node *node, int pos); -/** - * Sets the number of results. - */ -void set_ppc32_n_res(ir_node *node, int n_res); - /** * Returns the number of results. */ diff --git a/ir/be/ppc32/ppc32_nodes_attr.h b/ir/be/ppc32/ppc32_nodes_attr.h index 74ed775e7..e9770c137 100644 --- a/ir/be/ppc32/ppc32_nodes_attr.h +++ b/ir/be/ppc32/ppc32_nodes_attr.h @@ -52,7 +52,6 @@ typedef enum { typedef struct _ppc32_attr_t { arch_irn_flags_t flags; /**< indicating if spillable, rematerializeable ... etc. */ - int n_res; /**< number of results for this node */ const arch_register_req_t **in_req; /**< register requirements for arguments */ const arch_register_req_t **out_req; /**< register requirements for results */ @@ -69,8 +68,7 @@ typedef struct _ppc32_attr_t { void* empty; } data; - /* must be last, dynamically allocated */ - const arch_register_t *slots[1]; /**< register slots for assigned registers */ + const arch_register_t **slots; /**< register slots for assigned registers */ } ppc32_attr_t; #endif diff --git a/ir/be/scripts/generate_new_opcodes.pl b/ir/be/scripts/generate_new_opcodes.pl index 4f0cd475e..1aa442e39 100755 --- a/ir/be/scripts/generate_new_opcodes.pl +++ b/ir/be/scripts/generate_new_opcodes.pl @@ -490,7 +490,7 @@ foreach my $op (keys(%nodes)) { $n_res = "20"; # hacky.... } $temp = "\top_$op = new_ir_op(cur_opcode + iro_$op, \"$op\", op_pin_state_".$n{"state"}.", ".$n{"op_flags"}; - $temp .= "|M, ".translate_arity($arity).", 0, sizeof(${attr_type}) + $n_res * sizeof(arch_register_t *), &ops);\n"; + $temp .= "|M, ".translate_arity($arity).", 0, sizeof(${attr_type}), &ops);\n"; push(@obst_new_irop, $temp); push(@obst_new_irop, "\tset_op_tag(op_$op, &$arch\_op_tag);\n"); push(@obst_enum_op, "\tiro_$op,\n");