From: Matthias Braun <matze@braunis.de>
Date: Wed, 1 Aug 2007 17:43:46 +0000 (+0000)
Subject: no need for Zex commands, we already had the Conv (which are superior as they can... 
X-Git-Url: http://nsz.repo.hu/git/?a=commitdiff_plain;h=5d857be5868d03f98b4e17aea9359ef32d4660d5;p=libfirm

no need for Zex commands, we already had the Conv (which are superior as they can do AM and have some load optimisations)

[r15421]
---

diff --git a/ir/be/ia32/ia32_spec.pl b/ir/be/ia32/ia32_spec.pl
index 5c44177ea..414711b36 100644
--- a/ir/be/ia32/ia32_spec.pl
+++ b/ir/be/ia32/ia32_spec.pl
@@ -781,25 +781,6 @@ Not => {
 	modified_flags => []
 },
 
-Zex8 => {
-	irn_flags => "R",
-	reg_req   => { in => [ "eax ebx ecx edx" ], out => [ "gp" ] },
-	emit      => '. movzbl %SB0, %D0',
-	units     => [ "GP" ],
-	mode      => $mode_gp,
-	modified_flags => []
-},
-
-Zex16 => {
-	irn_flags => "R",
-	reg_req   => { in => [ "gp" ], out => [ "gp" ] },
-	emit      => '. movzwl %SW0, %D0',
-	units     => [ "GP" ],
-	mode      => $mode_gp,
-	modified_flags => []
-},
-
-
 # other operations
 
 CondJmp => {
diff --git a/ir/be/ia32/ia32_transform.c b/ir/be/ia32/ia32_transform.c
index 5859bff85..cf39af0a4 100644
--- a/ir/be/ia32/ia32_transform.c
+++ b/ir/be/ia32/ia32_transform.c
@@ -872,43 +872,34 @@ static ir_node *gen_Mulh(ir_node *node) {
 static ir_node *gen_And(ir_node *node) {
 	ir_node *op1 = get_And_left(node);
 	ir_node *op2 = get_And_right(node);
-	ir_node *new_op, *load;
 	assert(! mode_is_float(get_irn_mode(node)));
 
 	/* check for zero extension first */
 	if (is_Const(op2)) {
-		tarval *tv = get_Const_tarval(op2);
-		long v = get_tarval_long(tv);
-
-		if (v == 0xFF) {
-			if (is_Load(skip_Proj(op1)) && get_irn_n_edges(op1) == 1) {
-				new_op = be_transform_node(op1);
-				load = skip_Proj(new_op);
-				set_ia32_ls_mode(load, mode_Bu);
-				new_op = be_transform_node(op1);
-			} else {
-				ir_graph *irg     = current_ir_graph;
-				dbg_info *dbgi    = get_irn_dbg_info(node);
-				ir_node  *block   = be_transform_node(get_nodes_block(node));
+		tarval   *tv    = get_Const_tarval(op2);
+		long      v     = get_tarval_long(tv);
 
-				new_op = new_rd_ia32_Zex8(dbgi, irg, block, be_transform_node(op1));
-			}
-			return new_op;
-		} else if (v == 0xFFFF) {
-			if (is_Load(skip_Proj(op1)) && get_irn_n_edges(op1) == 1) {
-				new_op = be_transform_node(op1);
-				load = skip_Proj(new_op);
-				set_ia32_ls_mode(load, mode_Hu);
-			} else {
-				ir_graph *irg     = current_ir_graph;
-				dbg_info *dbgi    = get_irn_dbg_info(node);
-				ir_node  *block   = be_transform_node(get_nodes_block(node));
+		if (v == 0xFF || v == 0xFFFF) {
+			dbg_info *dbgi   = get_irn_dbg_info(node);
+			ir_node  *block  = be_transform_node(get_nodes_block(node));
+			ir_node  *new_op = be_transform_node(op1);
+			ir_mode  *src_mode;
+			ir_node  *res;
 
-				new_op = new_rd_ia32_Zex16(dbgi, irg, block, be_transform_node(op1));
+			if(v == 0xFF) {
+				src_mode = mode_Bu;
+			} else {
+				assert(v == 0xFFFF);
+				src_mode = mode_Hu;
 			}
-			return new_op;
+			res = create_I2I_Conv(src_mode, mode_Iu, dbgi, block, new_op);
+			ir_fprintf(stderr, "and %+F -> conv %+F\n", node, res);
+			SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env_cg, node));
+
+			return res;
 		}
 	}
+
 	return gen_binop(node, op1, op2, new_rd_ia32_And, 1);
 }