From: Christian Würdig Date: Tue, 15 Aug 2006 15:08:01 +0000 (+0000) Subject: adapted to some new backend structures X-Git-Url: http://nsz.repo.hu/git/?a=commitdiff_plain;h=11dd35912fd6ad1f7637137c4c3f9e0628b8387f;p=libfirm adapted to some new backend structures --- diff --git a/ir/be/arm/arm_new_nodes.c b/ir/be/arm/arm_new_nodes.c index 3a4939e70..607427272 100644 --- a/ir/be/arm/arm_new_nodes.c +++ b/ir/be/arm/arm_new_nodes.c @@ -499,7 +499,7 @@ arm_shift_modifier get_arm_shift_modifier(ir_node *node) { /* Set the ARM machine node attributes to default values. */ void init_arm_attributes(ir_node *node, int flags, const arm_register_req_t ** in_reqs, - const arm_register_req_t ** out_reqs, int n_res) { + const arm_register_req_t ** out_reqs, int n_res, unsigned latency) { arm_attr_t *attr = get_arm_attr(node); attr->in_req = in_reqs; attr->out_req = out_reqs; @@ -588,7 +588,7 @@ ir_node *new_r_arm_StoreStackMInc(ir_graph *irg, ir_node *block, ir_node *mem, i flags |= arch_irn_flags_rematerializable; /* op can be easily recalculated */ /* init node attributes */ - init_arm_attributes(res, flags, _in_req_arm_StoreStackM4Inc, NULL, 0); + init_arm_attributes(res, flags, _in_req_arm_StoreStackM4Inc, NULL, 0, 1); res = optimize_node(res); irn_vrfy_irg(res, irg); diff --git a/ir/be/arm/arm_new_nodes.h b/ir/be/arm/arm_new_nodes.h index 857312abd..8e82116a8 100644 --- a/ir/be/arm/arm_new_nodes.h +++ b/ir/be/arm/arm_new_nodes.h @@ -104,7 +104,7 @@ int get_arm_n_res(const ir_node *node); * Set the ARM machine node attributes to default values. */ void init_arm_attributes(ir_node *node, int flags, const arm_register_req_t ** in_reqs, - const arm_register_req_t ** out_reqs, int n_res); + const arm_register_req_t ** out_reqs, int n_res, unsigned latency); /** * Returns the tarval diff --git a/ir/be/mips/mips_new_nodes.c b/ir/be/mips/mips_new_nodes.c index fccfa47c4..e691a8c52 100644 --- a/ir/be/mips/mips_new_nodes.c +++ b/ir/be/mips/mips_new_nodes.c @@ -387,7 +387,7 @@ int get_mips_n_res(const ir_node *node) { * Initializes the nodes attributes. */ void init_mips_attributes(ir_node *node, arch_irn_flags_t flags, const mips_register_req_t **in_reqs, - const mips_register_req_t **out_reqs, int n_res) + const mips_register_req_t **out_reqs, int n_res, unsigned latency) { mips_attr_t *attr = get_mips_attr(node); diff --git a/ir/be/mips/mips_new_nodes.h b/ir/be/mips/mips_new_nodes.h index b54530def..06d66d0f5 100644 --- a/ir/be/mips/mips_new_nodes.h +++ b/ir/be/mips/mips_new_nodes.h @@ -99,7 +99,7 @@ int get_mips_n_res(const ir_node *node); * Initializes the nodes attributes. */ void init_mips_attributes(ir_node *node, arch_irn_flags_t flags, const mips_register_req_t **in_reqs, - const mips_register_req_t **out_reqs, int n_res); + const mips_register_req_t **out_reqs, int n_res, unsigned latency); /** * Initialize transform ops for the mips opcodes diff --git a/ir/be/ppc32/ppc32_new_nodes.c b/ir/be/ppc32/ppc32_new_nodes.c index d5eb7e1b4..f63a5a88b 100644 --- a/ir/be/ppc32/ppc32_new_nodes.c +++ b/ir/be/ppc32/ppc32_new_nodes.c @@ -513,7 +513,7 @@ ppc32_attr_offset_mode get_ppc32_offset_mode(const ir_node *node) { * Initializes ppc specific node attributes */ void init_ppc32_attributes(ir_node *node, int flags, - const ppc32_register_req_t **in_reqs, const ppc32_register_req_t **out_reqs, int n_res) { + const ppc32_register_req_t **in_reqs, const ppc32_register_req_t **out_reqs, int n_res, unsigned latency) { ppc32_attr_t *attr = get_ppc32_attr(node); attr->flags = flags; diff --git a/ir/be/ppc32/ppc32_new_nodes.h b/ir/be/ppc32/ppc32_new_nodes.h index 08e9e088f..407f4134e 100644 --- a/ir/be/ppc32/ppc32_new_nodes.h +++ b/ir/be/ppc32/ppc32_new_nodes.h @@ -118,7 +118,7 @@ void set_ppc32_offset_mode(const ir_node *node, ppc32_attr_offset_mode mode); ppc32_attr_offset_mode get_ppc32_offset_mode(const ir_node *node); void init_ppc32_attributes(ir_node *node, int flags, - const ppc32_register_req_t **in_reqs, const ppc32_register_req_t **out_reqs, int n_res); + const ppc32_register_req_t **in_reqs, const ppc32_register_req_t **out_reqs, int n_res, unsigned latency); void ppc32_register_additional_opcodes(int opcode_num);