bitset_t *tmp_colors; /**< An auxiliary bitset which is as long as the number of colors in the class. */
bitset_t *colors; /**< The color mask. */
bitset_t *in_colors; /**< Colors used by live in values. */
- bitset_t *ignore_regs; /**< A bitset of all ignore registers in the current class. */
int colors_n; /**< The number of colors. */
DEBUG_ONLY(firm_dbg_module_t *constr_dbg;) /**< Debug output for the constraint handler. */
} be_chordal_alloc_env_t;
{
bitset_t *tmp = alloc_env->tmp_colors;
bitset_copy(tmp, colors);
- bitset_or(tmp, alloc_env->ignore_regs);
+ bitset_or(tmp, alloc_env->chordal_env->ignore_colors);
return bitset_next_clear(tmp, 0);
}
{
be_chordal_alloc_env_t env;
char buf[256];
- int i;
int colors_n = arch_register_class_n_regs(chordal_env->cls);
ir_graph *irg = chordal_env->irg;
env.colors = bitset_alloca(colors_n);
env.tmp_colors = bitset_alloca(colors_n);
env.in_colors = bitset_alloca(colors_n);
- env.ignore_regs = bitset_alloca(colors_n);
env.pre_colored = pset_new_ptr_default();
FIRM_DBG_REGISTER(env.constr_dbg, "firm.be.chordal.constr");
- for(i = 0; i < colors_n; ++i)
- if(arch_register_type_is(&chordal_env->cls->regs[i], ignore))
- bitset_set(env.ignore_regs, i);
/* Handle register targeting constraints */
dom_tree_walk_irg(irg, constraints, NULL, &env);
#include "xmalloc.h"
#include "bechordal_t.h"
+#include "beabi.h"
#include "beutil.h"
#include "besched.h"
#include "benumb_t.h"
}
}
+static void put_ignore_colors(be_chordal_env_t *chordal_env)
+{
+ int n_colors = chordal_env->cls->n_regs;
+ int i;
+
+ bitset_clear_all(chordal_env->ignore_colors);
+ be_abi_put_ignore_regs(chordal_env->birg->abi, chordal_env->cls, chordal_env->ignore_colors);
+ for(i = 0; i < n_colors; ++i)
+ if(arch_register_type_is(&chordal_env->cls->regs[i], ignore))
+ bitset_set(chordal_env->ignore_colors, i);
+}
+
static void be_ra_chordal_main(const be_irg_t *bi)
{
+ const be_main_env_t *main_env = bi->main_env;
+ const arch_isa_t *isa = arch_env_get_isa(main_env->arch_env);
+ ir_graph *irg = bi->irg;
+
int j, m;
be_chordal_env_t chordal_env;
- ir_graph *irg = bi->irg;
- const be_main_env_t *main_env = bi->main_env;
- const arch_isa_t *isa = arch_env_get_isa(main_env->arch_env);
compute_doms(irg);
- chordal_env.opts = &options;
- chordal_env.irg = irg;
- chordal_env.birg = bi;
- chordal_env.dom_front = be_compute_dominance_frontiers(irg);
+ chordal_env.opts = &options;
+ chordal_env.irg = irg;
+ chordal_env.birg = bi;
+ chordal_env.dom_front = be_compute_dominance_frontiers(irg);
FIRM_DBG_REGISTER(chordal_env.dbg, "firm.be.chordal");
obstack_init(&chordal_env.obst);
/* Perform the following for each register class. */
for(j = 0, m = arch_isa_get_n_reg_class(isa); j < m; ++j) {
- chordal_env.cls = arch_isa_get_reg_class(isa, j);
- chordal_env.border_heads = pmap_create();
+ chordal_env.cls = arch_isa_get_reg_class(isa, j);
+ chordal_env.border_heads = pmap_create();
+ chordal_env.ignore_colors = bitset_malloc(chordal_env.cls->n_regs);
+
+ /* put all ignore registers into the ignore register set. */
+ put_ignore_colors(&chordal_env);
be_liveness(irg);
dump(BE_CH_DUMP_LIVE, irg, chordal_env.cls, "-live", dump_ir_block_graph_sched);
chordal_env.ifg = be_ifg_std_new(&chordal_env);
be_ifg_check(chordal_env.ifg);
+#if 1
/* copy minimization */
#ifdef COPYOPT_STAT
co_compare_solvers(&chordal_env);
#else
{
- copy_opt_t *co = new_copy_opt(&chordal_env, co_get_costs_loop_depth);
- co_build_ou_structure(co);
- co_solve_heuristic(co);
- co_free_ou_structure(co);
- free_copy_opt(co);
+ copy_opt_t *co = new_copy_opt(&chordal_env, co_get_costs_loop_depth);
+ co_build_ou_structure(co);
+ co_solve_heuristic(co);
+ co_free_ou_structure(co);
+ free_copy_opt(co);
}
+#endif
#endif
dump(BE_CH_DUMP_COPYMIN, irg, chordal_env.cls, "-copymin", dump_ir_block_graph_sched);
be_ra_chordal_check(&chordal_env);
copystat_dump(irg);
be_ifg_free(chordal_env.ifg);
-
pmap_destroy(chordal_env.border_heads);
+ bitset_free(chordal_env.ignore_colors);
}
be_compute_spill_offsets(&chordal_env);
* Environment for each of the chordal register allocator phases
*/
struct _be_chordal_env_t {
- struct obstack obst; /**< An obstack for temporary storage. */
- be_ra_chordal_opts_t *opts; /**< A pointer to the chordal ra options. */
- const be_irg_t *birg; /**< Back-end IRG session. */
- dom_front_info_t *dom_front; /**< Dominance frontiers. */
- ir_graph *irg; /**< The graph under examination. */
- const arch_register_class_t *cls; /**< The current register class. */
- pmap *border_heads; /**< Maps blocks to border heads. */
- be_ifg_t *ifg; /**< The interference graph. */
- void *data; /**< Some pointer, to which different phases can attach data to. */
+ struct obstack obst; /**< An obstack for temporary storage. */
+ be_ra_chordal_opts_t *opts; /**< A pointer to the chordal ra options. */
+ const be_irg_t *birg; /**< Back-end IRG session. */
+ dom_front_info_t *dom_front; /**< Dominance frontiers. */
+ ir_graph *irg; /**< The graph under examination. */
+ const arch_register_class_t *cls; /**< The current register class. */
+ pmap *border_heads; /**< Maps blocks to border heads. */
+ be_ifg_t *ifg; /**< The interference graph. */
+ void *data; /**< Some pointer, to which different phases can attach data to. */
+ bitset_t *ignore_colors; /**< A set of colors which shall be ignored in register allocation. */
DEBUG_ONLY(firm_dbg_module_t *dbg;) /**< Debug module for the chordal register allocator. */
};
int free_col;
/* Get all possible colors */
- arch_put_non_ignore_regs(arch_env, cls, free_cols);
+ bitset_copy(free_cols, co->cenv->ignore_colors);
+ bitset_flip_all(free_cols);
/* Exclude colors not assignable to the irn */
arch_get_register_req(arch_env, &req, irn, -1);
const arch_env_t *aenv = ou->co->aenv;
const arch_register_class_t *cls = ou->co->cls;
bitset_t *pos_regs = bitset_alloca(cls->n_regs);
- bitset_t *ign_regs = bitset_alloca(cls->n_regs);
DBG((dbg, LEVEL_1, "\tOptimizing unit:\n"));
for (i=0; i<ou->node_count; ++i)
arch_get_allocatable_regs(aenv, ou->nodes[0], -1, pos_regs);
/* exclude ingore colors */
- arch_put_non_ignore_regs(aenv, cls, ign_regs);
- bitset_and(pos_regs, ign_regs);
+ bitset_andnot(pos_regs, ou->co->cenv->ignore_colors);
assert(bitset_popcnt(pos_regs) != 0 && "No register is allowed for this node !!?");
/* get assignable colors */
if (arch_register_req_is(&req, limited))
req.limited(req.limited_env, colors);
- else
- arch_put_non_ignore_regs(ienv->co->aenv, req.cls, colors);
+ else {
+ arch_register_class_put(req.cls, colors);
+ // bitset_andnot(colors, ienv->co->cenv->ignore_colors);
+ }
/* add the coloring constraint */
cst_idx = lpp_add_cst(ienv->lp, NULL, lpp_equal, 1.0);