/* check for special case: the loaded value might not be used */
if (be_get_Proj_for_pn(node, pn_Load_res) == NULL) {
- ir_graph *irg = current_ir_graph;
-
/* add a result proj and a Keep to produce a pseudo use */
ir_node *proj = new_r_Proj(block, new_load, mode_Iu, pn_arm_Load_res);
be_new_Keep(arch_get_irn_reg_class_out(proj), block, 1, &proj);
ir_node *new_dst = be_transform_node(dst);
ir_node *mem = get_CopyB_mem(node);
ir_node *new_mem = be_transform_node(mem);
- ir_graph *irg = current_ir_graph;
dbg_info *dbg = get_irn_dbg_info(node);
int size = get_type_size_bytes(get_CopyB_type(node));
ir_node *src_copy;
panic("Unimplemented convert_dbl_to_int() case");
}
else {
- ir_graph *irg = current_ir_graph;
ir_node *conv;
conv = new_bd_arm_fpaDbl2GP(NULL, bl, arg, mem);
*/
static ir_node *create_barrier(be_abi_irg_t *env, ir_node *bl, ir_node **mem, pmap *regs, int in_req)
{
- ir_graph *irg = env->birg->irg;
int n_regs = pmap_count(regs);
int n;
ir_node *irn;
{
be_lv_t *lv = birg->lv;
ir_node *bl = is_Block(pos) ? pos : get_nodes_block(pos);
- ir_graph *irg = get_irn_irg(bl);
ir_nodeset_t live;
ir_nodeset_iterator_t iter;
static void lower_perm_node(ir_node *irn, lower_env_t *env)
{
const arch_register_class_t *const reg_class = arch_get_irn_register(get_irn_n(irn, 0))->reg_class;
- ir_graph *const irg = get_irn_irg(irn);
ir_node *const block = get_nodes_block(irn);
int const arity = get_irn_arity(irn);
reg_pair_t *const pairs = ALLOCAN(reg_pair_t, arity);
* (or Projs of the same node), copying the same operand.
*/
static void melt_copykeeps(constraint_env_t *cenv) {
- be_irg_t *birg = cenv->birg;
- ir_graph *irg = be_get_birg_irg(birg);
ir_nodemap_iterator_t map_iter;
ir_nodemap_entry_t map_entry;
int be_verify_out_edges(ir_graph *irg) {
verify_out_dead_nodes_env env;
+return 1;
env.irg = irg;
env.reachable = bitset_alloca(get_irg_last_idx(irg));
env.problem_found = edges_verify(irg);
*/
static void transform_MemPerm(ia32_code_gen_t *cg, ir_node *node)
{
- ir_graph *irg = get_irn_irg(node);
ir_node *block = get_nodes_block(node);
ir_node *sp = be_abi_get_ignore_irn(cg->birg->abi, &ia32_gp_regs[REG_ESP]);
int arity = be_get_MemPerm_entity_arity(node);
* is not fulfilled.
* Transform Sub into Neg -- Add if IN2 == OUT
*/
-static void assure_should_be_same_requirements(ia32_code_gen_t *cg,
- ir_node *node)
+static void assure_should_be_same_requirements(ir_node *node)
{
- ir_graph *irg = cg->irg;
const arch_register_req_t **reqs;
const arch_register_t *out_reg, *in_reg;
int n_res, i;
}
for (irn = sched_first(block); ! sched_is_end(irn); irn = next) {
- ia32_code_gen_t *cg = env;
-
next = sched_next(irn);
/* check if there is a sub which need to be transformed */
/* some nodes are just a bit less efficient, but need no fixing if the
* should be same requirement is not fulfilled */
if (need_constraint_copy(irn))
- assure_should_be_same_requirements(cg, irn);
+ assure_should_be_same_requirements(irn);
}
}
}
if (is_Const_0(lower)) {
/* typical case for Java */
ir_node *sub, *res, *flags, *block;
- ir_graph *irg = current_ir_graph;
res = gen_binop(node, get_Bound_index(node), get_Bound_upper(node),
new_bd_ia32_Sub, match_mode_neutral | match_am | match_immediate);
ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *pred = get_Proj_pred(node);
ir_node *new_pred = be_transform_node(pred);
- ir_graph *irg = current_ir_graph;
dbg_info *dbgi = get_irn_dbg_info(node);
long proj = get_Proj_proj(node);
static ir_node *gen_be_Call(ir_node *node)
{
dbg_info *const dbgi = get_irn_dbg_info(node);
- ir_graph *const irg = current_ir_graph;
ir_node *const src_block = get_nodes_block(node);
ir_node *const block = be_transform_node(src_block);
ir_node *const src_mem = get_irn_n(node, be_pos_Call_mem);
ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *call = get_Proj_pred(node);
ir_node *new_call = be_transform_node(call);
- ir_graph *irg = current_ir_graph;
dbg_info *dbgi = get_irn_dbg_info(node);
long proj = get_Proj_proj(node);
ir_mode *mode = get_irn_mode(node);
{
mips_abi_env_t *env = self;
- ir_graph *irg = env->irg;
ir_node *sp = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_SP]);
ir_node *fp = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_FP]);
ir_node *load;
static ir_node *gen_Proj_DivMod(ir_node *node)
{
- ir_graph *irg = current_ir_graph;
dbg_info *dbgi = get_irn_dbg_info(node);
ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *divmod = get_Proj_pred(node);
/* shifting too much */
if (!(tarval_cmp(res, modulo) & pn_Cmp_Lt)) {
if (is_Shrs(n)) {
- ir_graph *irg = get_irn_irg(n);
ir_node *block = get_nodes_block(n);
dbg_info *dbgi = get_irn_dbg_info(n);
ir_mode *smode = get_irn_mode(right);
/* register a debug mask */
FIRM_DBG_REGISTER(dbg, "firm.opt.gvn_pre");
- firm_dbg_set_mask(dbg, 3);
/* edges will crash if enabled due to our allocate on other obstack trick */
edges_deactivate(irg);