const arm_attr_t *attr = get_arm_attr_const(node);
if (ARM_GET_SHF_MOD(attr) == ARM_SHF_IMM) {
- be_emit_irprintf("#0x%X", arm_decode_imm_w_shift(get_arm_value(node)));
+ be_emit_irprintf("#0x%X", arm_decode_imm_w_shift(get_arm_imm_value(node)));
} else if (ARM_GET_FPA_IMM(attr)) {
- be_emit_irprintf("#0x%F", get_arm_value(node));
+ be_emit_irprintf("#%s", arm_get_fpa_imm_name(get_arm_imm_value(node)));
} else if (is_arm_SymConst(node))
be_emit_ident(get_arm_symconst_id(node));
else {
mod = get_arm_shift_modifier(node);
if (ARM_HAS_SHIFT(mod)) {
- long v = get_tarval_long(get_arm_value(node));
+ long v = get_arm_imm_value(node);
be_emit_irprintf(", %s #%l", arm_shf_mod_name(mod), v);
}
unsigned label;
ir_mode *mode;
- key.u.tv = get_arm_value(irn);
+ key.u.tv = get_fpaConst_value(irn);
key.is_ident = 0;
key.label = 0;
entry = (sym_or_tv_t *)set_insert(sym_or_tv, &key, sizeof(key), HASH_PTR(key.u.generic));
* Create the CopyB instruction sequence.
*/
static void emit_arm_CopyB(const ir_node *irn) {
- unsigned int size = get_tarval_long(get_arm_value(irn));
+ unsigned size = (unsigned)get_arm_imm_value(irn);
const char *tgt = arch_register_get_name(get_in_reg(irn, 0));
const char *src = arch_register_get_name(get_in_reg(irn, 1));
be_emit_string(src);
be_emit_cstring(")->(");
arm_emit_source_register(irn, 0);
- be_emit_irprintf(" [%d bytes], Uses ", size);
+ be_emit_irprintf(" [%u bytes], Uses ", size);
be_emit_string(t0);
be_emit_cstring(", ");
be_emit_string(t1);
ir_node *last_block = NULL;
cg = arm_cg;
- isa = (const arm_isa_t *)cg->arch_env->isa;
arch_env = cg->arch_env;
sym_or_tv = new_set(cmp_sym_or_tv, 8);
* Returns the shift modifier string.
*/
const char *arm_shf_mod_name(arm_shift_modifier mod) {
- static const char *names[] = { NULL, NULL, "asr", "lsl", "lsr", "ror", "rrx" };
+ static const char *names[] = { NULL, NULL, "asr", "lsl", "lsr", "ror", "rrx" };
return names[mod];
}
+/**
+ * Return the fpa immediate from the encoding.
+ */
+const char *arm_get_fpa_imm_name(long imm_value) {
+ static const char *fpa_imm[] = {
+ "0",
+ "1",
+ "2",
+ "3",
+ "4",
+ "5",
+ "10",
+ "0.5"
+ };
+ return fpa_imm[imm_value];
+}
+
/***********************************************************************************
* _ _ _ __
* | | (_) | | / _|
case dump_node_nodeattr_txt:
mod = ARM_GET_SHF_MOD(attr);
if (ARM_HAS_SHIFT(mod)) {
- fprintf(F, "[%s #%ld]", arm_shf_mod_name(mod), get_tarval_long(attr->value));
+ fprintf(F, "[%s #%ld]", arm_shf_mod_name(mod), attr->imm_value);
}
else if (mod == ARM_SHF_IMM) {
/* immediate */
- fprintf(F, "[#0x%X]", arm_decode_imm_w_shift(attr->value));
+ fprintf(F, "[#0x%X]", arm_decode_imm_w_shift(attr->imm_value));
}
break;
}
fprintf(F, " (%d)\n", attr->flags);
- if (get_arm_value(n)) {
- if (is_arm_CopyB(n)) {
- fprintf(F, "size = %lu\n", get_tarval_long(get_arm_value(n)));
+ if (is_arm_CopyB(n)) {
+ fprintf(F, "size = %lu\n", get_arm_imm_value(n));
+ } else {
+ long v = get_arm_imm_value(n);
+ if (ARM_GET_FPA_IMM(attr)) {
+ fprintf(F, "immediate float value = %s\n", arm_get_fpa_imm_name(v));
} else {
- if (mode_is_float(get_irn_mode(n))) {
- fprintf(F, "float value = (%f)\n", (double) get_tarval_double(get_arm_value(n)));
- } else if (mode_is_int(get_irn_mode(n))) {
- long v = get_tarval_long(get_arm_value(n));
- fprintf(F, "long value = %ld (0x%08lx)\n", v, v);
- } else if (mode_is_reference(get_irn_mode(n))) {
- fprintf(F, "pointer\n");
- } else {
- assert(0 && "unbehandelter Typ im const-Knoten");
- }
+ fprintf(F, "immediate value = %ld (0x%08lx)\n", v, v);
}
}
+
if (is_arm_CmpBra(n) && get_arm_CondJmp_proj_num(n) >= 0) {
fprintf(F, "proj_num = (%d)\n", get_arm_CondJmp_proj_num(n));
}
return get_irn_generic_attr_const(node);
}
+static const arm_fpaConst_attr_t *get_arm_fpaConst_attr_const(const ir_node *node) {
+ const arm_attr_t *attr = get_arm_attr_const(node);
+ const arm_fpaConst_attr_t *fpa_attr = CONST_CAST_ARM_ATTR(arm_fpaConst_attr_t, attr);
+
+ return fpa_attr;
+}
+
+static arm_fpaConst_attr_t *get_arm_fpaConst_attr(ir_node *node) {
+ arm_attr_t *attr = get_arm_attr(node);
+ arm_fpaConst_attr_t *fpa_attr = CAST_ARM_ATTR(arm_fpaConst_attr_t, attr);
+
+ return fpa_attr;
+}
+
static int is_arm_CondJmp(const ir_node *node) {
int code = get_arm_irn_opcode(node);
const arm_attr_t *attr = get_arm_attr_const(node);
return ARR_LEN(attr->slots);
}
+
/**
- * Returns the tarvalue
+ * Returns the immediate value
*/
-tarval *get_arm_value(const ir_node *node) {
+long get_arm_imm_value(const ir_node *node) {
const arm_attr_t *attr = get_arm_attr_const(node);
- return attr->value;
+ return attr->imm_value;
}
/**
- * Sets the tarvalue
+ * Sets the tarval value
*/
-void set_arm_value(ir_node *node, tarval *tv) {
+void set_arm_imm_value(ir_node *node, long imm_value) {
arm_attr_t *attr = get_arm_attr(node);
- attr->value = tv;
+ attr->imm_value = imm_value;
+}
+
+/**
+ * Returns the fpaConst value
+ */
+tarval *get_fpaConst_value(const ir_node *node) {
+ const arm_fpaConst_attr_t *attr = get_arm_fpaConst_attr_const(node);
+ return attr->tv;
+}
+
+/**
+ * Sets the tarval value
+ */
+void set_fpaConst_value(ir_node *node, tarval *tv) {
+ arm_fpaConst_attr_t *attr = get_arm_fpaConst_attr(node);
+ attr->tv = tv;
}
/**
attr->out_req = out_reqs;
attr->flags = flags;
attr->instr_fl = (ARM_COND_AL << 3) | ARM_SHF_NONE;
- attr->value = NULL;
+ attr->imm_value = 0;
attr->out_flags = NEW_ARR_D(int, obst, n_res);
memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
*/
}
-static int cmp_attr_arm_SymConst(ir_node *a, ir_node *b) {
- const arm_SymConst_attr_t *attr_a = get_irn_generic_attr_const(a);
- const arm_SymConst_attr_t *attr_b = get_irn_generic_attr_const(b);
- return attr_a->symconst_id != attr_b->symconst_id;
-}
-
static int cmp_attr_arm(ir_node *a, ir_node *b) {
arm_attr_t *attr_a = get_irn_generic_attr(a);
arm_attr_t *attr_b = get_irn_generic_attr(b);
- return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);
+ return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);
+}
+
+static int cmp_attr_arm_SymConst(ir_node *a, ir_node *b) {
+ const arm_SymConst_attr_t *attr_a;
+ const arm_SymConst_attr_t *attr_b;
+
+ if (cmp_attr_arm(a, b))
+ return 1;
+
+ attr_a = get_irn_generic_attr_const(a);
+ attr_b = get_irn_generic_attr_const(b);
+ return attr_a->symconst_id != attr_b->symconst_id;
}
static int cmp_attr_arm_CondJmp(ir_node *a, ir_node *b) {
return 1;
}
+static int cmp_attr_arm_fpaConst(ir_node *a, ir_node *b) {
+ const arm_fpaConst_attr_t *attr_a;
+ const arm_fpaConst_attr_t *attr_b;
+
+ if (cmp_attr_arm(a, b))
+ return 1;
+
+ attr_a = get_arm_fpaConst_attr_const(a);
+ attr_b = get_arm_fpaConst_attr_const(b);
+
+ return attr_a->tv != attr_b->tv;
+}
+
/** copies the ARM attributes of a node. */
static void arm_copy_attr(const ir_node *old_node, ir_node *new_node) {
ir_graph *irg = get_irn_irg(new_node);
arch_irn_flags_t get_arm_out_flags(const ir_node *node, int pos);
/**
- * Returns the tarval
+ * Returns the immediate value
*/
-tarval *get_arm_value(const ir_node *node);
+long get_arm_imm_value(const ir_node *node);
/**
- * Sets the tarval
+ * Sets the immediate value
*/
-void set_arm_value(ir_node *node, tarval *tv);
+void set_arm_imm_value(ir_node *node, long imm_value);
+
+/**
+* Return the tarval of a fpaConst
+*/
+tarval *get_fpaConst_value(const ir_node *node);
+
+/**
+ * Sets the tarval of a fpaConst
+ */
+void set_fpaConst_value(ir_node *node, tarval *tv);
/**
* Returns the proj num
/**
* Decode an immediate with shifter operand
*/
-unsigned int arm_decode_imm_w_shift(tarval *tv);
+unsigned int arm_decode_imm_w_shift(long imm_value);
/* Include the generated headers */
#include "gen_arm_new_nodes.h"
/**
* @file
- * @brief declarations for arm node attributes
- * @author Oliver Richter, Tobias Gneist
+ * @brief declarations for ARM node attributes
+ * @author Oliver Richter, Tobias Gneist, Michael Beck
* @version $Id$
*/
#ifndef FIRM_BE_ARM_ARM_NODES_ATTR_H
/** Set the condition code to flags */
#define ARM_SET_COND(attr, code) ((attr)->instr_fl = (((attr)->instr_fl & ~(15 << 4)) | ((code) << 4)))
+/** Encoding for fpa immediates */
+enum fpa_immediates {
+ fpa_null = 0,
+ fpa_one,
+ fpa_two,
+ fpa_three,
+ fpa_four,
+ fpa_five,
+ fpa_ten,
+ fpa_half,
+ fpa_max
+};
+
/** Generic ARM node attributes. */
typedef struct _arm_attr_t {
except_attr exc; /**< the exception attribute. MUST be the first one. */
ir_mode *op_mode; /**< operation mode if different from node's mode */
unsigned instr_fl; /**< condition code, shift modifier */
- tarval *value; /**< immediate */
+ long imm_value; /**< immediate */
int *out_flags; /**< flags for each produced value */
const arch_register_t **slots; /**< register slots for assigned registers */
/** Attributes for a SymConst */
typedef struct _arm_SymConst_attr_t {
- arm_attr_t attr;
+ arm_attr_t attr; /**< base attributes */
ident *symconst_id; /**< for SymConsts: its ident */
} arm_SymConst_attr_t;
/** Attributes for a CondJmp */
typedef struct _arm_CondJmp_attr_t {
- arm_attr_t attr;
+ arm_attr_t attr; /**< base attributes */
int proj_num;
} arm_CondJmp_attr_t;
/** Attributes for a SwitchJmp */
typedef struct _arm_SwitchJmp_attr_t {
- arm_attr_t attr;
+ arm_attr_t attr; /**< base attributes */
int n_projs;
- long default_proj_num;
+ long default_proj_num;
} arm_SwitchJmp_attr_t;
+/** Attributes for a fpaConst */
+typedef struct _arm_fpaConst_attr_t {
+ arm_attr_t attr; /**< base attributes */
+ tarval *tv; /**< the tarval representing the FP const */
+} arm_fpaConst_attr_t;
+
/**
* Returns the shift modifier string.
*/
const char *arm_shf_mod_name(arm_shift_modifier mod);
+/**
+ * Return the fpa immediate from the encoding.
+ */
+const char *arm_get_fpa_imm_name(long imm_value);
+
+#define CAST_ARM_ATTR(type,ptr) ((type *)(ptr))
+#define CONST_CAST_ARM_ATTR(type,ptr) ((const type *)(ptr))
+
#endif
arm_SymConst_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
arm_CondJmp_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
arm_SwitchJmp_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
+ arm_fpaConst_attr_t => "\tinit_arm_attributes(res, flags, in_reqs, out_reqs, exec_units, n_res);",
);
%compare_attr = (
arm_SymConst_attr_t => "cmp_attr_arm_SymConst",
arm_CondJmp_attr_t => "cmp_attr_arm_CondJmp",
arm_SwitchJmp_attr_t => "cmp_attr_arm_SwitchJmp",
+ arm_fpaConst_attr_t => "cmp_attr_arm_fpaConst",
);
#%operands = (
op_flags => "C",
irn_flags => "R",
comment => "construct Add: Add(a, b) = Add(b, a) = a + b",
- attr => "arm_shift_modifier mod, tarval *shf",
- init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
- cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+ attr => "arm_shift_modifier mod, long shf",
+ init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+ cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
emit => '. add %D0, %S0, %S1%X'
},
Add_i => {
irn_flags => "R",
comment => "construct Add: Add(a, const) = Add(const, a) = a + const",
- attr => "tarval *tv",
- init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
- cmp_attr => 'return attr_a->value != attr_b->value;',
+ attr => "long imm",
+ init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
emit => '. add %D0, %S0, %C'
},
op_flags => "C",
irn_flags => "R",
comment => "construct And: And(a, b) = And(b, a) = a AND b",
- attr => "arm_shift_modifier mod, tarval *shf",
- init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
- cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+ attr => "arm_shift_modifier mod, long shf",
+ init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+ cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
emit => '. and %D0, %S0, %S1%X'
},
And_i => {
irn_flags => "R",
comment => "construct And: And(a, const) = And(const, a) = a AND const",
- attr => "tarval *tv",
- init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
+ attr => "long imm",
+ init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
emit => '. and %D0, %S0, %C',
- cmp_attr => 'return attr_a->value != attr_b->value;'
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;'
},
Or => {
op_flags => "C",
irn_flags => "R",
comment => "construct Or: Or(a, b) = Or(b, a) = a OR b",
- attr => "arm_shift_modifier mod, tarval *shf",
- init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
- cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+ attr => "arm_shift_modifier mod, long shf",
+ init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+ cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
emit => '. orr %D0, %S0, %S1%X'
},
Or_i => {
irn_flags => "R",
comment => "construct Or: Or(a, const) = Or(const, a) = a OR const",
- attr => "tarval *tv",
- init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
+ attr => "long imm",
+ init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
- cmp_attr => 'return attr_a->value != attr_b->value;',
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
emit => '. orr %D0, %S0, %C'
},
op_flags => "C",
irn_flags => "R",
comment => "construct Eor: Eor(a, b) = Eor(b, a) = a EOR b",
- attr => "arm_shift_modifier mod, tarval *shf",
- init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
- cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+ attr => "arm_shift_modifier mod, long shf",
+ init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+ cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
emit => '. eor %D0, %S0, %S1%X'
},
Eor_i => {
irn_flags => "R",
comment => "construct Eor: Eor(a, const) = Eor(const, a) = a EOR const",
- attr => "tarval *tv",
- init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
+ attr => "long imm",
+ init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
- cmp_attr => 'return attr_a->value != attr_b->value;',
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
emit => '. eor %D0, %S0, %C'
},
Bic => {
irn_flags => "R",
comment => "construct Bic: Bic(a, b) = a AND ~b",
- attr => "arm_shift_modifier mod, tarval *shf",
- init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
- cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+ attr => "arm_shift_modifier mod, long shf",
+ init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+ cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
emit => '. bic %D0, %S0, %S1%X'
},
Bic_i => {
irn_flags => "R",
comment => "construct Bic: Bic(a, const) = a AND ~const",
- attr => "tarval *tv",
- init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
+ attr => "long imm",
+ init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
emit => '. bic %D0, %S0, %C',
- cmp_attr => 'return attr_a->value != attr_b->value;'
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;'
},
Sub => {
irn_flags => "R",
comment => "construct Sub: Sub(a, b) = a - b",
- attr => "arm_shift_modifier mod, tarval *shf",
- init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
- cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+ attr => "arm_shift_modifier mod, long shf",
+ init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+ cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
emit => '. sub %D0, %S0, %S1%X'
},
Sub_i => {
irn_flags => "R",
comment => "construct Sub: Sub(a, const) = a - const",
- attr => "tarval *tv",
- init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
- cmp_attr => 'return attr_a->value != attr_b->value;',
+ attr => "long imm",
+ init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
emit => '. sub %D0, %S0, %C',
},
Rsb => {
irn_flags => "R",
comment => "construct Rsb: Rsb(a, b) = b - a",
- attr => "arm_shift_modifier mod, tarval *shf",
- init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
- cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+ attr => "arm_shift_modifier mod, long shf",
+ init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+ cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
reg_req => { "in" => [ "gp", "gp" ], "out" => [ "gp" ] },
emit => '. rsb %D0, %S0, %S1%X'
},
Rsb_i => {
irn_flags => "R",
comment => "construct Rsb: Rsb(a, const) = const - a",
- attr => "tarval *tv",
- init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
+ attr => "long imm",
+ init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
emit => '. rsb %D0, %S0, %C',
- cmp_attr => 'return attr_a->value != attr_b->value;'
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;'
},
Shl => {
Mov => {
irn_flags => "R",
comment => "construct Mov: a = b",
- attr => "arm_shift_modifier mod, tarval *shf",
- init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
- cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+ attr => "arm_shift_modifier mod, long shf",
+ init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+ cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
emit => '. mov %D0, %S0%X'
},
Mov_i => {
irn_flags => "R",
comment => "represents an integer constant",
- attr => "tarval *tv",
- init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
+ attr => "long imm",
+ init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
reg_req => { "out" => [ "gp" ] },
emit => '. mov %D0, %C',
- cmp_attr => 'return attr_a->value != attr_b->value;'
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;'
},
Mvn => {
irn_flags => "R",
comment => "construct Not: Not(a) = !a",
- attr => "arm_shift_modifier mod, tarval *shf",
- init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->value = shf;',
- cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->value != attr_b->value);',
+ attr => "arm_shift_modifier mod, long shf",
+ init_attr => 'ARM_SET_SHF_MOD(attr, mod); attr->imm_value = shf;',
+ cmp_attr => 'return (attr_a->instr_fl != attr_b->instr_fl) || (attr_a->imm_value != attr_b->imm_value);',
reg_req => { "in" => [ "gp" ], "out" => [ "gp" ] },
emit => '. mvn %D0, %S0%X'
},
Mvn_i => {
irn_flags => "R",
comment => "represents a negated integer constant",
- attr => "tarval *tv",
- init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->value = tv;',
- cmp_attr => 'return attr_a->value != attr_b->value;',
+ attr => "long imm",
+ init_attr => 'ARM_SET_SHF_MOD(attr, ARM_SHF_IMM); attr->imm_value = imm;',
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
reg_req => { "out" => [ "gp" ] },
emit => '. mvn %D0, %C',
},
op_flags => "F|H",
state => "pinned",
comment => "implements a memcopy: CopyB(dst, src, size, mem) == memcpy(dst, src, size)",
- attr => "tarval *tv",
- init_attr => 'attr->value = tv;',
+ attr => "long imm",
+ init_attr => 'attr->imm_value = imm;',
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
reg_req => { "in" => [ "!sp", "!sp", "gp", "gp", "gp", "none" ], "out" => [ "none" ] },
outs => [ "M" ],
},
op_flags => "C",
irn_flags => "R",
comment => "construct FPA Add: Add(a, b) = Add(b, a) = a + b",
- attr => "tarval *tv",
- init_attr => 'ARM_SET_FPA_IMM(attr); attr->value = tv;',
- cmp_attr => 'return attr_a->value != attr_b->value;',
+ attr => "long imm",
+ init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
emit => '. adf%M %D0, %S0, %C',
},
op_flags => "C",
irn_flags => "R",
comment => "construct FPA Mul: Mul(a, b) = Mul(b, a) = a * b",
- attr => "tarval *tv",
- init_attr => 'ARM_SET_FPA_IMM(attr); attr->value = tv;',
- cmp_attr => 'return attr_a->value != attr_b->value;',
+ attr => "long imm",
+ init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
emit => '. muf%M %D0, %S0, %C',
},
fpaSuf_i => {
irn_flags => "R",
comment => "construct FPA Sub: Sub(a, b) = a - b",
- attr => "tarval *tv",
- init_attr => 'ARM_SET_FPA_IMM(attr); attr->value = tv;',
- cmp_attr => 'return attr_a->value != attr_b->value;',
+ attr => "long imm",
+ init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
emit => '. suf%M %D0, %S0, %C'
},
fpaRsf_i => {
irn_flags => "R",
comment => "construct FPA reverse Sub: Sub(a, b) = b - a",
- attr => "tarval *tv",
- init_attr => 'ARM_SET_FPA_IMM(attr); attr->value = tv;',
- cmp_attr => 'return attr_a->value != attr_b->value;',
+ attr => "long imm",
+ init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
reg_req => { "in" => [ "fpa" ], "out" => [ "fpa" ] },
emit => '. rsf%M %D0, %S0, %C'
},
fpaDvf_i => {
comment => "construct FPA Div: Div(a, b) = a / b",
- attr => "ir_mode *op_mode, tarval *tv",
- init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->value = tv;',
- cmp_attr => 'return attr_a->value != attr_b->value;',
+ attr => "ir_mode *op_mode, long imm",
+ init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
reg_req => { "in" => [ "fpa" ], "out" => [ "fpa", "none" ] },
emit =>'. dvf%M %D0, %S0, %C',
outs => [ "res", "M" ],
fpaRdf_i => {
comment => "construct FPA reverse Div: Div(a, b) = b / a",
- attr => "ir_mode *op_mode, tarval *tv",
- init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->value = tv;',
- cmp_attr => 'return attr_a->value != attr_b->value;',
+ attr => "ir_mode *op_mode, long imm",
+ init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
reg_req => { "in" => [ "fpa" ], "out" => [ "fpa", "none" ] },
emit =>'. rdf%M %D0, %S0, %S1',
outs => [ "res", "M" ],
fpaFdv_i => {
comment => "construct FPA Fast Div: Div(a, b) = a / b",
- attr => "ir_mode *op_mode, tarval *tv",
- init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->value = tv;',
- cmp_attr => 'return attr_a->value != attr_b->value;',
+ attr => "ir_mode *op_mode, long imm",
+ init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
reg_req => { "in" => [ "fpa" ], "out" => [ "fpa", "none" ] },
emit =>'. fdv%M %D0, %S0, %C',
outs => [ "res", "M" ],
fpaFrd_i => {
comment => "construct FPA Fast reverse Div: Div(a, b) = b / a",
- attr => "ir_mode *op_mode, tarval *tv",
- init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->value = tv;',
- cmp_attr => 'return attr_a->value != attr_b->value;',
+ attr => "ir_mode *op_mode, long imm",
+ init_attr => 'attr->op_mode = op_mode; ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;',
reg_req => { "in" => [ "fpa" ], "out" => [ "fpa", "none" ] },
emit =>'. frd%M %D0, %S0, %C',
outs => [ "res", "M" ],
fpaMvf_i => {
irn_flags => "R",
comment => "represents a float constant",
- attr => "tarval *tv",
- init_attr => 'ARM_SET_FPA_IMM(attr); attr->value = tv;',
+ attr => "long imm",
+ init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
reg_req => { "out" => [ "fpa" ] },
- mode => "get_tarval_mode(tv)",
emit => '. mvf %D0, %C',
- cmp_attr => 'return attr_a->value != attr_b->value;'
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;'
},
fpaMnf => {
fpaMnf_i => {
irn_flags => "R",
comment => "represents a float constant",
- attr => "tarval *tv",
- init_attr => 'ARM_SET_FPA_IMM(attr); attr->value = tv;',
+ attr => "long imm",
+ init_attr => 'ARM_SET_FPA_IMM(attr); attr->imm_value = imm;',
reg_req => { "out" => [ "fpa" ] },
- mode => "get_tarval_mode(tv)",
emit => '. mnf %D0, %C',
- cmp_attr => 'return attr_a->value != attr_b->value;'
+ cmp_attr => 'return attr_a->imm_value != attr_b->imm_value;'
},
fpaAbs => {
irn_flags => "R",
comment => "construct a floating point constant",
attr => "tarval *tv",
- init_attr => "attr->value = tv;",
+ init_attr => "attr->tv = tv;",
mode => "get_tarval_mode(tv)",
reg_req => { "out" => [ "fpa" ] },
+ attr_type => "arm_fpaConst_attr_t",
}
#---------------------------------------------------#
*/
static ir_node *create_const_node(dbg_info *dbg, ir_node *block, long value) {
ir_mode *mode = mode_Iu;
- tarval *tv = new_tarval_from_long(value, mode);
ir_graph *irg = current_ir_graph;
ir_node *res;
if (mode_needs_gp_reg(mode))
mode = mode_Iu;
- res = new_rd_arm_Mov_i(dbg, irg, block, mode, tv);
+ res = new_rd_arm_Mov_i(dbg, irg, block, mode, value);
/* ensure the const is scheduled AFTER the stack frame */
add_irn_dep(res, get_irg_frame(irg));
return res;
*/
static ir_node *create_const_neg_node(dbg_info *dbg, ir_node *block, long value) {
ir_mode *mode = mode_Iu;
- tarval *tv = new_tarval_from_long(value, mode);
- ir_graph *irg = current_ir_graph;
+ ir_graph *irg = current_ir_graph;
ir_node *res;
if (mode_needs_gp_reg(mode))
mode = mode_Iu;
- res = new_rd_arm_Mvn_i(dbg, irg, block, mode, tv);
+ res = new_rd_arm_Mvn_i(dbg, irg, block, mode, value);
/* ensure the const is scheduled AFTER the stack frame */
add_irn_dep(res, get_irg_frame(irg));
return res;
/**
* Decode an immediate with shifter operand
*/
-unsigned int arm_decode_imm_w_shift(tarval *tv) {
- unsigned l = get_tarval_long(tv);
+unsigned int arm_decode_imm_w_shift(long imm_value) {
+ unsigned l = (unsigned)imm_value;
unsigned rol = (l & ~0xFF) >> 7;
return do_rol(l & 0xFF, rol);
result = create_const_neg_node(dbg, block, arm_encode_imm_w_shift(vn.shifts[0], vn.values[0]));
for (cnt = 1; cnt < vn.ops; ++cnt) {
- tarval *tv = new_tarval_from_long(arm_encode_imm_w_shift(vn.shifts[cnt], vn.values[cnt]), mode);
- ir_node *bic_i_node = new_rd_arm_Bic_i(dbg, current_ir_graph, block, result, mode, tv);
+ long value = arm_encode_imm_w_shift(vn.shifts[cnt], vn.values[cnt]);
+ ir_node *bic_i_node = new_rd_arm_Bic_i(dbg, current_ir_graph, block, result, mode, value);
result = bic_i_node;
}
}
result = create_const_node(dbg, block, arm_encode_imm_w_shift(v.shifts[0], v.values[0]));
for (cnt = 1; cnt < v.ops; ++cnt) {
- tarval *tv = new_tarval_from_long(arm_encode_imm_w_shift(v.shifts[cnt], v.values[cnt]), mode);
- ir_node *orr_i_node = new_rd_arm_Or_i(dbg, current_ir_graph, block, result, mode, tv);
+ long value = arm_encode_imm_w_shift(v.shifts[cnt], v.values[cnt]);
+ ir_node *orr_i_node = new_rd_arm_Or_i(dbg, current_ir_graph, block, result, mode, value);
result = orr_i_node;
}
}
static ir_node *gen_zero_extension(dbg_info *dbg, ir_node *block, ir_node *op, int result_bits) {
unsigned mask_bits = (1 << result_bits) - 1;
ir_node *mask_node = create_const_graph_value(dbg, block, mask_bits);
- return new_rd_arm_And(dbg, current_ir_graph, block, op, mask_node, mode_Iu, ARM_SHF_NONE, NULL);
+ return new_rd_arm_And(dbg, current_ir_graph, block, op, mask_node, mode_Iu, ARM_SHF_NONE, 0);
}
/**
*pmod = mod;
if (mod != ARM_SHF_NONE) {
- long v = get_tarval_long(get_arm_value(n));
+ long v = get_arm_imm_value(n);
if (v < 32)
return (int)v;
}
env_cg->have_fp_insn = 1;
if (USE_FPA(env_cg->isa)) {
if (is_arm_fpaMvf_i(new_op1))
- return new_rd_arm_fpaAdf_i(dbg, irg, block, new_op2, mode, get_arm_value(new_op1));
+ return new_rd_arm_fpaAdf_i(dbg, irg, block, new_op2, mode, get_arm_imm_value(new_op1));
if (is_arm_fpaMvf_i(new_op2))
- return new_rd_arm_fpaAdf_i(dbg, irg, block, new_op1, mode, get_arm_value(new_op2));
+ return new_rd_arm_fpaAdf_i(dbg, irg, block, new_op1, mode, get_arm_imm_value(new_op2));
return new_rd_arm_fpaAdf(dbg, irg, block, new_op1, new_op2, mode);
} else if (USE_VFP(env_cg->isa)) {
assert(mode != mode_E && "IEEE Extended FP not supported");
mode = mode_Iu;
if (is_arm_Mov_i(new_op1))
- return new_rd_arm_Add_i(dbg, irg, block, new_op2, mode, get_arm_value(new_op1));
+ return new_rd_arm_Add_i(dbg, irg, block, new_op2, mode, get_arm_imm_value(new_op1));
if (is_arm_Mov_i(new_op2))
- return new_rd_arm_Add_i(dbg, irg, block, new_op1, mode, get_arm_value(new_op2));
+ return new_rd_arm_Add_i(dbg, irg, block, new_op1, mode, get_arm_imm_value(new_op2));
/* check for MLA */
if (is_arm_Mul(new_op1) && get_irn_n_edges(op1) == 1) {
v = is_shifter_operand(new_op1, &mod);
if (v) {
new_op1 = get_irn_n(new_op1, 0);
- return new_rd_arm_Add(dbg, irg, block, new_op2, new_op1, mode, mod, new_tarval_from_long(v, mode_Iu));
+ return new_rd_arm_Add(dbg, irg, block, new_op2, new_op1, mode, mod, v);
}
/* is the second a shifter */
v = is_shifter_operand(new_op2, &mod);
if (v) {
new_op2 = get_irn_n(new_op2, 0);
- return new_rd_arm_Add(dbg, irg, block, new_op1, new_op2, mode, mod, new_tarval_from_long(v, mode_Iu));
+ return new_rd_arm_Add(dbg, irg, block, new_op1, new_op2, mode, mod, v);
}
/* normal ADD */
- return new_rd_arm_Add(dbg, irg, block, new_op1, new_op2, mode, ARM_SHF_NONE, NULL);
+ return new_rd_arm_Add(dbg, irg, block, new_op1, new_op2, mode, ARM_SHF_NONE, 0);
}
}
env_cg->have_fp_insn = 1;
if (USE_FPA(env_cg->isa)) {
if (is_arm_Mov_i(new_op1))
- return new_rd_arm_fpaMuf_i(dbg, irg, block, new_op2, mode, get_arm_value(new_op1));
+ return new_rd_arm_fpaMuf_i(dbg, irg, block, new_op2, mode, get_arm_imm_value(new_op1));
if (is_arm_Mov_i(new_op2))
- return new_rd_arm_fpaMuf_i(dbg, irg, block, new_op1, mode, get_arm_value(new_op2));
+ return new_rd_arm_fpaMuf_i(dbg, irg, block, new_op1, mode, get_arm_imm_value(new_op2));
return new_rd_arm_fpaMuf(dbg, irg, block, new_op1, new_op2, mode);
}
else if (USE_VFP(env_cg->isa)) {
env_cg->have_fp_insn = 1;
if (USE_FPA(env_cg->isa)) {
if (is_arm_Mov_i(new_op1))
- return new_rd_arm_fpaRdf_i(dbg, current_ir_graph, block, new_op2, mode, get_arm_value(new_op1));
+ return new_rd_arm_fpaRdf_i(dbg, current_ir_graph, block, new_op2, mode, get_arm_imm_value(new_op1));
if (is_arm_Mov_i(new_op2))
- return new_rd_arm_fpaDvf_i(dbg, current_ir_graph, block, new_op1, mode, get_arm_value(new_op2));
+ return new_rd_arm_fpaDvf_i(dbg, current_ir_graph, block, new_op1, mode, get_arm_imm_value(new_op2));
return new_rd_arm_fpaDvf(dbg, current_ir_graph, block, new_op1, new_op2, mode);
} else if (USE_VFP(env_cg->isa)) {
assert(mode != mode_E && "IEEE Extended FP not supported");
arm_shift_modifier mod; \
\
if (is_arm_Mov_i(new_op1)) \
- return new_rd_arm_ ## op ## _i(dbg, irg, block, new_op2, mode, get_arm_value(new_op1)); \
+ return new_rd_arm_ ## op ## _i(dbg, irg, block, new_op2, mode, get_arm_imm_value(new_op1)); \
if (is_arm_Mov_i(new_op2)) \
- return new_rd_arm_ ## op ## _i(dbg, irg, block, new_op1, mode, get_arm_value(new_op2)); \
+ return new_rd_arm_ ## op ## _i(dbg, irg, block, new_op1, mode, get_arm_imm_value(new_op2)); \
/* is the first a shifter */ \
v = is_shifter_operand(new_op1, &mod); \
if (v) { \
new_op1 = get_irn_n(new_op1, 0); \
- return new_rd_arm_ ## op(dbg, irg, block, new_op2, new_op1, mode, mod, new_tarval_from_long(v, mode_Iu)); \
+ return new_rd_arm_ ## op(dbg, irg, block, new_op2, new_op1, mode, mod, v); \
} \
/* is the second a shifter */ \
v = is_shifter_operand(new_op2, &mod); \
if (v) { \
new_op2 = get_irn_n(new_op2, 0); \
- return new_rd_arm_ ## op(dbg, irg, block, new_op1, new_op2, mode, mod, new_tarval_from_long(v, mode_Iu)); \
+ return new_rd_arm_ ## op(dbg, irg, block, new_op1, new_op2, mode, mod, v); \
} \
/* Normal op */ \
- return new_rd_arm_ ## op(dbg, irg, block, new_op1, new_op2, mode, ARM_SHF_NONE, NULL) \
+ return new_rd_arm_ ## op(dbg, irg, block, new_op1, new_op2, mode, ARM_SHF_NONE, 0) \
/**
* Creates an ARM And.
env_cg->have_fp_insn = 1;
if (USE_FPA(env_cg->isa)) {
if (is_arm_Mov_i(new_op1))
- return new_rd_arm_fpaRsf_i(dbg, irg, block, new_op2, mode, get_arm_value(new_op1));
+ return new_rd_arm_fpaRsf_i(dbg, irg, block, new_op2, mode, get_arm_imm_value(new_op1));
if (is_arm_Mov_i(new_op2))
- return new_rd_arm_fpaSuf_i(dbg, irg, block, new_op1, mode, get_arm_value(new_op2));
+ return new_rd_arm_fpaSuf_i(dbg, irg, block, new_op1, mode, get_arm_imm_value(new_op2));
return new_rd_arm_fpaSuf(dbg, irg, block, new_op1, new_op2, mode);
} else if (USE_VFP(env_cg->isa)) {
assert(mode != mode_E && "IEEE Extended FP not supported");
mode = mode_Iu;
if (is_arm_Mov_i(new_op1))
- return new_rd_arm_Rsb_i(dbg, irg, block, new_op2, mode, get_arm_value(new_op1));
+ return new_rd_arm_Rsb_i(dbg, irg, block, new_op2, mode, get_arm_imm_value(new_op1));
if (is_arm_Mov_i(new_op2))
- return new_rd_arm_Sub_i(dbg, irg, block, new_op1, mode, get_arm_value(new_op2));
+ return new_rd_arm_Sub_i(dbg, irg, block, new_op1, mode, get_arm_imm_value(new_op2));
/* is the first a shifter */
v = is_shifter_operand(new_op1, &mod);
if (v) {
new_op1 = get_irn_n(new_op1, 0);
- return new_rd_arm_Rsb(dbg, irg, block, new_op2, new_op1, mode, mod, new_tarval_from_long(v, mode_Iu));
+ return new_rd_arm_Rsb(dbg, irg, block, new_op2, new_op1, mode, mod, v);
}
/* is the second a shifter */
v = is_shifter_operand(new_op2, &mod);
if (v) {
new_op2 = get_irn_n(new_op2, 0);
- return new_rd_arm_Sub(dbg, irg, block, new_op1, new_op2, mode, mod, new_tarval_from_long(v, mode_Iu));
+ return new_rd_arm_Sub(dbg, irg, block, new_op1, new_op2, mode, mod, v);
}
/* normal sub */
- return new_rd_arm_Sub(dbg, irg, block, new_op1, new_op2, mode, ARM_SHF_NONE, NULL);
+ return new_rd_arm_Sub(dbg, irg, block, new_op1, new_op2, mode, ARM_SHF_NONE, 0);
}
}
dbg_info *dbg = get_irn_dbg_info(node);
if (is_arm_Mov_i(new_op2)) {
- return new_rd_arm_Mov(dbg, current_ir_graph, block, new_op1, mode, ARM_SHF_LSL, get_arm_value(new_op2));
+ return new_rd_arm_Mov(dbg, current_ir_graph, block, new_op1, mode, ARM_SHF_LSL, get_arm_imm_value(new_op2));
}
return new_rd_arm_Shl(dbg, current_ir_graph, block, new_op1, new_op2, mode);
}
dbg_info *dbg = get_irn_dbg_info(node);
if (is_arm_Mov_i(new_op2)) {
- return new_rd_arm_Mov(dbg, current_ir_graph, block, new_op1, mode, ARM_SHF_LSR, get_arm_value(new_op2));
+ return new_rd_arm_Mov(dbg, current_ir_graph, block, new_op1, mode, ARM_SHF_LSR, get_arm_imm_value(new_op2));
}
return new_rd_arm_Shr(dbg, current_ir_graph, block, new_op1, new_op2, mode);
}
dbg_info *dbg = get_irn_dbg_info(node);
if (is_arm_Mov_i(new_op2)) {
- return new_rd_arm_Mov(dbg, current_ir_graph, block, new_op1, mode, ARM_SHF_ASR, get_arm_value(new_op2));
+ return new_rd_arm_Mov(dbg, current_ir_graph, block, new_op1, mode, ARM_SHF_ASR, get_arm_imm_value(new_op2));
}
return new_rd_arm_Shrs(dbg, current_ir_graph, block, new_op1, new_op2, mode);
}
ir_node *op = get_Not_op(node);
ir_node *new_op = be_transform_node(op);
dbg_info *dbg = get_irn_dbg_info(node);
- tarval *tv = NULL;
ir_mode *mode = mode_Iu;
arm_shift_modifier mod = ARM_SHF_NONE;
int v = is_shifter_operand(new_op, &mod);
if (v) {
new_op = get_irn_n(new_op, 0);
- tv = new_tarval_from_long(v, mode_Iu);
}
- return new_rd_arm_Mvn(dbg, current_ir_graph, block, new_op, mode, mod, tv);
+ return new_rd_arm_Mvn(dbg, current_ir_graph, block, new_op, mode, mod, v);
}
/**
}
assert(mode_is_data(mode));
mode = mode_Iu;
- return new_rd_arm_Rsb_i(dbg, current_ir_graph, block, new_op, mode, get_mode_null(mode));
+ return new_rd_arm_Rsb_i(dbg, current_ir_graph, block, new_op, mode, 0);
}
/**
}
const_graph = create_const_graph_value(dbg, block, translation);
- sub = new_rd_arm_Sub(dbg, irg, block, new_op, const_graph, mode, ARM_SHF_NONE, NULL);
+ sub = new_rd_arm_Sub(dbg, irg, block, new_op, const_graph, mode, ARM_SHF_NONE, 0);
return new_rd_arm_SwitchJmp(dbg, irg, block, sub, n_projs, get_Cond_defaultProj(node) - translation);
}
}
return NULL;
}
-enum fpa_immediates {
- fpa_null = 0,
- fpa_one,
- fpa_two,
- fpa_three,
- fpa_four,
- fpa_five,
- fpa_ten,
- fpa_half,
- fpa_max
-};
-
static tarval *fpa_imm[3][fpa_max];
/**
for (j = 0; j < fpa_max; ++j) {
if (tv == fpa_imm[i][j])
- return res;
+ return res * j;
}
- return 0;
+ return fpa_max;
}
/**
tarval *tv = get_Const_tarval(node);
int imm = is_fpa_immediate(tv);
- if (imm) {
+ if (imm != fpa_max) {
if (imm > 0)
- node = new_rd_arm_fpaMvf_i(dbg, irg, block, tv);
+ node = new_rd_arm_fpaMvf_i(dbg, irg, block, mode, imm);
else
- node = new_rd_arm_fpaMnf_i(dbg, irg, block, tv);
+ node = new_rd_arm_fpaMnf_i(dbg, irg, block, mode, -imm);
} else {
node = new_rd_arm_fpaConst(dbg, irg, block, tv);
}
new_rd_arm_EmptyReg(dbg, irg, block, mode_Iu),
new_rd_arm_EmptyReg(dbg, irg, block, mode_Iu),
new_rd_arm_EmptyReg(dbg, irg, block, mode_Iu),
- new_mem, new_tarval_from_long(size, mode_Iu));
+ new_mem, size);
}
}
cnst = create_const_graph_value(dbg, block, (unsigned)offset);
if (is_arm_Mov_i(cnst))
- return new_rd_arm_Add_i(dbg, current_ir_graph, block, new_op, mode, get_arm_value(cnst));
- return new_rd_arm_Add(dbg, current_ir_graph, block, new_op, cnst, mode, ARM_SHF_NONE, NULL);
+ return new_rd_arm_Add_i(dbg, current_ir_graph, block, new_op, mode, get_arm_imm_value(cnst));
+ return new_rd_arm_Add(dbg, current_ir_graph, block, new_op, cnst, mode, ARM_SHF_NONE, 0);
}
#if 0
projects / libfirm / commitdiff