if (get_irn_mode(node) != mode_T) {
reg = arch_get_irn_register(node);
} else if (is_TEMPLATE_irn(node)) {
- reg = get_TEMPLATE_out_reg(node, pos);
+ reg = arch_irn_get_register(node, pos);
} else {
const ir_edge_t *edge;
static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs,
int inout) {
char *dir = inout ? "out" : "in";
- int max = inout ? get_TEMPLATE_n_res(n) : get_irn_arity(n);
+ int max = inout ? (int) arch_irn_get_n_outs(n) : get_irn_arity(n);
char buf[1024];
int i;
*/
static int TEMPLATE_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
ir_mode *mode = NULL;
- int bad = 0;
- int i;
- const TEMPLATE_attr_t *attr;
+ int bad = 0;
+ int i, n_res, flags;
const arch_register_req_t **reqs;
- const arch_register_t **slots;
switch (reason) {
case dump_node_opcode_txt:
break;
case dump_node_info_txt:
- attr = get_TEMPLATE_attr_const(n);
fprintf(F, "=== TEMPLATE attr begin ===\n");
/* dump IN requirements */
dump_reg_req(F, n, reqs, 0);
}
- /* dump OUT requirements */
- if (ARR_LEN(attr->slots) > 0) {
+ n_res = arch_irn_get_n_outs(n);
+ if (n_res > 0) {
+ /* dump OUT requirements */
reqs = get_TEMPLATE_out_req_all(n);
dump_reg_req(F, n, reqs, 1);
- }
- /* dump assigned registers */
- slots = get_TEMPLATE_slots(n);
- if (slots && ARR_LEN(attr->slots) > 0) {
- for (i = 0; i < ARR_LEN(attr->slots); i++) {
- if (slots[i]) {
- fprintf(F, "reg #%d = %s\n", i, slots[i]->name);
- }
- else {
- fprintf(F, "reg #%d = n/a\n", i);
- }
+ /* dump assigned registers */
+ for (i = 0; i < n_res; i++) {
+ const arch_register_t *reg = arch_irn_get_register(n, i);
+
+ fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
}
+ fprintf(F, "\n");
}
- fprintf(F, "\n");
/* dump n_res */
- fprintf(F, "n_res = %d\n", get_TEMPLATE_n_res(n));
+ fprintf(F, "n_res = %d\n", n_res);
/* dump flags */
fprintf(F, "flags =");
- if (attr->flags == arch_irn_flags_none) {
+ flags = arch_irn_get_flags(n);
+ if (flags == arch_irn_flags_none) {
fprintf(F, " none");
}
else {
- if (attr->flags & arch_irn_flags_dont_spill) {
+ if (flags & arch_irn_flags_dont_spill) {
fprintf(F, " unspillable");
}
- if (attr->flags & arch_irn_flags_rematerializable) {
+ if (flags & arch_irn_flags_rematerializable) {
fprintf(F, " remat");
}
+ if (flags & arch_irn_flags_modify_flags) {
+ fprintf(F, " modify_flags");
+ }
}
- fprintf(F, " (%d)\n", attr->flags);
+ fprintf(F, " (%d)\n", flags);
/* TODO: dump all additional attributes */
attr->in_req[pos] = req;
}
-/**
- * Returns the register flag of an TEMPLATE node.
- */
-arch_irn_flags_t get_TEMPLATE_flags(const ir_node *node) {
- const TEMPLATE_attr_t *attr = get_TEMPLATE_attr_const(node);
- return attr->flags;
-}
-
-/**
- * Sets the register flag of an TEMPLATE node.
- */
-void set_TEMPLATE_flags(ir_node *node, arch_irn_flags_t flags) {
- TEMPLATE_attr_t *attr = get_TEMPLATE_attr(node);
- attr->flags = flags;
-}
-
-/**
- * Returns the result register slots of an TEMPLATE node.
- */
-const arch_register_t **get_TEMPLATE_slots(ir_node *node) {
- TEMPLATE_attr_t *attr = get_TEMPLATE_attr(node);
- return attr->slots;
-}
-
-/**
- * Returns the result register slots of an TEMPLATE node.
- */
-const arch_register_t * const *get_TEMPLATE_slots_const(const ir_node *node) {
- const TEMPLATE_attr_t *attr = get_TEMPLATE_attr_const(node);
- return attr->slots;
-}
-
-/**
- * Returns the name of the OUT register at position pos.
- */
-const char *get_TEMPLATE_out_reg_name(const ir_node *node, int pos) {
- const TEMPLATE_attr_t *attr = get_TEMPLATE_attr_const(node);
-
- assert(is_TEMPLATE_irn(node) && "Not an TEMPLATE node.");
- assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return arch_register_get_name(attr->slots[pos]);
-}
-
-/**
- * Returns the index of the OUT register at position pos within its register class.
- */
-int get_TEMPLATE_out_regnr(const ir_node *node, int pos) {
- const TEMPLATE_attr_t *attr = get_TEMPLATE_attr_const(node);
-
- assert(is_TEMPLATE_irn(node) && "Not an TEMPLATE node.");
- assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return arch_register_get_index(attr->slots[pos]);
-}
-
-/**
- * Returns the OUT register at position pos.
- */
-const arch_register_t *get_TEMPLATE_out_reg(const ir_node *node, int pos) {
- const TEMPLATE_attr_t *attr = get_TEMPLATE_attr_const(node);
-
- assert(is_TEMPLATE_irn(node) && "Not an TEMPLATE node.");
- assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return attr->slots[pos];
-}
-
-/**
- * Returns the number of results.
- */
-int get_TEMPLATE_n_res(const ir_node *node) {
- const TEMPLATE_attr_t *attr = get_TEMPLATE_attr_const(node);
- return ARR_LEN(attr->slots);
-}
-
/**
* Initializes the nodes attributes.
*/
ir_graph *irg = get_irn_irg(node);
struct obstack *obst = get_irg_obstack(irg);
TEMPLATE_attr_t *attr = get_TEMPLATE_attr(node);
+ backend_info_t *info;
(void) execution_units;
- attr->flags = flags;
+ arch_irn_set_flags(node, flags);
attr->out_req = out_reqs;
attr->in_req = in_reqs;
- attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
- memset(attr->slots, 0, n_res * sizeof(attr->slots[0]));
+ info = be_get_info(node);
+ info->out_infos = NEW_ARR_D(reg_out_info_t, obst, n_res);
+ memset(info->out_infos, 0, n_res * sizeof(info->out_infos[0]));
}
/***************************************************************************************
const TEMPLATE_attr_t *attr_a = get_TEMPLATE_attr_const(a);
const TEMPLATE_attr_t *attr_b = get_TEMPLATE_attr_const(b);
- if(attr_a->flags != attr_b->flags)
- return 1;
-
return 0;
}
*/
void set_TEMPLATE_req_in(ir_node *node, const arch_register_req_t *req, int pos);
-/**
- * Returns the register flag of an TEMPLATE node.
- */
-arch_irn_flags_t get_TEMPLATE_flags(const ir_node *node);
-
-/**
- * Sets the register flag of an TEMPLATE node.
- */
-void set_TEMPLATE_flags(ir_node *node, arch_irn_flags_t flags);
-
-/**
- * Returns the result register slots of an TEMPLATE node.
- */
-const arch_register_t **get_TEMPLATE_slots(ir_node *node);
-
-const arch_register_t * const *get_TEMPLATE_slots_const(const ir_node *node);
-
-/**
- * Returns the name of the OUT register at position pos.
- */
-const char *get_TEMPLATE_out_reg_name(const ir_node *node, int pos);
-
-/**
- * Returns the index of the OUT register at position pos within its register class.
- */
-int get_TEMPLATE_out_regnr(const ir_node *node, int pos);
-
-/**
- * Returns the OUT register at position pos.
- */
-const arch_register_t *get_TEMPLATE_out_reg(const ir_node *node, int pos);
-
-/**
- * Returns the number of results.
- */
-int get_TEMPLATE_n_res(const ir_node *node);
-
-
/* Include the generated headers */
#include "gen_TEMPLATE_new_nodes.h"
struct TEMPLATE_attr_t
{
- arch_irn_flags_t flags; /**< indicating if spillable, rematerializeable ... etc. */
-
const arch_register_req_t **in_req; /**< register requirements for arguments */
const arch_register_req_t **out_req; /**< register requirements for results */
-
- const arch_register_t **slots; /**< register slots for assigned registers */
};
#endif
if (get_irn_mode(node) != mode_T) {
reg = arch_get_irn_register(node);
} else if (is_arm_irn(node)) {
- reg = get_arm_out_reg(node, pos);
+ reg = arch_irn_get_register(node, pos);
} else {
const ir_edge_t *edge;
static void dump_reg_req(FILE *F, const ir_node *node,
const arch_register_req_t **reqs, int inout) {
char *dir = inout ? "out" : "in";
- int max = inout ? get_arm_n_res(node) : get_irn_arity(node);
+ int max = inout ? (int) arch_irn_get_n_outs(node) : get_irn_arity(node);
char buf[1024];
int i;
*/
static int arm_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
ir_mode *mode = NULL;
- int bad = 0;
- int i;
+ int bad = 0;
+ int i, n_res, flags;
arm_attr_t *attr = get_arm_attr(n);
const arch_register_req_t **reqs;
- const arch_register_t **slots;
arm_shift_modifier mod;
switch (reason) {
dump_reg_req(F, n, reqs, 0);
}
- /* dump OUT requirements */
- if (ARR_LEN(attr->slots) > 0) {
+ n_res = arch_irn_get_n_outs(n);
+ if (n_res > 0) {
+ /* dump OUT requirements */
reqs = get_arm_out_req_all(n);
dump_reg_req(F, n, reqs, 1);
- }
- /* dump assigned registers */
- slots = get_arm_slots(n);
- if (slots && ARR_LEN(attr->slots) > 0) {
- for (i = 0; i < ARR_LEN(attr->slots); i++) {
- if (slots[i]) {
- fprintf(F, "reg #%d = %s\n", i, slots[i]->name);
- }
- else {
- fprintf(F, "reg #%d = n/a\n", i);
- }
+ /* dump assigned registers */
+ for (i = 0; i < n_res; i++) {
+ const arch_register_t *reg = arch_irn_get_register(n, i);
+
+ fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
}
+ fprintf(F, "\n");
}
fprintf(F, "\n");
/* dump n_res */
- fprintf(F, "n_res = %d\n", get_arm_n_res(n));
+ fprintf(F, "n_res = %d\n", n_res);
/* dump flags */
fprintf(F, "flags =");
- if (attr->flags == arch_irn_flags_none) {
+ flags = arch_irn_get_flags(n);
+ if (flags == arch_irn_flags_none) {
fprintf(F, " none");
}
else {
- if (attr->flags & arch_irn_flags_dont_spill) {
+ if (flags & arch_irn_flags_dont_spill) {
fprintf(F, " unspillable");
}
- if (attr->flags & arch_irn_flags_rematerializable) {
+ if (flags & arch_irn_flags_rematerializable) {
fprintf(F, " remat");
}
+ if (flags & arch_irn_flags_modify_flags) {
+ fprintf(F, " modify_flags");
+ }
}
- fprintf(F, " (%d)\n", attr->flags);
+ fprintf(F, " (%d)\n", flags);
if (is_arm_CopyB(n)) {
fprintf(F, "size = %lu\n", get_arm_imm_value(n));
attr->in_req[pos] = req;
}
-/**
- * Returns the register flag of an arm node.
- */
-arch_irn_flags_t get_arm_flags(const ir_node *node) {
- const arm_attr_t *attr = get_arm_attr_const(node);
- return attr->flags;
-}
-
-/**
- * Sets the register flag of an arm node.
- */
-void set_arm_flags(ir_node *node, arch_irn_flags_t flags) {
- arm_attr_t *attr = get_arm_attr(node);
- attr->flags = flags;
-}
-
-/**
- * Returns the result register slots of an arm node.
- */
-const arch_register_t **get_arm_slots(const ir_node *node) {
- const arm_attr_t *attr = get_arm_attr_const(node);
- return attr->slots;
-}
-
-/**
- * Returns the name of the OUT register at position pos.
- */
-const char *get_arm_out_reg_name(const ir_node *node, int pos) {
- const arm_attr_t *attr = get_arm_attr_const(node);
-
- assert(is_arm_irn(node) && "Not an arm node.");
- assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return arch_register_get_name(attr->slots[pos]);
-}
-
-/**
- * Returns the index of the OUT register at position pos within its register class.
- */
-int get_arm_out_regnr(const ir_node *node, int pos) {
- const arm_attr_t *attr = get_arm_attr_const(node);
-
- assert(is_arm_irn(node) && "Not an arm node.");
- assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return arch_register_get_index(attr->slots[pos]);
-}
-
-/**
- * Returns the OUT register at position pos.
- */
-const arch_register_t *get_arm_out_reg(const ir_node *node, int pos) {
- const arm_attr_t *attr = get_arm_attr_const(node);
-
- assert(is_arm_irn(node) && "Not an arm node.");
- assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return attr->slots[pos];
-}
-
-/**
- * Sets the flags for the n'th out.
- */
-void set_arm_out_flags(ir_node *node, arch_irn_flags_t flags, int pos) {
- arm_attr_t *attr = get_arm_attr(node);
- assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
- attr->out_flags[pos] = flags;
-}
-
-/**
- * Gets the flags for the n'th out.
- */
-arch_irn_flags_t get_arm_out_flags(const ir_node *node, int pos) {
- const arm_attr_t *attr = get_arm_attr_const(node);
- assert(pos < ARR_LEN(attr->out_flags) && "Invalid OUT position.");
- return attr->out_flags[pos];
-}
-
-/**
- * Returns the number of results.
- */
-int get_arm_n_res(const ir_node *node) {
- const arm_attr_t *attr = get_arm_attr_const(node);
- return ARR_LEN(attr->slots);
-}
-
/**
* Returns the immediate value
*/
ir_graph *irg = get_irn_irg(node);
struct obstack *obst = get_irg_obstack(irg);
arm_attr_t *attr = get_arm_attr(node);
+ backend_info_t *info;
(void) execution_units;
+ arch_irn_set_flags(node, flags);
attr->in_req = in_reqs;
attr->out_req = out_reqs;
- attr->flags = flags;
attr->instr_fl = (ARM_COND_AL << 3) | ARM_SHF_NONE;
attr->imm_value = 0;
- attr->out_flags = NEW_ARR_D(int, obst, n_res);
- memset(attr->out_flags, 0, n_res * sizeof(attr->out_flags[0]));
-
- attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
- memset(attr->slots, 0, n_res * sizeof(attr->slots[0]));
+ info = be_get_info(node);
+ info->out_infos = NEW_ARR_D(reg_out_info_t, obst, n_res);
+ memset(info->out_infos, 0, n_res * sizeof(info->out_infos[0]));
}
/************************************************
struct obstack *obst = get_irg_obstack(irg);
const arm_attr_t *attr_old = get_arm_attr_const(old_node);
arm_attr_t *attr_new = get_arm_attr(new_node);
+ backend_info_t *old_info = be_get_info(old_node);
+ backend_info_t *new_info = be_get_info(new_node);
/* copy the attributes */
memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
/* copy out flags */
- attr_new->out_flags =
- DUP_ARR_D(int, obst, attr_old->out_flags);
- /* copy register assignments */
- attr_new->slots =
- DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
+ new_info->out_infos =
+ DUP_ARR_D(reg_out_info_t, obst, old_info->out_infos);
}
*/
void set_arm_req_in(ir_node *node, const arch_register_req_t *req, int pos);
-/**
- * Returns the register flag of an arm node.
- */
-arch_irn_flags_t get_arm_flags(const ir_node *node);
-
-/**
- * Sets the register flag of an arm node.
- */
-void set_arm_flags(ir_node *node, arch_irn_flags_t flags);
-
-/**
- * Returns the result register slots of an arm node.
- */
-const arch_register_t **get_arm_slots(const ir_node *node);
-
-/**
- * Returns the name of the OUT register at position pos.
- */
-const char *get_arm_out_reg_name(const ir_node *node, int pos);
-
-/**
- * Returns the index of the OUT register at position pos within its register class.
- */
-int get_arm_out_regnr(const ir_node *node, int pos);
-
-/**
- * Returns the OUT register at position pos.
- */
-const arch_register_t *get_arm_out_reg(const ir_node *node, int pos);
-
-/**
- * Returns the number of results.
- */
-int get_arm_n_res(const ir_node *node);
-
-/**
- * Sets the flags for the n'th out.
- */
-void set_arm_out_flags(ir_node *node, arch_irn_flags_t flags, int pos);
-
-/**
- * Gets the flags for the n'th out.
- */
-arch_irn_flags_t get_arm_out_flags(const ir_node *node, int pos);
-
/**
* Returns the immediate value
*/
/** Generic ARM node attributes. */
typedef struct _arm_attr_t {
except_attr exc; /**< the exception attribute. MUST be the first one. */
- arch_irn_flags_t flags; /**< indicating if spillable, rematerializeable ... etc. */
const arch_register_req_t **in_req; /**< register requirements for arguments */
const arch_register_req_t **out_req; /**< register requirements for results */
ir_mode *op_mode; /**< operation mode if different from node's mode */
unsigned instr_fl; /**< condition code, shift modifier */
long imm_value; /**< immediate */
- int *out_flags; /**< flags for each produced value */
-
- const arch_register_t **slots; /**< register slots for assigned registers */
} arm_attr_t;
/** Attributes for a SymConst */
return arch_no_register_req;
}
-static void mips_set_irn_reg(ir_node *irn, const arch_register_t *reg)
-{
- int pos = 0;
-
- if (is_Proj(irn)) {
-
- if (get_irn_mode(irn) == mode_X) {
- return;
- }
-
- pos = mips_translate_proj_pos(irn);
- irn = skip_Proj(irn);
- }
-
- if (is_mips_irn(irn)) {
- const arch_register_t **slots;
-
- slots = get_mips_slots(irn);
- slots[pos] = reg;
- } else {
- /* here we set the registers for the Phi nodes */
- mips_set_firm_reg(irn, reg, cur_reg_set);
- }
-}
-
static arch_irn_class_t mips_classify(const ir_node *irn)
{
irn = skip_Proj_const(irn);
// - setup first part of stackframe
sp = new_bd_mips_addu(NULL, block, sp,
mips_create_Immediate(initialstackframesize));
- mips_set_irn_reg(sp, &mips_gp_regs[REG_SP]);
+ arch_set_irn_register(sp, &mips_gp_regs[REG_SP]);
panic("FIXME Use IncSP or set register requirement with ignore");
/* TODO: where to get an edge with a0-a3
// save old framepointer
sp = new_bd_mips_addu(NULL, block, sp,
mips_create_Immediate(-initialstackframesize));
- mips_set_irn_reg(sp, &mips_gp_regs[REG_SP]);
+ arch_set_irn_register(sp, &mips_gp_regs[REG_SP]);
panic("FIXME Use IncSP or set register requirement with ignore");
reg = be_abi_reg_map_get(reg_map, &mips_gp_regs[REG_FP]);
// setup framepointer
fp = new_bd_mips_addu(NULL, block, sp,
mips_create_Immediate(-initialstackframesize));
- mips_set_irn_reg(fp, &mips_gp_regs[REG_FP]);
+ arch_set_irn_register(fp, &mips_gp_regs[REG_FP]);
panic("FIXME Use IncSP or set register requirement with ignore");
be_abi_reg_map_set(reg_map, &mips_gp_regs[REG_FP], fp);
// copy fp to sp
sp = new_bd_mips_or(NULL, block, fp, mips_create_zero());
- mips_set_irn_reg(sp, &mips_gp_regs[REG_SP]);
+ arch_set_irn_register(sp, &mips_gp_regs[REG_SP]);
panic("FIXME Use be_Copy or set register requirement with ignore");
// 1. restore fp
if (get_irn_mode(node) != mode_T) {
reg = arch_get_irn_register(node);
} else if (is_mips_irn(node)) {
- reg = get_mips_out_reg(node, pos);
+ reg = arch_irn_get_register(node, pos);
} else {
const ir_edge_t *edge;
{
const mips_attr_t *attr = get_mips_attr_const(n);
char *dir = inout ? "out" : "in";
- int max = inout ? ARR_LEN(attr->slots) : get_irn_arity(n);
+ int max = inout ? (int) arch_irn_get_n_outs(n) : get_irn_arity(n);
char buf[1024];
int i;
*/
static int mips_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
int bad = 0;
- int i;
- const mips_attr_t *attr = get_mips_attr_const(n);
+ int i, n_res, flags;
const arch_register_req_t **reqs;
- const arch_register_t **slots;
switch (reason) {
case dump_node_opcode_txt:
break;
case dump_node_info_txt:
- attr = get_mips_attr(n);
fprintf(F, "=== mips attr begin ===\n");
/* dump IN requirements */
dump_reg_req(F, n, reqs, 0);
}
- /* dump OUT requirements */
- if (ARR_LEN(attr->slots) > 0) {
+ n_res = arch_irn_get_n_outs(n);
+ if (n_res > 0) {
+ /* dump OUT requirements */
reqs = get_mips_out_req_all(n);
dump_reg_req(F, n, reqs, 1);
- }
- /* dump assigned registers */
- slots = get_mips_slots(n);
- if (slots && ARR_LEN(attr->slots) > 0) {
- for (i = 0; i < ARR_LEN(attr->slots); i++) {
- if (slots[i]) {
- fprintf(F, "reg #%d = %s\n", i, slots[i]->name);
- }
- else {
- fprintf(F, "reg #%d = n/a\n", i);
- }
+ /* dump assigned registers */
+ for (i = 0; i < n_res; i++) {
+ const arch_register_t *reg = arch_irn_get_register(n, i);
+
+ fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
}
+ fprintf(F, "\n");
}
- fprintf(F, "\n");
/* dump n_res */
- fprintf(F, "n_res = %d\n", ARR_LEN(attr->slots));
+ fprintf(F, "n_res = %d\n", n_res);
/* dump flags */
fprintf(F, "flags =");
- if (attr->flags == arch_irn_flags_none) {
+ flags = arch_irn_get_flags(n);
+ if (flags == arch_irn_flags_none) {
fprintf(F, " none");
}
else {
- if (attr->flags & arch_irn_flags_dont_spill) {
+ if (flags & arch_irn_flags_dont_spill) {
fprintf(F, " unspillable");
}
- if (attr->flags & arch_irn_flags_rematerializable) {
+ if (flags & arch_irn_flags_rematerializable) {
fprintf(F, " remat");
}
+ if (flags & arch_irn_flags_modify_flags) {
+ fprintf(F, " modify_flags");
+ }
}
- fprintf(F, " (%d)\n", attr->flags);
+ fprintf(F, " (%d)\n", flags);
fprintf(F, "=== mips attr end ===\n");
/* end of: case dump_node_info_txt */
attr->in_req[pos] = req;
}
-/**
- * Returns the register flag of an mips node.
- */
-arch_irn_flags_t get_mips_flags(const ir_node *node)
-{
- const mips_attr_t *attr = get_mips_attr_const(node);
- return attr->flags;
-}
-
-/**
- * Sets the register flag of an mips node.
- */
-void set_mips_flags(ir_node *node, arch_irn_flags_t flags)
-{
- mips_attr_t *attr = get_mips_attr(node);
- attr->flags = flags;
-}
-
-/**
- * Returns the result register slots of an mips node.
- */
-const arch_register_t **get_mips_slots(const ir_node *node)
-{
- const mips_attr_t *attr = get_mips_attr_const(node);
- return attr->slots;
-}
-
-/**
- * Returns the name of the OUT register at position pos.
- */
-const char *get_mips_out_reg_name(const ir_node *node, int pos)
-{
- const mips_attr_t *attr = get_mips_attr_const(node);
-
- assert(is_mips_irn(node) && "Not an mips node.");
- assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return arch_register_get_name(attr->slots[pos]);
-}
-
-/**
- * Returns the index of the OUT register at position pos within its register class.
- */
-int get_mips_out_regnr(const ir_node *node, int pos)
-{
- const mips_attr_t *attr = get_mips_attr_const(node);
-
- assert(is_mips_irn(node) && "Not an mips node.");
- assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return arch_register_get_index(attr->slots[pos]);
-}
-
-/**
- * Returns the OUT register at position pos.
- */
-const arch_register_t *get_mips_out_reg(const ir_node *node, int pos)
-{
- const mips_attr_t *attr = get_mips_attr_const(node);
-
- assert(is_mips_irn(node) && "Not an mips node.");
- assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return attr->slots[pos];
-}
-
/**
* Initializes the nodes attributes.
*/
ir_graph *irg = get_irn_irg(node);
struct obstack *obst = get_irg_obstack(irg);
mips_attr_t *attr = get_mips_attr(node);
+ backend_info_t *info;
(void) execution_units;
- attr->flags = flags;
+ arch_irn_set_flags(node, flags);
attr->out_req = out_reqs;
attr->in_req = in_reqs;
- attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
- memset(attr->slots, 0, n_res * sizeof(attr->slots[0]));
+ info = be_get_info(node);
+ info->out_infos = NEW_ARR_D(reg_out_info_t, obst, n_res);
+ memset(info->out_infos, 0, n_res * sizeof(info->out_infos[0]));
}
static void init_mips_immediate_attributes(ir_node *node,
const mips_attr_t *a = get_mips_attr_const(node_a);
const mips_attr_t *b = get_mips_attr_const(node_b);
- if(a->flags != b->flags)
- return 1;
- if(ARR_LEN(a->slots) != ARR_LEN(b->slots))
- return 1;
if(a->switch_default_pn != b->switch_default_pn)
return 1;
const mips_immediate_attr_t *a = get_mips_immediate_attr_const(node_a);
const mips_immediate_attr_t *b = get_mips_immediate_attr_const(node_b);
- if(a->attr.flags != b->attr.flags)
- return 1;
if(a->val != b->val)
return 1;
struct obstack *obst = get_irg_obstack(irg);
const mips_attr_t *attr_old = get_mips_attr_const(old_node);
mips_attr_t *attr_new = get_mips_attr(new_node);
+ backend_info_t *old_info = be_get_info(old_node);
+ backend_info_t *new_info = be_get_info(new_node);
/* copy the attributes */
memcpy(attr_new, attr_old, get_op_attr_size(get_irn_op(old_node)));
- /* copy register assignments */
- attr_new->slots = DUP_ARR_D(arch_register_t*, obst, attr_old->slots);
+ /* copy out flags */
+ new_info->out_infos =
+ DUP_ARR_D(reg_out_info_t, obst, old_info->out_infos);
}
/***************************************************************************************
*/
void set_mips_req_in(ir_node *node, const arch_register_req_t *req, int pos);
-/**
- * Returns the register flag of an mips node.
- */
-arch_irn_flags_t get_mips_flags(const ir_node *node);
-
-/**
- * Sets the register flag of an mips node.
- */
-void set_mips_flags(ir_node *node, arch_irn_flags_t flags);
-
-/**
- * Returns the result register slots of an mips node.
- */
-const arch_register_t **get_mips_slots(const ir_node *node);
-
-/**
- * Returns the name of the OUT register at position pos.
- */
-const char *get_mips_out_reg_name(const ir_node *node, int pos);
-
-/**
- * Returns the index of the OUT register at position pos within its register class.
- */
-int get_mips_out_regnr(const ir_node *node, int pos);
-
-/**
- * Returns the OUT register at position pos.
- */
-const arch_register_t *get_mips_out_reg(const ir_node *node, int pos);
-
/* Include the generated headers */
#include "gen_mips_new_nodes.h"
typedef struct mips_attr_t {
except_attr exc; /**< the exception attribute. MUST be the first one. */
- arch_irn_flags_t flags; /**< indicating if spillable, rematerializeable ... etc. */
int switch_default_pn; /**< proj number of default case in switch */
const arch_register_req_t **in_req; /**< register requirements for arguments */
const arch_register_req_t **out_req; /**< register requirements for results */
-
- const arch_register_t **slots; /**< register slots for assigned registers */
} mips_attr_t;
typedef enum mips_immediate_type_t {
{
ir_graph *irg = current_ir_graph;
ir_node *block = get_irg_start_block(irg);
- const arch_register_t **slots;
ir_node *res;
assert(val >= -32768 && val <= 32767);
res = new_bd_mips_Immediate(NULL, block, MIPS_IMM_CONST, NULL, val);
- slots = get_mips_slots(res);
- slots[0] = &mips_gp_regs[REG_GP_NOREG];
+ arch_set_irn_register(res, &mips_gp_regs[REG_GP_NOREG]);
return res;
}
ir_graph *irg = current_ir_graph;
ir_node *block = get_irg_start_block(irg);
ir_node *zero = new_bd_mips_zero(NULL, block);
- const arch_register_t **slots = get_mips_slots(zero);
- slots[0] = &mips_gp_regs[REG_ZERO];
+ arch_set_irn_register(zero, &mips_gp_regs[REG_GP_NOREG]);
return zero;
}
dbg_info *dbgi = get_irn_dbg_info(node);
ir_node *block = be_transform_node(get_nodes_block(node));
ir_entity *entity;
- const arch_register_t **slots;
ir_node *lui, *or_const, *or;
if(get_SymConst_kind(node) != symconst_addr_ent) {
or_const = new_bd_mips_Immediate(dbgi, block, MIPS_IMM_SYMCONST_LO, entity, 0);
or = new_bd_mips_or(dbgi, block, lui, or_const);
- slots = get_mips_slots(or_const);
- slots[0] = &mips_gp_regs[REG_GP_NOREG];
+ arch_set_irn_register(or_const, &mips_gp_regs[REG_GP_NOREG]);
return or;
}
if (get_irn_mode(irn) != mode_T) {
reg = arch_get_irn_register(irn);
} else if (is_ppc32_irn(irn)) {
- reg = get_ppc32_out_reg(irn, pos);
+ reg = arch_irn_get_register(irn, pos);
} else {
const ir_edge_t *edge;
/**
* @file
- * @brief This file implements the creation of the achitecture specific firm
- * opcodes and the coresponding node constructors for the ppc assembler
+ * @brief This file implements the creation of the architecture specific firm
+ * opcodes and the corresponding node constructors for the ppc assembler
* irg.
* @author Moritz Kroll, Jens Mueller
* @version $Id$
*/
static void dump_reg_req(FILE *F, ir_node *n, const arch_register_req_t **reqs, int inout) {
char *dir = inout ? "out" : "in";
- int max = inout ? get_ppc32_n_res(n) : get_irn_arity(n);
+ int max = inout ? (int) arch_irn_get_n_outs(n) : get_irn_arity(n);
char buf[1024];
int i;
static int ppc32_dump_node(ir_node *n, FILE *F, dump_reason_t reason) {
ir_mode *mode = NULL;
int bad = 0;
- int i;
- ppc32_attr_t *attr;
+ int i, n_res, flags;
const arch_register_req_t **reqs;
- const arch_register_t **slots;
switch (reason) {
case dump_node_opcode_txt:
break;
case dump_node_info_txt:
- attr = get_ppc32_attr(n);
fprintf(F, "=== ppc attr begin ===\n");
/* dump IN requirements */
dump_reg_req(F, n, reqs, 0);
}
- /* dump OUT requirements */
- if (ARR_LEN(attr->slots) > 0) {
+ n_res = arch_irn_get_n_outs(n);
+ if (n_res > 0) {
+ /* dump OUT requirements */
reqs = get_ppc32_out_req_all(n);
dump_reg_req(F, n, reqs, 1);
- }
- /* dump assigned registers */
- slots = get_ppc32_slots(n);
- if (slots && ARR_LEN(attr->slots) > 0) {
- for (i = 0; i < ARR_LEN(attr->slots); i++) {
- if (slots[i]) {
- fprintf(F, "reg #%d = %s\n", i, slots[i]->name);
- }
- else {
- fprintf(F, "reg #%d = n/a\n", i);
- }
+ /* dump assigned registers */
+ for (i = 0; i < n_res; i++) {
+ const arch_register_t *reg = arch_irn_get_register(n, i);
+
+ fprintf(F, "reg #%d = %s\n", i, reg ? arch_register_get_name(reg) : "n/a");
}
+ fprintf(F, "\n");
}
- fprintf(F, "\n");
/* dump n_res */
- fprintf(F, "n_res = %d\n", get_ppc32_n_res(n));
+ fprintf(F, "n_res = %d\n", n_res);
/* dump flags */
fprintf(F, "flags =");
- if (attr->flags == arch_irn_flags_none) {
+ flags = arch_irn_get_flags(n);
+ if (flags == arch_irn_flags_none) {
fprintf(F, " none");
}
else {
- if (attr->flags & arch_irn_flags_dont_spill) {
+ if (flags & arch_irn_flags_dont_spill) {
fprintf(F, " unspillable");
}
- if (attr->flags & arch_irn_flags_rematerializable) {
+ if (flags & arch_irn_flags_rematerializable) {
fprintf(F, " remat");
}
+ if (flags & arch_irn_flags_modify_flags) {
+ fprintf(F, " modify_flags");
+ }
}
- fprintf(F, " (%d)\n", attr->flags);
+ fprintf(F, " (%d)\n", flags);
/* TODO: dump all additional attributes */
attr->in_req[pos] = req;
}
-/**
- * Returns the register flag of an ppc node.
- */
-arch_irn_flags_t get_ppc32_flags(const ir_node *node) {
- const ppc32_attr_t *attr = get_ppc32_attr_const(node);
- return attr->flags;
-}
-
-/**
- * Sets the register flag of an ppc node.
- */
-void set_ppc32_flags(ir_node *node, arch_irn_flags_t flags) {
- ppc32_attr_t *attr = get_ppc32_attr(node);
- attr->flags = flags;
-}
-
-/**
- * Returns the result register slots of an ppc node.
- */
-const arch_register_t **get_ppc32_slots(const ir_node *node) {
- const ppc32_attr_t *attr = get_ppc32_attr_const(node);
- return attr->slots;
-}
-
-/**
- * Returns the name of the OUT register at position pos.
- */
-const char *get_ppc32_out_reg_name(const ir_node *node, int pos) {
- const ppc32_attr_t *attr = get_ppc32_attr_const(node);
-
- assert(is_ppc32_irn(node) && "Not an ppc node.");
- assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return arch_register_get_name(attr->slots[pos]);
-}
-
-/**
- * Returns the index of the OUT register at position pos within its register class.
- */
-int get_ppc32_out_regnr(const ir_node *node, int pos) {
- const ppc32_attr_t *attr = get_ppc32_attr_const(node);
-
- assert(is_ppc32_irn(node) && "Not an ppc node.");
- assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return arch_register_get_index(attr->slots[pos]);
-}
-
-/**
- * Returns the OUT register at position pos.
- */
-const arch_register_t *get_ppc32_out_reg(const ir_node *node, int pos) {
- const ppc32_attr_t *attr = get_ppc32_attr_const(node);
-
- assert(is_ppc32_irn(node) && "Not an ppc node.");
- assert(pos < ARR_LEN(attr->slots) && "Invalid OUT position.");
- assert(attr->slots[pos] && "No register assigned");
-
- return attr->slots[pos];
-}
-
-/**
- * Returns the number of results.
- */
-int get_ppc32_n_res(const ir_node *node) {
- const ppc32_attr_t *attr = get_ppc32_attr_const(node);
- return ARR_LEN(attr->slots);
-}
-
/**
* Sets the type of the constant (if any)
* May be either iro_Const or iro_SymConst
ir_graph *irg = get_irn_irg(node);
struct obstack *obst = get_irg_obstack(irg);
ppc32_attr_t *attr = get_ppc32_attr(node);
+ backend_info_t *info;
(void) execution_units;
- attr->flags = flags;
+ arch_irn_set_flags(node, flags);
attr->in_req = in_reqs;
attr->out_req = out_reqs;
attr->offset_mode = ppc32_ao_Illegal;
attr->data.empty = NULL;
- attr->slots = NEW_ARR_D(const arch_register_t*, obst, n_res);
- memset(attr->slots, 0, n_res * sizeof(attr->slots[0]));
+ info = be_get_info(node);
+ info->out_infos = NEW_ARR_D(reg_out_info_t, obst, n_res);
+ memset(info->out_infos, 0, n_res * sizeof(info->out_infos[0]));
}
*/
void set_ppc32_req_in(ir_node *node, const arch_register_req_t *req, int pos);
-/**
- * Returns the register flag of an ppc node.
- */
-arch_irn_flags_t get_ppc32_flags(const ir_node *node);
-
-/**
- * Sets the register flag of an ppc node.
- */
-void set_ppc32_flags(ir_node *node, arch_irn_flags_t flags);
-
-/**
- * Returns the result register slots of an ppc node.
- */
-const arch_register_t **get_ppc32_slots(const ir_node *node);
-
-/**
- * Returns the name of the OUT register at position pos.
- */
-const char *get_ppc32_out_reg_name(const ir_node *node, int pos);
-
-/**
- * Returns the index of the OUT register at position pos within its register class.
- */
-int get_ppc32_out_regnr(const ir_node *node, int pos);
-
-/**
- * Returns the OUT register at position pos.
- */
-const arch_register_t *get_ppc32_out_reg(const ir_node *node, int pos);
-
-/**
- * Returns the number of results.
- */
-int get_ppc32_n_res(const ir_node *node);
-
ppc32_attr_content_type get_ppc32_type(const ir_node *node);
void set_ppc32_constant_tarval(ir_node *node, tarval *const_tarval);
typedef struct _ppc32_attr_t {
except_attr exc; /**< the exception attribute. MUST be the first one. */
- arch_irn_flags_t flags; /**< indicating if spillable, rematerializeable ... etc. */
const arch_register_req_t **in_req; /**< register requirements for arguments */
const arch_register_req_t **out_req; /**< register requirements for results */
void* empty;
} data;
- const arch_register_t **slots; /**< register slots for assigned registers */
} ppc32_attr_t;
#endif
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