set the used_x87 flag when a virtual x87 instruction is emitted

diff --git a/ir/be/ia32/ia32_transform.c b/ir/be/ia32/ia32_transform.c
index 9c22a5b..26d41d5 100644 (file)
--- a/ir/be/ia32/ia32_transform.c
+++ b/ir/be/ia32/ia32_transform.c
@@ -449,6 +449,7 @@ static ir_node *gen_Add(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
                if (USE_SSE2(env->cg))
                        return gen_binop(env, op1, op2, new_rd_ia32_fAdd);
                else {
+                       env->cg->used_x87 = 1;
                        return gen_binop(env, op1, op2, new_rd_ia32_vfadd);
                }
        }
@@ -532,8 +533,10 @@ static ir_node *gen_Mul(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
        if (mode_is_float(env->mode)) {
                if (USE_SSE2(env->cg))
                        new_op = gen_binop(env, op1, op2, new_rd_ia32_fMul);
-               else
+               else {
+                       env->cg->used_x87 = 1;
                        new_op = gen_binop(env, op1, op2, new_rd_ia32_vfmul);
+               }
        }
        else {
                new_op = gen_binop(env, op1, op2, new_rd_ia32_Mul);
@@ -642,7 +645,12 @@ static ir_node *gen_Max(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
        ir_node *new_op;
 
        if (mode_is_float(env->mode)) {
-               new_op = gen_binop(env, op1, op2, new_rd_ia32_fMax);
+               if (USE_SSE2(env->cg))
+                       new_op = gen_binop(env, op1, op2, new_rd_ia32_fMax);
+               else {
+                       env->cg->used_x87 = 1;
+                       assert(0);
+               }
        }
        else {
                new_op = new_rd_ia32_Max(env->dbg, env->irg, env->block, op1, op2, env->mode);
@@ -667,7 +675,12 @@ static ir_node *gen_Min(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
        ir_node *new_op;
 
        if (mode_is_float(env->mode)) {
-               new_op = gen_binop(env, op1, op2, new_rd_ia32_fMin);
+               if (USE_SSE2(env->cg))
+                       new_op = gen_binop(env, op1, op2, new_rd_ia32_fMin);
+               else {
+                       env->cg->used_x87 = 1;
+                       assert(0);
+               }
        }
        else {
                new_op = new_rd_ia32_Min(env->dbg, env->irg, env->block, op1, op2, env->mode);
@@ -754,8 +767,10 @@ static ir_node *gen_Sub(ia32_transform_env_t *env, ir_node *op1, ir_node *op2) {
        if (mode_is_float(mode)) {
                if (USE_SSE2(env->cg))
                        return gen_binop(env, op1, op2, new_rd_ia32_fSub);
-               else
+               else {
+                       env->cg->used_x87 = 1;
                        return gen_binop(env, op1, op2, new_rd_ia32_vfsub);
+               }
        }
        else {
                /* integer SUB */
@@ -1118,6 +1133,7 @@ static ir_node *gen_Minus(ia32_transform_env_t *env, ir_node *op) {
                        new_op = new_rd_Proj(env->dbg, env->irg, env->block, new_op, env->mode, 0);
                }
                else {
+                       env->cg->used_x87 = 1;
                        new_op = new_rd_ia32_vfchs(env->dbg, env->irg, env->block, op, env->mode);
                        SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(env));
                }
@@ -1181,6 +1197,7 @@ static ir_node *gen_Abs(ia32_transform_env_t *env, ir_node *op) {
                        res = new_rd_Proj(dbg, irg, block, res, mode, 0);
                }
                else {
+                       env->cg->used_x87 = 1;
                        res = new_rd_ia32_vfabs(dbg, irg, block, op, mode);
                        SET_IA32_ORIG_NODE(res, ia32_get_old_node_name(env));
                }
@@ -1238,8 +1255,10 @@ static ir_node *gen_Load(ia32_transform_env_t *env) {
        if (mode_is_float(mode)) {
                if (USE_SSE2(env->cg))
                        new_op = new_rd_ia32_fLoad(env->dbg, env->irg, env->block, ptr, noreg, get_Load_mem(node), env->mode);
-               else
+               else {
+                       env->cg->used_x87 = 1;
                        new_op = new_rd_ia32_vfld(env->dbg, env->irg, env->block, ptr, noreg, get_Load_mem(node), env->mode);
+               }
        }
        else {
                new_op = new_rd_ia32_Load(env->dbg, env->irg, env->block, ptr, noreg, get_Load_mem(node), env->mode);
@@ -1309,8 +1328,10 @@ static ir_node *gen_Store(ia32_transform_env_t *env) {
        if (mode_is_float(mode)) {
                if (USE_SSE2(env->cg))
                        new_op = new_rd_ia32_fStore(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, mode_T);
-               else
+               else {
+                       env->cg->used_x87 = 1;
                        new_op = new_rd_ia32_vfst(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, mode_T);
+               }
        }
        else if (get_mode_size_bits(mode) == 8) {
                new_op = new_rd_ia32_Store8Bit(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, mode_T);
@@ -1406,7 +1427,12 @@ static ir_node *gen_Cond(ia32_transform_env_t *env) {
                        }
 
                        if (mode_is_float(get_irn_mode(expr))) {
-                               res = new_rd_ia32_fCondJmp(dbg, irg, block, noreg, noreg, expr, noreg, nomem, mode_T);
+                               if (USE_SSE2(env->cg))
+                                       res = new_rd_ia32_fCondJmp(dbg, irg, block, noreg, noreg, expr, noreg, nomem, mode_T);
+                               else {
+                                       env->cg->used_x87 = 1;
+                                       assert(0);
+                               }
                        }
                        else {
                                res = new_rd_ia32_CondJmp(dbg, irg, block, noreg, noreg, expr, noreg, nomem, mode_T);
@@ -1416,7 +1442,12 @@ static ir_node *gen_Cond(ia32_transform_env_t *env) {
                }
                else {
                        if (mode_is_float(get_irn_mode(cmp_a))) {
-                               res = new_rd_ia32_fCondJmp(dbg, irg, block, noreg, noreg, cmp_a, cmp_b, nomem, mode_T);
+                               if (USE_SSE2(env->cg))
+                                       res = new_rd_ia32_fCondJmp(dbg, irg, block, noreg, noreg, cmp_a, cmp_b, nomem, mode_T);
+                               else {
+                                       env->cg->used_x87 = 1;
+                                       assert(0);
+                               }
                        }
                        else {
                                res = new_rd_ia32_CondJmp(dbg, irg, block, noreg, noreg, cmp_a, cmp_b, nomem, mode_T);
@@ -1688,8 +1719,10 @@ static ir_node *gen_StackParam(ia32_transform_env_t *env) {
        if (mode_is_float(mode)) {
                if (USE_SSE2(env->cg))
                        new_op = new_rd_ia32_fLoad(env->dbg, env->irg, env->block, ptr, noreg, mem, mode_T);
-               else
+               else {
+                       env->cg->used_x87 = 1;
                        new_op = new_rd_ia32_vfld(env->dbg, env->irg, env->block, ptr, noreg, mem, mode_T);
+               }
        }
        else {
                new_op = new_rd_ia32_Load(env->dbg, env->irg, env->block, ptr, noreg, mem, mode_T);
@@ -1744,8 +1777,10 @@ static ir_node *gen_FrameLoad(ia32_transform_env_t *env) {
        if (mode_is_float(mode)) {
                if (USE_SSE2(env->cg))
                        new_op = new_rd_ia32_fLoad(env->dbg, env->irg, env->block, ptr, noreg, mem, mode_T);
-               else
+               else {
+                       env->cg->used_x87 = 1;
                        new_op = new_rd_ia32_vfld(env->dbg, env->irg, env->block, ptr, noreg, mem, mode_T);
+               }
        }
        else {
                new_op = new_rd_ia32_Load(env->dbg, env->irg, env->block, ptr, noreg, mem, mode_T);
@@ -1781,8 +1816,10 @@ static ir_node *gen_FrameStore(ia32_transform_env_t *env) {
        if (mode_is_float(mode)) {
                if (USE_SSE2(env->cg))
                        new_op = new_rd_ia32_fStore(env->dbg, env->irg, env->block, ptr, noreg, val, mem, mode_T);
-               else
+               else {
+                       env->cg->used_x87 = 1;
                        new_op = new_rd_ia32_vfst(env->dbg, env->irg, env->block, ptr, noreg, val, mem, mode_T);
+               }
        }
        else if (get_mode_size_bits(mode) == 8) {
                new_op = new_rd_ia32_Store8Bit(env->dbg, env->irg, env->block, ptr, noreg, val, mem, mode_T);