Remove the unused parameter const arch_env_t *env from arch_get_irn_register().

[r22697]

diff --git a/ir/be/TEMPLATE/TEMPLATE_emitter.c b/ir/be/TEMPLATE/TEMPLATE_emitter.c
index d463dde..d1b999b 100644 (file)
--- a/ir/be/TEMPLATE/TEMPLATE_emitter.c
+++ b/ir/be/TEMPLATE/TEMPLATE_emitter.c
@@ -48,8 +48,6 @@
 
 #define SNPRINTF_BUF_LEN 128
 
-static const arch_env_t *arch_env;
-
 /**
  * Returns the register at in position pos.
  */
@@ -64,7 +62,7 @@ static const arch_register_t *get_in_reg(const ir_node *node, int pos)
           in register we need. */
        op = get_irn_n(node, pos);
 
-       reg = arch_get_irn_register(arch_env, op);
+       reg = arch_get_irn_register(op);
 
        assert(reg && "no in register found");
        return reg;
@@ -84,7 +82,7 @@ static const arch_register_t *get_out_reg(const ir_node *node, int pos)
        /*           Proj with the corresponding projnum for the register */
 
        if (get_irn_mode(node) != mode_T) {
-               reg = arch_get_irn_register(arch_env, node);
+               reg = arch_get_irn_register(node);
        } else if (is_TEMPLATE_irn(node)) {
                reg = get_TEMPLATE_out_reg(node, pos);
        } else {
@@ -94,7 +92,7 @@ static const arch_register_t *get_out_reg(const ir_node *node, int pos)
                        proj = get_edge_src_irn(edge);
                        assert(is_Proj(proj) && "non-Proj from mode_T node");
                        if (get_Proj_proj(proj) == pos) {
-                               reg = arch_get_irn_register(arch_env, proj);
+                               reg = arch_get_irn_register(proj);
                                break;
                        }
                }
@@ -273,9 +271,9 @@ void TEMPLATE_gen_labels(ir_node *block, void *env) {
 /**
  * Main driver
  */
-void TEMPLATE_gen_routine(const TEMPLATE_code_gen_t *cg, ir_graph *irg) {
-
-       arch_env = cg->arch_env;
+void TEMPLATE_gen_routine(const TEMPLATE_code_gen_t *cg, ir_graph *irg)
+{
+       (void)cg;
 
        /* register all emitter functions */
        TEMPLATE_register_emitters();

diff --git a/ir/be/arm/arm_emitter.c b/ir/be/arm/arm_emitter.c
index 6077424..6dc2cb1 100644 (file)
--- a/ir/be/arm/arm_emitter.c
+++ b/ir/be/arm/arm_emitter.c
@@ -67,7 +67,6 @@
 
 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
 
-static const arch_env_t     *arch_env = NULL;
 static const arm_code_gen_t *cg;
 static const arm_isa_t      *isa;
 static set                  *sym_or_tv;
@@ -85,7 +84,7 @@ static const arch_register_t *get_in_reg(const ir_node *irn, int pos) {
           in register we need. */
        op = get_irn_n(irn, pos);
 
-       reg = arch_get_irn_register(arch_env, op);
+       reg = arch_get_irn_register(op);
 
        assert(reg && "no in register found");
 
@@ -120,7 +119,7 @@ static const arch_register_t *get_out_reg(const ir_node *node, int pos)
     /*           Proj with the corresponding projnum for the register */
 
     if (get_irn_mode(node) != mode_T) {
-        reg = arch_get_irn_register(arch_env, node);
+        reg = arch_get_irn_register(node);
     } else if (is_arm_irn(node)) {
         reg = get_arm_out_reg(node, pos);
     } else {
@@ -130,7 +129,7 @@ static const arch_register_t *get_out_reg(const ir_node *node, int pos)
             proj = get_edge_src_irn(edge);
             assert(is_Proj(proj) && "non-Proj from mode_T node");
             if (get_Proj_proj(proj) == pos) {
-                reg = arch_get_irn_register(arch_env, proj);
+                reg = arch_get_irn_register(proj);
                 break;
             }
         }
@@ -1204,7 +1203,6 @@ void arm_gen_routine(const arm_code_gen_t *arm_cg, ir_graph *irg) {
 
        cg        = arm_cg;
        isa       = (const arm_isa_t *)cg->arch_env;
-       arch_env  = cg->arch_env;
        sym_or_tv = new_set(cmp_sym_or_tv, 8);
 
        arm_register_emitters();

diff --git a/ir/be/arm/arm_optimize.c b/ir/be/arm/arm_optimize.c
index a26a0a0..19dc8f3 100644 (file)
--- a/ir/be/arm/arm_optimize.c
+++ b/ir/be/arm/arm_optimize.c
@@ -275,7 +275,7 @@ static void peephole_be_Reload(ir_node *node) {
                ptr = gen_ptr_sub(node, frame, &v);
        }
 
-       reg   = arch_get_irn_register(arch_env, node);
+       reg   = arch_get_irn_register(node);
        mem   = be_get_Reload_mem(node);
        mode  = get_irn_mode(node);
        irg   = current_ir_graph;

diff --git a/ir/be/beabi.c b/ir/be/beabi.c
index 58ecd1e..ad5d198 100644 (file)
--- a/ir/be/beabi.c
+++ b/ir/be/beabi.c
@@ -774,7 +774,7 @@ static ir_node *adjust_call(be_abi_irg_t *env, ir_node *irn, ir_node *curr_sp)
 
                for(i = 0; i < n_reg_results; ++i) {
                        ir_node *proj = res_projs[i];
-                       const arch_register_t *reg = arch_get_irn_register(arch_env, proj);
+                       const arch_register_t *reg = arch_get_irn_register(proj);
                        set_irn_link(proj, (void*) reg);
                        obstack_ptr_grow(obst, proj);
                }

diff --git a/ir/be/bearch.c b/ir/be/bearch.c
index 5971c5a..06361df 100644 (file)
--- a/ir/be/bearch.c
+++ b/ir/be/bearch.c
@@ -220,11 +220,9 @@ const arch_register_class_t *arch_get_irn_reg_class(const ir_node *irn, int pos)
        return req->cls;
 }
 
-extern const arch_register_t *
-arch_get_irn_register(const arch_env_t *env, const ir_node *irn)
+const arch_register_t *arch_get_irn_register(const ir_node *irn)
 {
        const arch_irn_ops_t *ops = get_irn_ops(irn);
-       (void)env; // TODO remove parameter
        return ops->get_irn_reg(irn);
 }
 

diff --git a/ir/be/bearch.h b/ir/be/bearch.h
index ff76fda..7ef5f3d 100644 (file)
--- a/ir/be/bearch.h
+++ b/ir/be/bearch.h
@@ -203,12 +203,10 @@ const arch_register_class_t *arch_get_irn_reg_class(const ir_node *irn, int pos)
 
 /**
  * Get the register allocated at a certain output operand of a node.
- * @param env The arch environment.
  * @param irn The node.
  * @return    The register allocated for this operand
  */
-extern const arch_register_t *
-arch_get_irn_register(const arch_env_t *env, const ir_node *irn);
+const arch_register_t *arch_get_irn_register(const ir_node *irn);
 
 /**
  * Set the register for a certain output operand.

diff --git a/ir/be/bechordal.c b/ir/be/bechordal.c
index 416b48d..76973da 100644 (file)
--- a/ir/be/bechordal.c
+++ b/ir/be/bechordal.c
@@ -229,12 +229,11 @@ static be_insn_t *chordal_scan_insn(be_chordal_env_t *env, ir_node *irn)
 
 static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn)
 {
-       const be_irg_t *birg   = env->birg;
-       const arch_env_t *aenv = birg->main_env->arch_env;
        bitset_t *tmp          = bitset_alloca(env->cls->n_regs);
        bitset_t *def_constr   = bitset_alloca(env->cls->n_regs);
        ir_node *bl            = get_nodes_block(irn);
-       be_lv_t *lv            = env->birg->lv;
+       const be_irg_t *birg   = env->birg;
+       be_lv_t *lv            = birg->lv;
 
        be_insn_t *insn;
        int i, j;
@@ -248,7 +247,7 @@ static ir_node *prepare_constr_insn(be_chordal_env_t *env, ir_node *irn)
                if (arch_get_irn_reg_class(irn, i) != env->cls)
                        continue;
 
-               reg = arch_get_irn_register(aenv, op);
+               reg = arch_get_irn_register(op);
 
                if (reg == NULL || !arch_register_type_is(reg, ignore))
                        continue;
@@ -692,7 +691,7 @@ static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env,
                /* Put the colors of all Projs in a bitset. */
                foreach_out_edge(perm, edge) {
                        ir_node *proj              = get_edge_src_irn(edge);
-                       const arch_register_t *reg = arch_get_irn_register(aenv, proj);
+                       const arch_register_t *reg = arch_get_irn_register(proj);
 
                        if(reg != NULL)
                                bitset_set(bs, reg->index);
@@ -701,7 +700,7 @@ static ir_node *handle_constraints(be_chordal_alloc_env_t *alloc_env,
                /* Assign the not yet assigned Projs of the Perm a suitable color. */
                foreach_out_edge(perm, edge) {
                        ir_node *proj              = get_edge_src_irn(edge);
-                       const arch_register_t *reg = arch_get_irn_register(aenv, proj);
+                       const arch_register_t *reg = arch_get_irn_register(proj);
 
                        DBG((dbg, LEVEL_2, "\tchecking reg of %+F: %s\n", proj, reg ? reg->name : "<none>"));
 
@@ -908,7 +907,7 @@ static void assign(ir_node *block, void *env_ptr)
        be_lv_foreach(lv, block, be_lv_state_in, idx) {
                irn = be_lv_get_irn(lv, block, idx);
                if(has_reg_class(env, irn)) {
-                       const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
+                       const arch_register_t *reg = arch_get_irn_register(irn);
                        int col;
 
                        assert(reg && "Node must have been assigned a register");
@@ -944,13 +943,13 @@ static void assign(ir_node *block, void *env_ptr)
                        int col = NO_COLOR;
 
                        if(ignore || pset_find_ptr(alloc_env->pre_colored, irn)) {
-                               reg = arch_get_irn_register(arch_env, irn);
+                               reg = arch_get_irn_register(irn);
                                col = reg->index;
                                assert(!bitset_is_set(colors, col) && "pre-colored register must be free");
                        } else {
                                col = get_next_free_reg(alloc_env, colors);
                                reg = arch_register_for_index(env->cls, col);
-                               assert(arch_get_irn_register(arch_env, irn) == NULL && "This node must not have been assigned a register yet");
+                               assert(arch_get_irn_register(irn) == NULL && "This node must not have been assigned a register yet");
                                assert(!arch_register_type_is(reg, ignore) && "Must not assign ignore register");
                        }
 
@@ -965,7 +964,7 @@ static void assign(ir_node *block, void *env_ptr)
 
                /* Clear the color upon a use. */
                else if(!b->is_def) {
-                       const arch_register_t *reg = arch_get_irn_register(arch_env, irn);
+                       const arch_register_t *reg = arch_get_irn_register(irn);
                        int col;
 
                        assert(reg && "Register must have been assigned");

diff --git a/ir/be/bechordal_draw.c b/ir/be/bechordal_draw.c
index 85fda63..e1093d6 100644 (file)
--- a/ir/be/bechordal_draw.c
+++ b/ir/be/bechordal_draw.c
@@ -274,7 +274,7 @@ static void block_dims_walker(ir_node *block, void *data)
 
        list_for_each_entry_reverse(border_t, b, head, list) {
                ir_node               *irn = b->irn;
-               const arch_register_t *reg = arch_get_irn_register(env->arch_env, irn);
+               const arch_register_t *reg = arch_get_irn_register(irn);
                int                   col  = arch_register_get_index(reg);
 
                dims->max_step  = MAX(dims->max_step, b->step);
@@ -397,7 +397,7 @@ static void draw_block(ir_node *bl, void *data)
 
        list_for_each_entry(border_t, b, head, list) {
                if (b->is_def) {
-                       const arch_register_t *reg = arch_get_irn_register(env->arch_env, b->irn);
+                       const arch_register_t *reg = arch_get_irn_register(b->irn);
                        int col      = arch_register_get_index(reg);
                        int live_out = be_is_live_out(lv, bl, b->irn);
                        int x        = (col + 1) * opts->h_inter_gap;
@@ -425,7 +425,7 @@ static void draw_block(ir_node *bl, void *data)
                be_lv_foreach(lv, bl, be_lv_state_in, idx) {
                        ir_node *irn = be_lv_get_irn(lv, bl, idx);
                        if (arch_irn_consider_in_reg_alloc(env->arch_env, env->cls, irn)) {
-                               const arch_register_t *reg = arch_get_irn_register(env->arch_env, irn);
+                               const arch_register_t *reg = arch_get_irn_register(irn);
                                int     col = arch_register_get_index(reg);
                                int     x   = (col + 1) * opts->h_inter_gap;
                                color_t color;

diff --git a/ir/be/becopyheur.c b/ir/be/becopyheur.c
index 91b2460..2d35156 100644 (file)
--- a/ir/be/becopyheur.c
+++ b/ir/be/becopyheur.c
@@ -177,7 +177,7 @@ static INLINE int qnode_get_new_color(const qnode_t *qn, ir_node *irn) {
        if (found)
                return found->new_color;
        else
-               return get_irn_col(qn->ou->co, irn);
+               return get_irn_col(irn);
 }
 
 /**
@@ -210,7 +210,7 @@ static INLINE void qnode_pin_local(const qnode_t *qn, ir_node *irn) {
        node_stat_t *found = qnode_find_or_insert_node(qn, irn);
        found->pinned_local = 1;
        if (found->new_color == NO_COLOR)
-               found->new_color = get_irn_col(qn->ou->co, irn);
+               found->new_color = get_irn_col(irn);
 }
 
 

diff --git a/ir/be/becopyheur2.c b/ir/be/becopyheur2.c
index fb40238..b15a540 100644 (file)
--- a/ir/be/becopyheur2.c
+++ b/ir/be/becopyheur2.c
@@ -204,7 +204,7 @@ static void *co2_irn_init(ir_phase *ph, const ir_node *irn, void *data)
        memset(ci, 0, size);
        INIT_LIST_HEAD(&ci->changed_list);
        ci->touched_next = env->touched;
-       ci->orig_col     = get_irn_col(env->co, irn);
+       ci->orig_col     = get_irn_col(irn);
        env->touched     = ci;
        ci->irn          = irn;
        ci->aff          = a;

diff --git a/ir/be/becopyheur4.c b/ir/be/becopyheur4.c
index 3c2a262..7fde5d1 100644 (file)
--- a/ir/be/becopyheur4.c
+++ b/ir/be/becopyheur4.c
@@ -371,7 +371,7 @@ static void *co_mst_irn_init(ir_phase *ph, const ir_node *irn, void *old) {
                res->tmp_col       = -1;
                res->int_neighs    = NULL;
                res->int_aff_neigh = 0;
-               res->col           = arch_register_get_index(arch_get_irn_register(env->aenv, irn));
+               res->col           = arch_register_get_index(arch_get_irn_register(irn));
                res->init_col      = res->col;
                INIT_LIST_HEAD(&res->list);
 

diff --git a/ir/be/becopyilp.c b/ir/be/becopyilp.c
index 3c22acc..3a6e4ed 100644 (file)
--- a/ir/be/becopyilp.c
+++ b/ir/be/becopyilp.c
@@ -176,7 +176,7 @@ void sr_reinsert(size_red_t *sr) {
 
                be_ifg_foreach_neighbour(ifg, iter, irn, other) {
                        if (!sr_is_removed(sr, other)) /* only inspect nodes which are in graph right now */
-                               bitset_set(used_cols, get_irn_col(sr->co, other));
+                               bitset_set(used_cols, get_irn_col(other));
                }
 
                /* now all bits not set are possible colors */

diff --git a/ir/be/becopyilp2.c b/ir/be/becopyilp2.c
index fbc878a..a3d29c6 100644 (file)
--- a/ir/be/becopyilp2.c
+++ b/ir/be/becopyilp2.c
@@ -87,7 +87,7 @@ static void build_coloring_cstr(ilp_env_t *ienv) {
                        bitset_pos_t col;
                        int cst_idx;
                        const arch_register_req_t *req;
-                       int curr_node_color = get_irn_col(ienv->co, irn);
+                       int curr_node_color = get_irn_col(irn);
                        int node_nr = (int)get_irn_idx(irn);
                        local_env_t *lenv = ienv->env;
 
@@ -190,12 +190,12 @@ static void build_affinity_cstr(ilp_env_t *ienv) {
 
                root = curr->nodes[0];
                root_nr = (int) get_irn_idx(root);
-               root_col = get_irn_col(ienv->co, root);
+               root_col = get_irn_col(root);
 
                for (i = 1; i < curr->node_count; ++i) {
                        arg = curr->nodes[i];
                        arg_nr = (int) get_irn_idx(arg);
-                       arg_col = get_irn_col(ienv->co, arg);
+                       arg_col = get_irn_col(arg);
 
                        /* add a new affinity variable */
                        y_idx = lpp_add_var(ienv->lp, name_cdd_sorted(buf, 'y', root_nr, arg_nr), lpp_binary, curr->costs[i]);

diff --git a/ir/be/becopyopt.c b/ir/be/becopyopt.c
index 5ea97b2..a3b1692 100644 (file)
--- a/ir/be/becopyopt.c
+++ b/ir/be/becopyopt.c
@@ -223,7 +223,7 @@ int co_is_optimizable_root(const copy_opt_t *co, ir_node *irn) {
        if (arch_irn_is(co->aenv, irn, ignore))
                return 0;
 
-       reg = arch_get_irn_register(co->aenv, irn);
+       reg = arch_get_irn_register(irn);
        if (arch_register_type_is(reg, ignore))
                return 0;
 
@@ -650,11 +650,11 @@ int co_get_copy_costs(const copy_opt_t *co) {
        ASSERT_OU_AVAIL(co);
 
        list_for_each_entry(unit_t, curr, &co->units, units) {
-               int root_col = get_irn_col(co, curr->nodes[0]);
+               int root_col = get_irn_col(curr->nodes[0]);
                DBG((dbg, LEVEL_1, "  %3d costs for root %+F color %d\n", curr->inevitable_costs, curr->nodes[0], root_col));
                res += curr->inevitable_costs;
                for (i=1; i<curr->node_count; ++i) {
-                       int arg_col = get_irn_col(co, curr->nodes[i]);
+                       int arg_col = get_irn_col(curr->nodes[i]);
                        if (root_col != arg_col) {
                                DBG((dbg, LEVEL_1, "  %3d for arg %+F color %d\n", curr->costs[i], curr->nodes[i], arg_col));
                                res += curr->costs[i];
@@ -692,7 +692,7 @@ void co_complete_stats(const copy_opt_t *co, co_complete_stats_t *stat)
                                stat->aff_edges += 1;
                                stat->max_costs += neigh->costs;
 
-                               if(get_irn_col(co, an->irn) != get_irn_col(co, neigh->irn)) {
+                               if (get_irn_col(an->irn) != get_irn_col(neigh->irn)) {
                                        stat->costs += neigh->costs;
                                        stat->unsatisfied_edges += 1;
                                }
@@ -774,7 +774,7 @@ static void build_graph_walker(ir_node *irn, void *env) {
        if (!is_curr_reg_class(co, irn) || arch_irn_is(co->aenv, irn, ignore))
                return;
 
-       reg = arch_get_irn_register(co->aenv, irn);
+       reg = arch_get_irn_register(irn);
        if (arch_register_type_is(reg, ignore))
                return;
 
@@ -999,7 +999,7 @@ static int ifg_is_dump_node(void *self, ir_node *irn)
 static void ifg_dump_node_attr(FILE *f, void *self, ir_node *irn)
 {
        co_ifg_dump_t *env         = self;
-       const arch_register_t *reg = arch_get_irn_register(env->co->aenv, irn);
+       const arch_register_t *reg = arch_get_irn_register(irn);
        const arch_register_req_t *req;
        int limited;
 
@@ -1032,12 +1032,12 @@ static void ifg_dump_at_end(FILE *file, void *self)
        affinity_node_t *a;
 
        co_gs_foreach_aff_node(env->co, a) {
-               const arch_register_t *ar = arch_get_irn_register(env->co->aenv, a->irn);
+               const arch_register_t *ar = arch_get_irn_register(a->irn);
                unsigned aidx = get_irn_idx(a->irn);
                neighb_t *n;
 
                co_gs_foreach_neighb(a, n) {
-                       const arch_register_t *nr = arch_get_irn_register(env->co->aenv, n->irn);
+                       const arch_register_t *nr = arch_get_irn_register(n->irn);
                        unsigned nidx = get_irn_idx(n->irn);
 
                        if(aidx < nidx) {

diff --git a/ir/be/becopyopt_t.h b/ir/be/becopyopt_t.h
index 6c5943f..5677a67 100644 (file)
--- a/ir/be/becopyopt_t.h
+++ b/ir/be/becopyopt_t.h
@@ -59,9 +59,9 @@ struct _copy_opt_t {
 #define ASSERT_OU_AVAIL(co)            assert((co)->units.next && "Representation as optimization-units not build")
 #define ASSERT_GS_AVAIL(co)            assert((co)->nodes && "Representation as graph not build")
 
-#define get_irn_col(co, irn)           arch_register_get_index(arch_get_irn_register((co)->aenv, irn))
-#define set_irn_col(co, irn, col)      arch_set_irn_register((co)->aenv, irn, arch_register_for_index((co)->cls, col))
-#define is_curr_reg_class(co, irn)     (arch_get_irn_reg_class(irn, -1) == (co)->cls)
+#define get_irn_col(irn)           arch_register_get_index(arch_get_irn_register(irn))
+#define set_irn_col(co, irn, col)  arch_set_irn_register((co)->aenv, irn, arch_register_for_index((co)->cls, col))
+#define is_curr_reg_class(co, irn) (arch_get_irn_reg_class(irn, -1) == (co)->cls)
 
 #define list_entry_units(lh) list_entry(lh, unit_t, units)
 

diff --git a/ir/be/becopystat.c b/ir/be/becopystat.c
index e2c408b..33f3fbf 100644 (file)
--- a/ir/be/becopystat.c
+++ b/ir/be/becopystat.c
@@ -451,7 +451,7 @@ static void save_load(ir_node *irn, void *env) {
        color_save_t *saver = env;
        if (saver->chordal_env->cls == arch_get_irn_reg_class(irn, -1)) {
                if (saver->flag == 0) { /* save */
-                       const arch_register_t *reg = arch_get_irn_register(saver->arch_env, irn);
+                       const arch_register_t *reg = arch_get_irn_register(irn);
                        pmap_insert(saver->saved_colors, irn, (void *) reg);
                } else { /*load */
                        arch_register_t *reg = pmap_get(saver->saved_colors, irn);

diff --git a/ir/be/beifg.c b/ir/be/beifg.c
index 1827de1..8c175eb 100644 (file)
--- a/ir/be/beifg.c
+++ b/ir/be/beifg.c
@@ -80,10 +80,10 @@ size_t (be_ifg_cliques_iter_size)(const be_ifg_t *ifg)
 
 static void *regs_irn_data_init(ir_phase *ph, const ir_node *irn, void *data)
 {
-       coloring_t *coloring = (coloring_t *) ph;
-       (void) data;
+       (void)ph;
+       (void)data;
 
-       return (void *) arch_get_irn_register(coloring->arch_env, irn);
+       return (void*)arch_get_irn_register(irn);
 }
 
 coloring_t *coloring_init(coloring_t *c, ir_graph *irg, const arch_env_t *aenv)

diff --git a/ir/be/beinsn.c b/ir/be/beinsn.c
index c91c6b0..477bed5 100644 (file)
--- a/ir/be/beinsn.c
+++ b/ir/be/beinsn.c
@@ -118,7 +118,7 @@ be_insn_t *be_scan_insn(const be_insn_env_t *env, ir_node *irn)
                                obstack_grow(obst, &o, sizeof(o));
                                insn->n_ops++;
                                insn->out_constraints |= o.has_constraints;
-                               pre_colored += arch_get_irn_register(arch_env, p) != NULL;
+                               pre_colored += arch_get_irn_register(p) != NULL;
                        }
                }
        } else if (arch_irn_consider_in_reg_alloc(arch_env, env->cls, irn)) {
@@ -132,7 +132,7 @@ be_insn_t *be_scan_insn(const be_insn_env_t *env, ir_node *irn)
                obstack_grow(obst, &o, sizeof(o));
                insn->n_ops++;
                insn->out_constraints |= o.has_constraints;
-               pre_colored += arch_get_irn_register(arch_env, irn) != NULL;
+               pre_colored += arch_get_irn_register(irn) != NULL;
        }
 
        if (pre_colored > 0) {

diff --git a/ir/be/beirgmod.c b/ir/be/beirgmod.c
index b2b0816..472d841 100644 (file)
--- a/ir/be/beirgmod.c
+++ b/ir/be/beirgmod.c
@@ -124,7 +124,7 @@ ir_node *insert_Perm_after(be_irg_t *birg,
        curr = perm;
        for (i = 0; i < n; ++i) {
                ir_node *perm_op = get_irn_n(perm, i);
-               const arch_register_t *reg = arch_get_irn_register(arch_env, perm_op);
+               const arch_register_t *reg = arch_get_irn_register(perm_op);
                be_ssa_construction_env_t senv;
 
                ir_mode *mode = get_irn_mode(perm_op);

diff --git a/ir/be/belower.c b/ir/be/belower.c
index 0ac9b74..1984fdf 100644 (file)
--- a/ir/be/belower.c
+++ b/ir/be/belower.c
@@ -314,7 +314,7 @@ static void lower_perm_node(ir_node *irn, void *walk_env) {
        n = get_irn_arity(irn);
        assert(n == get_irn_n_edges(irn) && "perm's in and out numbers different");
 
-       reg_class = arch_get_irn_register(arch_env, get_irn_n(irn, 0))->reg_class;
+       reg_class = arch_get_irn_register(get_irn_n(irn, 0))->reg_class;
        pairs     = alloca(n * sizeof(pairs[0]));
 
        /* build the list of register pairs (in, out) */
@@ -324,8 +324,8 @@ static void lower_perm_node(ir_node *irn, void *walk_env) {
                pn                = get_Proj_proj(pairs[i].out_node);
                pairs[i].in_node  = get_irn_n(irn, pn);
 
-               pairs[i].in_reg  = arch_get_irn_register(arch_env, pairs[i].in_node);
-               pairs[i].out_reg = arch_get_irn_register(arch_env, pairs[i].out_node);
+               pairs[i].in_reg  = arch_get_irn_register(pairs[i].in_node);
+               pairs[i].out_reg = arch_get_irn_register(pairs[i].out_node);
 
                pairs[i].checked = 0;
                i++;
@@ -974,7 +974,7 @@ found_front:
                sched_add_after(perm, node);
 
                /* give it the proj's register */
-               arch_set_irn_register(aenv, node, arch_get_irn_register(aenv, proj));
+               arch_set_irn_register(aenv, node, arch_get_irn_register(proj));
 
                /* reroute all users of the proj to the moved node. */
                edges_reroute(proj, node, irg);

diff --git a/ir/be/bepeephole.c b/ir/be/bepeephole.c
index 1afc7ed..25ec922 100644 (file)
--- a/ir/be/bepeephole.c
+++ b/ir/be/bepeephole.c
@@ -60,7 +60,7 @@ static void clear_reg_value(ir_node *node)
        if(!mode_is_data(get_irn_mode(node)))
                return;
 
-       reg     = arch_get_irn_register(arch_env, node);
+       reg     = arch_get_irn_register(node);
        if(reg == NULL) {
                panic("No register assigned at %+F", node);
        }
@@ -85,7 +85,7 @@ static void set_reg_value(ir_node *node)
        if(!mode_is_data(get_irn_mode(node)))
                return;
 
-       reg = arch_get_irn_register(arch_env, node);
+       reg = arch_get_irn_register(node);
        if(reg == NULL) {
                panic("No register assigned at %+F", node);
        }
@@ -157,11 +157,11 @@ void be_peephole_before_exchange(const ir_node *old_node, ir_node *new_node)
        if (!mode_is_data(get_irn_mode(old_node)))
                return;
 
-       reg = arch_get_irn_register(arch_env, old_node);
+       reg = arch_get_irn_register(old_node);
        if (reg == NULL) {
                panic("No register assigned at %+F", old_node);
        }
-       assert(reg == arch_get_irn_register(arch_env, new_node) &&
+       assert(reg == arch_get_irn_register(new_node) &&
              "KILLING a node and replacing by different register is not allowed");
 
        cls     = arch_register_get_class(reg);

diff --git a/ir/be/bessadestr.c b/ir/be/bessadestr.c
index da1dd16..58b4945 100644 (file)
--- a/ir/be/bessadestr.c
+++ b/ir/be/bessadestr.c
@@ -53,8 +53,8 @@
 DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
 
 #define get_chordal_arch(ce) ((ce)->birg->main_env->arch_env)
-#define get_reg(irn) arch_get_irn_register(get_chordal_arch(chordal_env), irn)
-#define set_reg(irn, reg) arch_set_irn_register(get_chordal_arch(chordal_env), irn, reg)
+#define get_reg(irn)         arch_get_irn_register(irn)
+#define set_reg(irn, reg)    arch_set_irn_register(get_chordal_arch(chordal_env), irn, reg)
 
 #define is_Perm(irn)            (arch_irn_class_is(arch_env, irn, perm))
 #define get_reg_cls(irn)        (arch_get_irn_reg_class(arch_env, irn, -1))

diff --git a/ir/be/bestate.c b/ir/be/bestate.c
index e5f3c5e..630c3ff 100644 (file)
--- a/ir/be/bestate.c
+++ b/ir/be/bestate.c
@@ -268,7 +268,7 @@ block_info_t *compute_block_start_state(minibelady_env_t *env, ir_node *block)
        sched_foreach(block, node) {
                if (!is_Phi(node))
                        break;
-               if (arch_get_irn_register(env->arch_env, node) != env->reg)
+               if (arch_get_irn_register(node) != env->reg)
                        continue;
 
                DBG((dbg, LEVEL_2, "\t...checking %+F\n", node));
@@ -318,7 +318,7 @@ block_info_t *compute_block_start_state(minibelady_env_t *env, ir_node *block)
                if(!mode_is_data(get_irn_mode(node)))
                        continue;
 
-               if (arch_get_irn_register(env->arch_env, node) != env->reg)
+               if (arch_get_irn_register(node) != env->reg)
                        continue;
 
                DBG((dbg, LEVEL_2, "\t...checking %+F\n", node));
@@ -409,7 +409,7 @@ void belady(minibelady_env_t *env, ir_node *block)
                        if(!mode_is_data(get_irn_mode(in)))
                                continue;
 
-                       reg = arch_get_irn_register(env->arch_env, in);
+                       reg = arch_get_irn_register(in);
                        if(reg == env->reg) {
                                assert(need_val == NULL);
                                need_val = in;
@@ -436,7 +436,7 @@ void belady(minibelady_env_t *env, ir_node *block)
                                if(!mode_is_data(get_irn_mode(proj)))
                                        continue;
 
-                               reg = arch_get_irn_register(env->arch_env, proj);
+                               reg = arch_get_irn_register(proj);
                                if(reg == env->reg) {
                                        current_state = proj;
                                        DBG((dbg, LEVEL_3, "\t... current_state <- %+F\n", current_state));
@@ -444,8 +444,7 @@ void belady(minibelady_env_t *env, ir_node *block)
                        }
                } else {
                        if(mode_is_data(get_irn_mode(node))) {
-                               const arch_register_t *reg =
-                                       arch_get_irn_register(env->arch_env, node);
+                               const arch_register_t *reg = arch_get_irn_register(node);
                                if(reg == env->reg) {
                                        current_state = node;
                                        DBG((dbg, LEVEL_3, "\t... current_state <- %+F\n", current_state));

diff --git a/ir/be/beutil.c b/ir/be/beutil.c
index 53b7287..bcabe6f 100644 (file)
--- a/ir/be/beutil.c
+++ b/ir/be/beutil.c
@@ -69,13 +69,12 @@ static void dump_allocated_block(ir_node *block, void *data)
        const ir_node *irn;
        struct dump_env *dump_env = data;
        FILE *f = dump_env->f;
-       arch_env_t *env = dump_env->env;
 
        ir_fprintf(f, "node:{title:\"b%N\"\nlabel:\"", block);
        sched_foreach(block, irn) {
                const char *prefix = "";
 
-               const arch_register_t *reg = arch_get_irn_register(env, irn);
+               const arch_register_t *reg = arch_get_irn_register(irn);
 
                ir_fprintf(f, "\n");
                if(reg)
@@ -88,7 +87,7 @@ static void dump_allocated_block(ir_node *block, void *data)
                                ir_node *op = get_irn_n(irn, i);
                                if (arch_is_register_operand(op, -1)) {
                                        ir_fprintf(f, "%s%s", prefix,
-                                               arch_register_get_name(arch_get_irn_register(env, op)));
+                                               arch_register_get_name(arch_get_irn_register(op)));
                                        prefix = ", ";
                                }
                        }

diff --git a/ir/be/beverify.c b/ir/be/beverify.c
index b311eea..caf508a 100644 (file)
--- a/ir/be/beverify.c
+++ b/ir/be/beverify.c
@@ -706,7 +706,7 @@ static void check_register_constraints(ir_node *node)
 
        /* verify output register */
        if (arch_get_irn_reg_class(node, -1) != NULL) {
-               reg = arch_get_irn_register(arch_env, node);
+               reg = arch_get_irn_register(node);
                if (reg == NULL) {
                        ir_fprintf(stderr, "Verify warning: Node %+F in block %+F(%s) should have a register assigned\n",
                                        node, get_nodes_block(node), get_irg_dump_name(irg));
@@ -736,7 +736,7 @@ static void check_register_constraints(ir_node *node)
                if (arch_get_irn_reg_class(node, i) == NULL)
                        continue;
 
-               reg = arch_get_irn_register(arch_env, pred);
+               reg = arch_get_irn_register(pred);
                if (reg == NULL) {
                        ir_fprintf(stderr, "Verify warning: Node %+F in block %+F(%s) should have a register assigned (%+F input constraint)\n",
                                   pred, get_nodes_block(pred), get_irg_dump_name(irg), node);
@@ -754,12 +754,12 @@ static void check_register_constraints(ir_node *node)
        if (is_Phi(node)) {
                int i, arity;
 
-               reg = arch_get_irn_register(arch_env, node);
+               reg = arch_get_irn_register(node);
 
                arity = get_irn_arity(node);
                for (i = 0; i < arity; ++i) {
                        ir_node               *pred     = get_Phi_pred(node, i);
-                       const arch_register_t *pred_reg = arch_get_irn_register(arch_env, pred);
+                       const arch_register_t *pred_reg = arch_get_irn_register(pred);
 
                        if (reg != pred_reg && !arch_register_type_is(pred_reg, joker)) {
                                ir_fprintf(stderr, "Verify warning: Input %d of %+F in block %+F(%s) uses register %s instead of %s\n",
@@ -777,7 +777,7 @@ static void value_used(ir_node *node) {
        if (arch_get_irn_reg_class(node, -1) != regclass)
                return;
 
-       reg = arch_get_irn_register(arch_env, node);
+       reg = arch_get_irn_register(node);
        if (reg->type & arch_register_type_virtual)
                return;
 
@@ -800,7 +800,7 @@ static void value_def(ir_node *node)
        if (arch_get_irn_reg_class(node, -1) != regclass)
                return;
 
-       reg = arch_get_irn_register(arch_env, node);
+       reg = arch_get_irn_register(node);
        if (reg->type & arch_register_type_virtual)
                return;
 

diff --git a/ir/be/ia32/bearch_ia32.c b/ir/be/ia32/bearch_ia32.c
index 8a8cba7..1946580 100644 (file)
--- a/ir/be/ia32/bearch_ia32.c
+++ b/ir/be/ia32/bearch_ia32.c
@@ -1194,7 +1194,7 @@ static void transform_to_Load(ia32_code_gen_t *cg, ir_node *node) {
        }
 
        /* copy the register from the old node to the new Load */
-       reg = arch_get_irn_register(cg->arch_env, node);
+       reg = arch_get_irn_register(node);
        arch_set_irn_register(cg->arch_env, new_op, reg);
 
        SET_IA32_ORIG_NODE(new_op, ia32_get_old_node_name(cg, node));

diff --git a/ir/be/ia32/ia32_emitter.c b/ir/be/ia32/ia32_emitter.c
index 3620900..e5c46b7 100644 (file)
--- a/ir/be/ia32/ia32_emitter.c
+++ b/ir/be/ia32/ia32_emitter.c
@@ -129,7 +129,7 @@ static const arch_register_t *get_in_reg(const ir_node *irn, int pos)
           in register we need. */
        op = get_irn_n(irn, pos);
 
-       reg = arch_get_irn_register(arch_env, op);
+       reg = arch_get_irn_register(op);
 
        assert(reg && "no in register found");
 
@@ -168,7 +168,7 @@ static const arch_register_t *get_out_reg(const ir_node *irn, int pos)
 
        if (get_irn_mode(irn) != mode_T) {
                assert(pos == 0);
-               reg = arch_get_irn_register(arch_env, irn);
+               reg = arch_get_irn_register(irn);
        } else if (is_ia32_irn(irn)) {
                reg = get_ia32_out_reg(irn, pos);
        } else {
@@ -178,7 +178,7 @@ static const arch_register_t *get_out_reg(const ir_node *irn, int pos)
                        proj = get_edge_src_irn(edge);
                        assert(is_Proj(proj) && "non-Proj from mode_T node");
                        if (get_Proj_proj(proj) == pos) {
-                               reg = arch_get_irn_register(arch_env, proj);
+                               reg = arch_get_irn_register(proj);
                                break;
                        }
                }
@@ -1066,17 +1066,15 @@ static void emit_ia32_CMov(const ir_node *node)
 {
        const ia32_attr_t     *attr         = get_ia32_attr_const(node);
        int                    ins_permuted = attr->data.ins_permuted;
-       const arch_register_t *out          = arch_get_irn_register(arch_env, node);
+       const arch_register_t *out          = arch_get_irn_register(node);
        pn_Cmp                 pnc          = get_ia32_condcode(node);
        const arch_register_t *in_true;
        const arch_register_t *in_false;
 
        pnc = determine_final_pnc(node, n_ia32_CMov_eflags, pnc);
 
-       in_true  = arch_get_irn_register(arch_env,
-                                        get_irn_n(node, n_ia32_CMov_val_true));
-       in_false = arch_get_irn_register(arch_env,
-                                        get_irn_n(node, n_ia32_CMov_val_false));
+       in_true  = arch_get_irn_register(get_irn_n(node, n_ia32_CMov_val_true));
+       in_false = arch_get_irn_register(get_irn_n(node, n_ia32_CMov_val_false));
 
        /* should be same constraint fullfilled? */
        if (out == in_false) {
@@ -1534,7 +1532,7 @@ static void emit_ia32_Conv_I2I(const ir_node *node)
        if (signed_mode                                    &&
                        smaller_bits == 16                             &&
                        &ia32_gp_regs[REG_EAX] == get_out_reg(node, 0) &&
-                       &ia32_gp_regs[REG_EAX] == arch_get_irn_register(arch_env, get_irn_n(node, n_ia32_unary_op))) {
+                       &ia32_gp_regs[REG_EAX] == arch_get_irn_register(get_irn_n(node, n_ia32_unary_op))) {
                /* argument and result are both in EAX and signedness is ok: use the
                 * smaller cwtl opcode */
                ia32_emitf(node, "\tcwtl\n");
@@ -1587,8 +1585,8 @@ static void emit_be_IncSP(const ir_node *node)
  */
 static void Copy_emitter(const ir_node *node, const ir_node *op)
 {
-       const arch_register_t *in  = arch_get_irn_register(arch_env, op);
-       const arch_register_t *out = arch_get_irn_register(arch_env, node);
+       const arch_register_t *in  = arch_get_irn_register(op);
+       const arch_register_t *out = arch_get_irn_register(node);
 
        if (in == out) {
                return;
@@ -1624,8 +1622,8 @@ static void emit_be_Perm(const ir_node *node)
        const arch_register_t *in0, *in1;
        const arch_register_class_t *cls0, *cls1;
 
-       in0 = arch_get_irn_register(arch_env, get_irn_n(node, 0));
-       in1 = arch_get_irn_register(arch_env, get_irn_n(node, 1));
+       in0 = arch_get_irn_register(get_irn_n(node, 0));
+       in1 = arch_get_irn_register(get_irn_n(node, 1));
 
        cls0 = arch_register_get_class(in0);
        cls1 = arch_register_get_class(in1);

diff --git a/ir/be/ia32/ia32_finish.c b/ir/be/ia32/ia32_finish.c
index 11e10a7..80328e6 100644 (file)
--- a/ir/be/ia32/ia32_finish.c
+++ b/ir/be/ia32/ia32_finish.c
@@ -73,8 +73,8 @@ static void ia32_transform_sub_to_neg_add(ir_node *irn, ia32_code_gen_t *cg)
        nomem    = new_rd_NoMem(cg->irg);
        in1      = get_irn_n(irn, n_ia32_binary_left);
        in2      = get_irn_n(irn, n_ia32_binary_right);
-       in1_reg  = arch_get_irn_register(cg->arch_env, in1);
-       in2_reg  = arch_get_irn_register(cg->arch_env, in2);
+       in1_reg  = arch_get_irn_register(in1);
+       in2_reg  = arch_get_irn_register(in2);
        out_reg  = get_ia32_out_reg(irn, 0);
 
        irg     = cg->irg;
@@ -286,7 +286,7 @@ static void assure_should_be_same_requirements(ia32_code_gen_t *cg,
                /* get in and out register */
                out_reg  = get_ia32_out_reg(node, i);
                in_node  = get_irn_n(node, same_pos);
-               in_reg   = arch_get_irn_register(arch_env, in_node);
+               in_reg   = arch_get_irn_register(in_node);
 
                /* requirement already fulfilled? */
                if (in_reg == out_reg)
@@ -308,7 +308,7 @@ static void assure_should_be_same_requirements(ia32_code_gen_t *cg,
                        if (!mode_is_data(get_irn_mode(in)))
                                continue;
 
-                       in_reg = arch_get_irn_register(arch_env, in);
+                       in_reg = arch_get_irn_register(in);
 
                        if (in_reg != out_reg)
                                continue;
@@ -400,7 +400,6 @@ static void assure_should_be_same_requirements(ia32_code_gen_t *cg,
 static void fix_am_source(ir_node *irn, void *env)
 {
        ia32_code_gen_t            *cg = env;
-       const arch_env_t           *arch_env = cg->arch_env;
        const arch_register_req_t **reqs;
        int                         n_res, i;
 
@@ -428,7 +427,7 @@ static void fix_am_source(ir_node *irn, void *env)
                out_reg   = get_ia32_out_reg(irn, i);
                same_pos  = get_first_same(reqs[i]);
                same_node = get_irn_n(irn, same_pos);
-               same_reg  = arch_get_irn_register(arch_env, same_node);
+               same_reg  = arch_get_irn_register(same_node);
 
                /* should_be same constraint is fullfilled, nothing to do */
                if (out_reg == same_reg)
@@ -436,8 +435,8 @@ static void fix_am_source(ir_node *irn, void *env)
 
                /* we only need to do something if the out reg is the same as base
                         or index register */
-               if (out_reg != arch_get_irn_register(arch_env, get_irn_n(irn, n_ia32_base)) &&
-                               out_reg != arch_get_irn_register(arch_env, get_irn_n(irn, n_ia32_index)))
+               if (out_reg != arch_get_irn_register(get_irn_n(irn, n_ia32_base)) &&
+                               out_reg != arch_get_irn_register(get_irn_n(irn, n_ia32_index)))
                        continue;
 
                load_res = turn_back_am(irn);

diff --git a/ir/be/ia32/ia32_fpu.c b/ir/be/ia32/ia32_fpu.c
index 9219cd3..902283b 100644 (file)
--- a/ir/be/ia32/ia32_fpu.c
+++ b/ir/be/ia32/ia32_fpu.c
@@ -238,7 +238,7 @@ static void collect_fpu_mode_nodes_walker(ir_node *node, void *data)
        if(!mode_is_data(get_irn_mode(node)))
                return;
 
-       reg = arch_get_irn_register(env->arch_env, node);
+       reg = arch_get_irn_register(node);
        if(reg == &ia32_fp_cw_regs[REG_FPCW] && !is_ia32_ChangeCW(node)) {
                ARR_APP1(ir_node*, env->state_nodes, node);
        }

diff --git a/ir/be/ia32/ia32_optimize.c b/ir/be/ia32/ia32_optimize.c
index 3ab990f..5b8a35c 100644 (file)
--- a/ir/be/ia32/ia32_optimize.c
+++ b/ir/be/ia32/ia32_optimize.c
@@ -168,7 +168,7 @@ static ir_node *turn_into_mode_t(ir_node *node)
        res_proj = new_r_Proj(current_ir_graph, block, new_node, mode_Iu,
                              pn_ia32_res);
 
-       reg = arch_get_irn_register(arch_env, node);
+       reg = arch_get_irn_register(node);
        arch_set_irn_register(arch_env, res_proj, reg);
 
        sched_add_before(node, new_node);
@@ -227,7 +227,7 @@ static void peephole_ia32_Cmp(ir_node *const node)
        }
        set_ia32_ls_mode(test, get_ia32_ls_mode(node));
 
-       reg = arch_get_irn_register(arch_env, node);
+       reg = arch_get_irn_register(node);
        arch_set_irn_register(arch_env, test, reg);
 
        foreach_out_edge_safe(node, edge, tmp) {
@@ -476,7 +476,7 @@ static void peephole_IncSP_Store_to_push(ir_node *irn)
 
                val = get_irn_n(store, n_ia32_unary_op);
                mem = get_irn_n(store, n_ia32_mem);
-               spreg = arch_get_irn_register(cg->arch_env, curr_sp);
+               spreg = arch_get_irn_register(curr_sp);
 
                push = new_rd_ia32_Push(get_irn_dbg_info(store), irg, block, noreg, noreg, mem, val, curr_sp);
                copy_mark(store, push);
@@ -649,8 +649,8 @@ static void peephole_Load_IncSP_to_pop(ir_node *irn)
                                        /* not a GP copy, ignore */
                                        continue;
                                }
-                               dreg = arch_get_irn_register(arch_env, node);
-                               sreg = arch_get_irn_register(arch_env, be_get_Copy_op(node));
+                               dreg = arch_get_irn_register(node);
+                               sreg = arch_get_irn_register(be_get_Copy_op(node));
                                if (regmask & copymask & (1 << sreg->index)) {
                                        break;
                                }
@@ -700,7 +700,7 @@ static void peephole_Load_IncSP_to_pop(ir_node *irn)
                if (loads[loadslot] != NULL)
                        break;
 
-               dreg = arch_get_irn_register(arch_env, node);
+               dreg = arch_get_irn_register(node);
                if (regmask & (1 << dreg->index)) {
                        /* this register is already used */
                        break;
@@ -742,7 +742,7 @@ static void peephole_Load_IncSP_to_pop(ir_node *irn)
                const arch_register_t *reg;
 
                mem = get_irn_n(load, n_ia32_mem);
-               reg = arch_get_irn_register(arch_env, load);
+               reg = arch_get_irn_register(load);
 
                pop = new_rd_ia32_Pop(get_irn_dbg_info(load), irg, block, mem, pred_sp);
                arch_set_irn_register(arch_env, pop, reg);
@@ -880,7 +880,7 @@ static void peephole_be_IncSP(ir_node *node)
        /* transform Load->IncSP combinations to Pop where possible */
        peephole_Load_IncSP_to_pop(node);
 
-       if (arch_get_irn_register(arch_env, node) != esp)
+       if (arch_get_irn_register(node) != esp)
                return;
 
        /* replace IncSP -4 by Pop freereg when possible */
@@ -943,7 +943,7 @@ static void peephole_ia32_Const(ir_node *node)
        if (be_peephole_get_value(CLASS_ia32_flags, REG_EFLAGS) != NULL)
                return;
 
-       reg = arch_get_irn_register(arch_env, node);
+       reg = arch_get_irn_register(node);
        assert(be_peephole_get_reg_value(reg) == NULL);
 
        /* create xor(produceval, produceval) */
@@ -1046,13 +1046,13 @@ static void peephole_ia32_Lea(ir_node *node)
                base     = NULL;
                base_reg = NULL;
        } else {
-               base_reg = arch_get_irn_register(arch_env, base);
+               base_reg = arch_get_irn_register(base);
        }
        if(is_noreg(cg, index)) {
                index     = NULL;
                index_reg = NULL;
        } else {
-               index_reg = arch_get_irn_register(arch_env, index);
+               index_reg = arch_get_irn_register(index);
        }
 
        if(base == NULL && index == NULL) {
@@ -1063,7 +1063,7 @@ static void peephole_ia32_Lea(ir_node *node)
                return;
        }
 
-       out_reg = arch_get_irn_register(arch_env, node);
+       out_reg = arch_get_irn_register(node);
        scale   = get_ia32_am_scale(node);
        assert(!is_ia32_need_stackent(node) || get_ia32_frame_ent(node) != NULL);
        /* check if we have immediates values (frame entities should already be

diff --git a/ir/be/ia32/ia32_x87.c b/ir/be/ia32/ia32_x87.c
index cad46af..8a6aa74 100644 (file)
--- a/ir/be/ia32/ia32_x87.c
+++ b/ir/be/ia32/ia32_x87.c
@@ -445,11 +445,10 @@ static ir_node *get_irn_Proj_for_mode(ir_node *n, ir_mode *m)
 /**
  * Wrap the arch_* function here so we can check for errors.
  */
-static INLINE const arch_register_t *x87_get_irn_register(x87_simulator *sim, const ir_node *irn)
+static INLINE const arch_register_t *x87_get_irn_register(const ir_node *irn)
 {
-       const arch_register_t *res;
+       const arch_register_t *res = arch_get_irn_register(irn);
 
-       res = arch_get_irn_register(sim->arch_env, irn);
        assert(res->reg_class->regs == ia32_vfp_regs);
        return res;
 }  /* x87_get_irn_register */
@@ -667,7 +666,7 @@ static void x87_create_fpush(x87_state *state, ir_node *n, int pos, int op_idx)
 {
        ir_node               *fpush, *pred = get_irn_n(n, op_idx);
        ia32_x87_attr_t       *attr;
-       const arch_register_t *out = x87_get_irn_register(state->sim, pred);
+       const arch_register_t *out = x87_get_irn_register(pred);
 
        x87_push_dbl(state, arch_register_get_index(out), pred);
 
@@ -769,14 +768,14 @@ static vfp_liveness vfp_liveness_transfer(x87_simulator *sim, ir_node *irn, vfp_
                        ir_node *proj = get_edge_src_irn(edge);
 
                        if (arch_irn_consider_in_reg_alloc(arch_env, cls, proj)) {
-                               const arch_register_t *reg = x87_get_irn_register(sim, proj);
+                               const arch_register_t *reg = x87_get_irn_register(proj);
                                live &= ~(1 << arch_register_get_index(reg));
                        }
                }
        }
 
        if (arch_irn_consider_in_reg_alloc(arch_env, cls, irn)) {
-               const arch_register_t *reg = x87_get_irn_register(sim, irn);
+               const arch_register_t *reg = x87_get_irn_register(irn);
                live &= ~(1 << arch_register_get_index(reg));
        }
 
@@ -784,7 +783,7 @@ static vfp_liveness vfp_liveness_transfer(x87_simulator *sim, ir_node *irn, vfp_
                ir_node *op = get_irn_n(irn, i);
 
                if (mode_is_float(get_irn_mode(op)) && arch_irn_consider_in_reg_alloc(arch_env, cls, op)) {
-                       const arch_register_t *reg = x87_get_irn_register(sim, op);
+                       const arch_register_t *reg = x87_get_irn_register(op);
                        live |= 1 << arch_register_get_index(reg);
                }
        }
@@ -814,7 +813,7 @@ static vfp_liveness vfp_liveness_end_of_block(x87_simulator *sim, const ir_node
                if (!arch_irn_consider_in_reg_alloc(arch_env, cls, node))
                        continue;
 
-               reg = x87_get_irn_register(sim, node);
+               reg = x87_get_irn_register(node);
                live |= 1 << arch_register_get_index(reg);
        }
 
@@ -930,9 +929,9 @@ static int sim_binop(x87_state *state, ir_node *n, const exchange_tmpl *tmpl)
        x87_simulator         *sim     = state->sim;
        ir_node               *op1     = get_irn_n(n, n_ia32_binary_left);
        ir_node               *op2     = get_irn_n(n, n_ia32_binary_right);
-       const arch_register_t *op1_reg = x87_get_irn_register(sim, op1);
-       const arch_register_t *op2_reg = x87_get_irn_register(sim, op2);
-       const arch_register_t *out     = x87_get_irn_register(sim, n);
+       const arch_register_t *op1_reg = x87_get_irn_register(op1);
+       const arch_register_t *op2_reg = x87_get_irn_register(op2);
+       const arch_register_t *out     = x87_get_irn_register(n);
        int reg_index_1                = arch_register_get_index(op1_reg);
        int reg_index_2                = arch_register_get_index(op2_reg);
        vfp_liveness           live    = vfp_live_args_after(sim, n, REGMASK(out));
@@ -1108,8 +1107,8 @@ static int sim_unop(x87_state *state, ir_node *n, ir_op *op)
 {
        int op1_idx, out_idx;
        x87_simulator         *sim = state->sim;
-       const arch_register_t *op1 = x87_get_irn_register(sim, get_irn_n(n, UNOP_IDX));
-       const arch_register_t *out = x87_get_irn_register(sim, n);
+       const arch_register_t *op1 = x87_get_irn_register(get_irn_n(n, UNOP_IDX));
+       const arch_register_t *out = x87_get_irn_register(n);
        ia32_x87_attr_t *attr;
        unsigned live = vfp_live_args_after(sim, n, REGMASK(out));
 
@@ -1152,12 +1151,12 @@ static int sim_unop(x87_state *state, ir_node *n, ir_op *op)
  */
 static int sim_load(x87_state *state, ir_node *n, ir_op *op)
 {
-       const arch_register_t *out = x87_get_irn_register(state->sim, n);
+       const arch_register_t *out = x87_get_irn_register(n);
        ia32_x87_attr_t *attr;
 
        DB((dbg, LEVEL_1, ">>> %+F -> %s\n", n, arch_register_get_name(out)));
        x87_push(state, arch_register_get_index(out), x87_patch_insn(n, op));
-       assert(out == x87_get_irn_register(state->sim, n));
+       assert(out == x87_get_irn_register(n));
        attr = get_ia32_x87_attr(n);
        attr->x87[2] = out = &ia32_st_regs[0];
        DB((dbg, LEVEL_1, "<<< %s -> %s\n", get_irn_opname(n), arch_register_get_name(out)));
@@ -1206,7 +1205,7 @@ static int sim_store(x87_state *state, ir_node *n, ir_op *op, ir_op *op_p)
 {
        x87_simulator         *sim = state->sim;
        ir_node               *val = get_irn_n(n, n_ia32_vfst_val);
-       const arch_register_t *op2 = x87_get_irn_register(sim, val);
+       const arch_register_t *op2 = x87_get_irn_register(val);
        unsigned              live = vfp_live_args_after(sim, n, 0);
        int                   insn = NO_NODE_ADDED;
        ia32_x87_attr_t *attr;
@@ -1370,9 +1369,8 @@ GEN_STORE(fist)
 */
 static int sim_fisttp(x87_state *state, ir_node *n)
 {
-       x87_simulator         *sim = state->sim;
        ir_node               *val = get_irn_n(n, n_ia32_vfst_val);
-       const arch_register_t *op2 = x87_get_irn_register(sim, val);
+       const arch_register_t *op2 = x87_get_irn_register(val);
        int                   insn = NO_NODE_ADDED;
        ia32_x87_attr_t *attr;
        int op2_reg_idx, op2_idx, depth;
@@ -1420,7 +1418,7 @@ static int sim_FtstFnstsw(x87_state *state, ir_node *n)
        x87_simulator         *sim         = state->sim;
        ia32_x87_attr_t       *attr        = get_ia32_x87_attr(n);
        ir_node               *op1_node    = get_irn_n(n, n_ia32_vFtstFnstsw_left);
-       const arch_register_t *reg1        = x87_get_irn_register(sim, op1_node);
+       const arch_register_t *reg1        = x87_get_irn_register(op1_node);
        int                    reg_index_1 = arch_register_get_index(reg1);
        int                    op1_idx     = x87_on_stack(state, reg_index_1);
        unsigned               live        = vfp_live_args_after(sim, n, 0);
@@ -1465,8 +1463,8 @@ static int sim_Fucom(x87_state *state, ir_node *n)
        x87_simulator         *sim = state->sim;
        ir_node               *op1_node = get_irn_n(n, n_ia32_vFucomFnstsw_left);
        ir_node               *op2_node = get_irn_n(n, n_ia32_vFucomFnstsw_right);
-       const arch_register_t *op1      = x87_get_irn_register(sim, op1_node);
-       const arch_register_t *op2      = x87_get_irn_register(sim, op2_node);
+       const arch_register_t *op1      = x87_get_irn_register(op1_node);
+       const arch_register_t *op2      = x87_get_irn_register(op2_node);
        int reg_index_1 = arch_register_get_index(op1);
        int reg_index_2 = arch_register_get_index(op2);
        unsigned live = vfp_live_args_after(sim, n, 0);
@@ -1701,7 +1699,7 @@ static int sim_Keep(x87_state *state, ir_node *node)
        arity = get_irn_arity(node);
        for (i = 0; i < arity; ++i) {
                op      = get_irn_n(node, i);
-               op_reg  = arch_get_irn_register(state->sim->arch_env, op);
+               op_reg  = arch_get_irn_register(op);
                if (arch_register_get_class(op_reg) != &ia32_reg_classes[CLASS_ia32_vfp])
                        continue;
 
@@ -1789,8 +1787,8 @@ static ir_node *create_Copy(x87_state *state, ir_node *n)
                break;
        }
 
-       out = x87_get_irn_register(sim, n);
-       op1 = x87_get_irn_register(sim, pred);
+       out = x87_get_irn_register(n);
+       op1 = x87_get_irn_register(pred);
 
        if (cnstr != NULL) {
                /* copy a constant */
@@ -1826,7 +1824,6 @@ static ir_node *create_Copy(x87_state *state, ir_node *n)
  */
 static int sim_Copy(x87_state *state, ir_node *n)
 {
-       x87_simulator               *sim = state->sim;
        ir_node                     *pred;
        const arch_register_t       *out;
        const arch_register_t       *op1;
@@ -1841,9 +1838,9 @@ static int sim_Copy(x87_state *state, ir_node *n)
                return 0;
 
        pred = get_irn_n(n, 0);
-       out  = x87_get_irn_register(sim, n);
-       op1  = x87_get_irn_register(sim, pred);
-       live = vfp_live_args_after(sim, n, REGMASK(out));
+       out  = x87_get_irn_register(n);
+       op1  = x87_get_irn_register(pred);
+       live = vfp_live_args_after(state->sim, n, REGMASK(out));
 
        DB((dbg, LEVEL_1, ">>> %+F %s -> %s\n", n,
                arch_register_get_name(op1), arch_register_get_name(out)));
@@ -1862,7 +1859,7 @@ static int sim_Copy(x87_state *state, ir_node *n)
                sched_add_before(next, node);
 
                DB((dbg, LEVEL_1, "<<< %+F %s -> %s\n", node, op1->name,
-                   arch_get_irn_register(sim->arch_env, node)->name));
+                   arch_get_irn_register(node)->name));
                return NO_NODE_ADDED;
        }
 
@@ -1994,7 +1991,7 @@ static int sim_Call(x87_state *state, ir_node *n)
        resproj = get_call_result_proj(n);
        assert(resproj != NULL);
 
-       reg = x87_get_irn_register(state->sim, resproj);
+       reg = x87_get_irn_register(resproj);
        x87_push(state, arch_register_get_index(reg), resproj);
 
 end_call:
@@ -2077,7 +2074,6 @@ typedef struct _perm_data_t {
 static int sim_Perm(x87_state *state, ir_node *irn)
 {
        int             i, n;
-       x87_simulator   *sim = state->sim;
        ir_node         *pred = get_irn_n(irn, 0);
        int             *stack_pos;
        const ir_edge_t *edge;
@@ -2097,7 +2093,7 @@ static int sim_Perm(x87_state *state, ir_node *irn)
 
        /* collect old stack positions */
        for (i = 0; i < n; ++i) {
-               const arch_register_t *inreg = x87_get_irn_register(sim, get_irn_n(irn, i));
+               const arch_register_t *inreg = x87_get_irn_register(get_irn_n(irn, i));
                int idx = x87_on_stack(state, arch_register_get_index(inreg));
 
                assert(idx >= 0 && "Perm argument not on x87 stack");
@@ -2107,7 +2103,7 @@ static int sim_Perm(x87_state *state, ir_node *irn)
        /* now do the permutation */
        foreach_out_edge(irn, edge) {
                ir_node               *proj = get_edge_src_irn(edge);
-               const arch_register_t *out  = x87_get_irn_register(sim, proj);
+               const arch_register_t *out  = x87_get_irn_register(proj);
                long                  num   = get_Proj_proj(proj);
 
                assert(0 <= num && num < n && "More Proj's than Perm inputs");
@@ -2263,7 +2259,7 @@ static void fix_unknown_phis(x87_state *state, ir_node *block,
                if (!is_ia32_Unknown_VFP(op))
                        continue;
 
-               reg = arch_get_irn_register(state->sim->arch_env, node);
+               reg = arch_get_irn_register(node);
 
                /* create a zero at end of pred block */
                zero = new_rd_ia32_fldz(NULL, current_ir_graph, pred_block, mode_E);

diff --git a/ir/be/mips/mips_emitter.c b/ir/be/mips/mips_emitter.c
index d1d3475..a15677d 100644 (file)
--- a/ir/be/mips/mips_emitter.c
+++ b/ir/be/mips/mips_emitter.c
@@ -58,10 +58,6 @@ DEBUG_ONLY(static firm_dbg_module_t *dbg = NULL;)
 
 #define SNPRINTF_BUF_LEN 128
 
-static const mips_isa_t      *isa;
-static const arch_env_t      *arch_env;
-static const mips_code_gen_t *cg;
-
 /**
  * Returns the register at in position pos.
  */
@@ -76,7 +72,7 @@ static const arch_register_t *get_in_reg(const ir_node *node, int pos)
           in register we need. */
        op = get_irn_n(node, pos);
 
-       reg = arch_get_irn_register(arch_env, op);
+       reg = arch_get_irn_register(op);
 
        assert(reg && "no in register found");
        return reg;
@@ -96,7 +92,7 @@ static const arch_register_t *get_out_reg(const ir_node *node, int pos)
        /*           Proj with the corresponding projnum for the register */
 
        if (get_irn_mode(node) != mode_T) {
-               reg = arch_get_irn_register(arch_env, node);
+               reg = arch_get_irn_register(node);
        } else if (is_mips_irn(node)) {
                reg = get_mips_out_reg(node, pos);
        } else {
@@ -106,7 +102,7 @@ static const arch_register_t *get_out_reg(const ir_node *node, int pos)
                        proj = get_edge_src_irn(edge);
                        assert(is_Proj(proj) && "non-Proj from mode_T node");
                        if (get_Proj_proj(proj) == pos) {
-                               reg = arch_get_irn_register(arch_env, proj);
+                               reg = arch_get_irn_register(proj);
                                break;
                        }
                }
@@ -804,19 +800,15 @@ void mips_gen_routine(mips_code_gen_t *mips_cg, ir_graph *irg)
 {
        int i, n;
 
-       cg       = mips_cg;
-       isa      = (const mips_isa_t*) cg->arch_env;
-       arch_env = cg->arch_env;
-
        mips_register_emitters();
 
        irg_block_walk_graph(irg, mips_gen_labels, NULL, NULL);
 
        mips_emit_func_prolog(irg);
 
-       n = ARR_LEN(cg->block_schedule);
+       n = ARR_LEN(mips_cg->block_schedule);
        for (i = 0; i < n; ++i) {
-               ir_node *block = cg->block_schedule[i];
+               ir_node *block = mips_cg->block_schedule[i];
                mips_gen_block(block);
        }
 

diff --git a/ir/be/mips/mips_transform.c b/ir/be/mips/mips_transform.c
index 52de8d6..ad1e5b6 100644 (file)
--- a/ir/be/mips/mips_transform.c
+++ b/ir/be/mips/mips_transform.c
@@ -1095,7 +1095,7 @@ static void mips_transform_Reload(mips_transform_env_t* env) {
        }
 
        /* copy the register from the old node to the new Load */
-       reg = arch_get_irn_register(env->cg->arch_env, node);
+       reg = arch_get_irn_register(node);
        arch_set_irn_register(env->cg->arch_env, proj, reg);
 
        exchange(node, proj);
@@ -1115,7 +1115,7 @@ static ir_node *gen_AddSP(ir_node *node)
        add = new_rd_mips_addu(env->dbg, env->irg, env->block, op1, op2);
 
        /* copy the register requirements from the old node to the new node */
-       reg = arch_get_irn_register(env->cg->arch_env, node);
+       reg = arch_get_irn_register(node);
        arch_set_irn_register(env->cg->arch_env, add, reg);
 
        return add;

diff --git a/ir/be/ppc32/bearch_ppc32.c b/ir/be/ppc32/bearch_ppc32.c
index 34da173..d7b1a04 100644 (file)
--- a/ir/be/ppc32/bearch_ppc32.c
+++ b/ir/be/ppc32/bearch_ppc32.c
@@ -550,7 +550,7 @@ static void ppc32_transform_spill(ir_node *node, void *env)
                }
 
                /* copy the register from the old node to the new Load */
-               reg = arch_get_irn_register(cgenv->arch_env, node);
+               reg = arch_get_irn_register(node);
                arch_set_irn_register(cgenv->arch_env, load, reg);
 
                exchange(node, proj);

diff --git a/ir/be/ppc32/ppc32_emitter.c b/ir/be/ppc32/ppc32_emitter.c
index 6e37518..990b4e9 100644 (file)
--- a/ir/be/ppc32/ppc32_emitter.c
+++ b/ir/be/ppc32/ppc32_emitter.c
@@ -56,7 +56,6 @@ static char printbuf[SNPRINTF_BUF_LEN];
 
 extern int isleaf;
 
-static const arch_env_t       *arch_env;
 static const ppc32_code_gen_t *cg;
 
 
@@ -83,7 +82,7 @@ static const arch_register_t *get_in_reg(const ir_node *irn, int pos) {
           in register we need. */
        op = get_irn_n(irn, pos);
 
-       reg = arch_get_irn_register(arch_env, op);
+       reg = arch_get_irn_register(op);
 
        assert(reg && "no in register found");
        return reg;
@@ -104,7 +103,7 @@ static const arch_register_t *get_out_reg(const ir_node *irn, int pos) {
        /*           Proj with the corresponding projnum for the register */
 
        if (get_irn_mode(irn) != mode_T) {
-               reg = arch_get_irn_register(arch_env, irn);
+               reg = arch_get_irn_register(irn);
        } else if (is_ppc32_irn(irn)) {
                reg = get_ppc32_out_reg(irn, pos);
        } else {
@@ -114,7 +113,7 @@ static const arch_register_t *get_out_reg(const ir_node *irn, int pos) {
                        proj = get_edge_src_irn(edge);
                        assert(is_Proj(proj) && "non-Proj from mode_T node");
                        if (get_Proj_proj(proj) == pos) {
-                               reg = arch_get_irn_register(arch_env, proj);
+                               reg = arch_get_irn_register(proj);
                                break;
                        }
                }
@@ -676,8 +675,7 @@ void ppc32_gen_routine(const ppc32_code_gen_t *ppc32_cg, ir_graph *irg)
        ir_node *block;
        int i, n;
 
-       cg       = ppc32_cg;
-       arch_env = cg->arch_env;
+       cg = ppc32_cg;
 
        ppc32_register_emitters();