vfadd => {
# irn_flags => "R",
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
+ reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ],
+ out => [ "vfp", "none", "none" ] },
ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
+ outs => [ "res", "dummy", "M" ],
am => "source,binary",
latency => 4,
units => [ "VFP" ],
vfmul => {
# irn_flags => "R",
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
+ reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ],
+ out => [ "vfp", "none", "none" ] },
ins => [ "base", "index", "mem", "left", "right", "fpcw" ],
+ outs => [ "res", "dummy", "M" ],
am => "source,binary",
latency => 4,
units => [ "VFP" ],
vfsub => {
# irn_flags => "R",
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp" ] },
+ reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ],
+ out => [ "vfp", "none", "none" ] },
ins => [ "base", "index", "mem", "minuend", "subtrahend", "fpcw" ],
+ outs => [ "res", "dummy", "M" ],
am => "source,binary",
latency => 4,
units => [ "VFP" ],
vfdiv => {
state => "exc_pinned",
- reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ], out => [ "vfp", "none" ] },
+ reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ],
+ out => [ "vfp", "none", "none" ] },
ins => [ "base", "index", "mem", "dividend", "divisor", "fpcw" ],
+ outs => [ "res", "dummy", "M" ],
am => "source,binary",
- outs => [ "res", "M" ],
latency => 20,
units => [ "VFP" ],
attr_type => "ia32_x87_attr_t",