* position of the value within the tuple.
*
* @param *db A pointer for debug information.
- * @param *block The IR block the node belongs to.
* @param arg A node producing a tuple. The node must have mode_T.
* @param *mode The mode of the value to project.
* @param proj The position of the value in the tuple.
*/
-ir_node *new_rd_Proj(dbg_info *db, ir_node *block, ir_node *arg,
- ir_mode *mode, long proj);
+ir_node *new_rd_Proj(dbg_info *db, ir_node *arg, ir_mode *mode, long proj);
/** Constructor for a defaultProj node.
*
* @param arg A node producing a tuple.
* @param max_proj The end position of the value in the tuple.
*/
-ir_node *new_rd_defaultProj(dbg_info *db, ir_node *block,
- ir_node *arg, long max_proj);
+ir_node *new_rd_defaultProj(dbg_info *db, ir_node *arg, long max_proj);
/** Constructor for a Tuple node.
*
* Projects a single value out of a tuple. The parameter proj gives the
* position of the value within the tuple.
*
- * @param *block The IR block the node belongs to.
* @param arg A node producing a tuple.
- * @param *mode The mode of the value to project.
+ * @param mode The mode of the value to project.
* @param proj The position of the value in the tuple.
*/
-ir_node *new_r_Proj(ir_node *block, ir_node *arg,
- ir_mode *mode, long proj);
+ir_node *new_r_Proj(ir_node *arg, ir_mode *mode, long proj);
/** Constructor for a defaultProj node.
*
* @param arg A node producing a tuple.
* @param max_proj The end position of the value in the tuple.
*/
-ir_node *new_r_defaultProj(ir_node *block, ir_node *arg, long max_proj);
+ir_node *new_r_defaultProj(ir_node *arg, long max_proj);
/** Constructor for a Tuple node.
/* check for special case: the loaded value might not be used */
if (be_get_Proj_for_pn(node, pn_Load_res) == NULL) {
/* add a result proj and a Keep to produce a pseudo use */
- ir_node *proj = new_r_Proj(block, new_load, mode_Iu, pn_arm_Ldr_res);
+ ir_node *proj = new_r_Proj(new_load, mode_Iu, pn_arm_Ldr_res);
be_new_Keep(block, 1, &proj);
}
*/
static ir_node *gen_Proj_Load(ir_node *node)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *load = get_Proj_pred(node);
ir_node *new_load = be_transform_node(load);
dbg_info *dbgi = get_irn_dbg_info(node);
case iro_arm_Ldr:
/* handle all gp loads equal: they have the same proj numbers. */
if (proj == pn_Load_res) {
- return new_rd_Proj(dbgi, block, new_load, mode_Iu, pn_arm_Ldr_res);
+ return new_rd_Proj(dbgi, new_load, mode_Iu, pn_arm_Ldr_res);
} else if (proj == pn_Load_M) {
- return new_rd_Proj(dbgi, block, new_load, mode_M, pn_arm_Ldr_M);
+ return new_rd_Proj(dbgi, new_load, mode_M, pn_arm_Ldr_M);
}
break;
case iro_arm_fpaLdf:
if (proj == pn_Load_res) {
ir_mode *mode = get_Load_mode(load);
- return new_rd_Proj(dbgi, block, new_load, mode, pn_arm_fpaLdf_res);
+ return new_rd_Proj(dbgi, new_load, mode, pn_arm_fpaLdf_res);
} else if (proj == pn_Load_M) {
- return new_rd_Proj(dbgi, block, new_load, mode_M, pn_arm_fpaLdf_M);
+ return new_rd_Proj(dbgi, new_load, mode_M, pn_arm_fpaLdf_M);
}
break;
default:
*/
static ir_node *gen_Proj_CopyB(ir_node *node)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *pred = get_Proj_pred(node);
ir_node *new_pred = be_transform_node(pred);
dbg_info *dbgi = get_irn_dbg_info(node);
switch (proj) {
case pn_CopyB_M_regular:
if (is_arm_CopyB(new_pred)) {
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_arm_CopyB_M);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_arm_CopyB_M);
}
break;
default:
*/
static ir_node *gen_Proj_Quot(ir_node *node)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *pred = get_Proj_pred(node);
ir_node *new_pred = be_transform_node(pred);
dbg_info *dbgi = get_irn_dbg_info(node);
switch (proj) {
case pn_Quot_M:
if (is_arm_fpaDvf(new_pred)) {
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_arm_fpaDvf_M);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_arm_fpaDvf_M);
} else if (is_arm_fpaRdf(new_pred)) {
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_arm_fpaRdf_M);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_arm_fpaRdf_M);
} else if (is_arm_fpaFdv(new_pred)) {
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_arm_fpaFdv_M);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_arm_fpaFdv_M);
} else if (is_arm_fpaFrd(new_pred)) {
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_arm_fpaFrd_M);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_arm_fpaFrd_M);
}
break;
case pn_Quot_res:
if (is_arm_fpaDvf(new_pred)) {
- return new_rd_Proj(dbgi, block, new_pred, mode, pn_arm_fpaDvf_res);
+ return new_rd_Proj(dbgi, new_pred, mode, pn_arm_fpaDvf_res);
} else if (is_arm_fpaRdf(new_pred)) {
- return new_rd_Proj(dbgi, block, new_pred, mode, pn_arm_fpaRdf_res);
+ return new_rd_Proj(dbgi, new_pred, mode, pn_arm_fpaRdf_res);
} else if (is_arm_fpaFdv(new_pred)) {
- return new_rd_Proj(dbgi, block, new_pred, mode, pn_arm_fpaFdv_res);
+ return new_rd_Proj(dbgi, new_pred, mode, pn_arm_fpaFdv_res);
} else if (is_arm_fpaFrd(new_pred)) {
- return new_rd_Proj(dbgi, block, new_pred, mode, pn_arm_fpaFrd_res);
+ return new_rd_Proj(dbgi, new_pred, mode, pn_arm_fpaFrd_res);
}
break;
default:
*/
static ir_node *gen_Proj_be_AddSP(ir_node *node)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *pred = get_Proj_pred(node);
ir_node *new_pred = be_transform_node(pred);
dbg_info *dbgi = get_irn_dbg_info(node);
long proj = get_Proj_proj(node);
if (proj == pn_be_AddSP_sp) {
- ir_node *res = new_rd_Proj(dbgi, block, new_pred, mode_Iu,
+ ir_node *res = new_rd_Proj(dbgi, new_pred, mode_Iu,
pn_arm_SubSPandCopy_stack);
arch_set_irn_register(res, &arm_gp_regs[REG_SP]);
return res;
} else if (proj == pn_be_AddSP_res) {
- return new_rd_Proj(dbgi, block, new_pred, mode_Iu, pn_arm_SubSPandCopy_addr);
+ return new_rd_Proj(dbgi, new_pred, mode_Iu, pn_arm_SubSPandCopy_addr);
} else if (proj == pn_be_AddSP_M) {
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_arm_SubSPandCopy_M);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_arm_SubSPandCopy_M);
}
panic("Unsupported Proj from AddSP");
}
*/
static ir_node *gen_Proj_be_SubSP(ir_node *node)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *pred = get_Proj_pred(node);
ir_node *new_pred = be_transform_node(pred);
dbg_info *dbgi = get_irn_dbg_info(node);
long proj = get_Proj_proj(node);
if (proj == pn_be_SubSP_sp) {
- ir_node *res = new_rd_Proj(dbgi, block, new_pred, mode_Iu,
+ ir_node *res = new_rd_Proj(dbgi, new_pred, mode_Iu,
pn_arm_AddSP_stack);
arch_set_irn_register(res, &arm_gp_regs[REG_SP]);
return res;
} else if (proj == pn_be_SubSP_M) {
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_arm_AddSP_M);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_arm_AddSP_M);
}
panic("Unsupported Proj from SubSP");
}
ir_node *new_pred = be_transform_node(pred);
ir_mode *mode = get_irn_mode(node);
if (mode_needs_gp_reg(mode)) {
- ir_node *block = be_transform_node(get_nodes_block(node));
- ir_node *new_proj = new_r_Proj(block, new_pred, mode_Iu,
+ ir_node *new_proj = new_r_Proj(new_pred, mode_Iu,
get_Proj_proj(node));
new_proj->node_nr = node->node_nr;
return new_proj;
sched_add_after(sched_point, load);
sched_remove(node);
- proj = new_rd_Proj(dbgi, block, load, mode, pn_arm_Ldr_res);
+ proj = new_rd_Proj(dbgi, load, mode, pn_arm_Ldr_res);
reg = arch_get_irn_register(node);
arch_set_irn_register(proj, reg);
conv = new_bd_arm_fpaDbl2GP(NULL, bl, arg, mem);
/* move high/low */
- *resL = new_r_Proj(bl, conv, mode_Is, pn_arm_fpaDbl2GP_low);
- *resH = new_r_Proj(bl, conv, mode_Is, pn_arm_fpaDbl2GP_high);
- mem = new_r_Proj(bl, conv, mode_M, pn_arm_fpaDbl2GP_M);
+ *resL = new_r_Proj(conv, mode_Is, pn_arm_fpaDbl2GP_low);
+ *resH = new_r_Proj(conv, mode_Is, pn_arm_fpaDbl2GP_high);
+ mem = new_r_Proj(conv, mode_M, pn_arm_fpaDbl2GP_M);
}
return mem;
}
/* spill stuff */
store = new_bd_arm_StoreStackM4Inc(NULL, block, sp, fp, ip, lr, pc, *mem);
- sp = new_r_Proj(block, store, env->arch_env->sp->reg_class->mode, pn_arm_StoreStackM4Inc_ptr);
+ sp = new_r_Proj(store, env->arch_env->sp->reg_class->mode, pn_arm_StoreStackM4Inc_ptr);
arch_set_irn_register(sp, env->arch_env->sp);
- *mem = new_r_Proj(block, store, mode_M, pn_arm_StoreStackM4Inc_M);
+ *mem = new_r_Proj(store, mode_M, pn_arm_StoreStackM4Inc_M);
/* frame pointer is ip-4 (because ip is our old sp value) */
fp = new_bd_arm_Sub_imm(NULL, block, ip, 4, 0);
load_node = new_bd_arm_LoadStackM3Epilogue(NULL, bl, curr_bp, *mem);
- curr_bp = new_r_Proj(bl, load_node, env->arch_env->bp->reg_class->mode, pn_arm_LoadStackM3Epilogue_res0);
- curr_sp = new_r_Proj(bl, load_node, env->arch_env->sp->reg_class->mode, pn_arm_LoadStackM3Epilogue_res1);
- curr_pc = new_r_Proj(bl, load_node, mode_Iu, pn_arm_LoadStackM3Epilogue_res2);
- *mem = new_r_Proj(bl, load_node, mode_M, pn_arm_LoadStackM3Epilogue_M);
+ curr_bp = new_r_Proj(load_node, env->arch_env->bp->reg_class->mode, pn_arm_LoadStackM3Epilogue_res0);
+ curr_sp = new_r_Proj(load_node, env->arch_env->sp->reg_class->mode, pn_arm_LoadStackM3Epilogue_res1);
+ curr_pc = new_r_Proj(load_node, mode_Iu, pn_arm_LoadStackM3Epilogue_res2);
+ *mem = new_r_Proj(load_node, mode_M, pn_arm_LoadStackM3Epilogue_M);
arch_set_irn_register(curr_bp, env->arch_env->bp);
arch_set_irn_register(curr_sp, env->arch_env->sp);
arch_set_irn_register(curr_pc, &arm_gp_regs[REG_PC]);
ir_node *store;
ir_node *mem_input = do_seq ? curr_mem : new_NoMem();
store = new_rd_Store(dbgi, bl, mem_input, addr, param, 0);
- mem = new_r_Proj(bl, store, mode_M, pn_Store_M);
+ mem = new_r_Proj(store, mode_M, pn_Store_M);
} else {
/* Make a mem copy for compound arguments. */
ir_node *copy;
assert(mode_is_reference(get_irn_mode(param)));
copy = new_rd_CopyB(dbgi, bl, curr_mem, addr, param, param_type);
- mem = new_r_Proj(bl, copy, mode_M, pn_CopyB_M_regular);
+ mem = new_r_Proj(copy, mode_M, pn_CopyB_M_regular);
}
curr_ofs += param_size;
ARR_APP1(ir_node *, env->calls, low_call);
/* create new stack pointer */
- curr_sp = new_r_Proj(bl, low_call, get_irn_mode(curr_sp), pn_be_Call_sp);
+ curr_sp = new_r_Proj(low_call, get_irn_mode(curr_sp), pn_be_Call_sp);
be_set_constr_single_reg_out(low_call, pn_be_Call_sp, sp,
arch_register_req_type_ignore | arch_register_req_type_produces_sp);
arch_set_irn_register(curr_sp, sp);
if (proj == NULL) {
ir_type *res_type = get_method_res_type(call_tp, i);
ir_mode *mode = get_type_mode(res_type);
- proj = new_r_Proj(bl, low_call, mode, pn);
+ proj = new_r_Proj(low_call, mode, pn);
res_projs[i] = proj;
} else {
set_Proj_pred(proj, low_call);
in[n++] = curr_sp;
foreach_pset_new(&destroyed_regs, reg, iter) {
- ir_node *proj = new_r_Proj(bl, low_call, reg->reg_class->mode, curr_res_proj);
+ ir_node *proj = new_r_Proj(low_call, reg->reg_class->mode, curr_res_proj);
/* memorize the register in the link field. we need afterwards to set the register class of the keep correctly. */
be_set_constr_single_reg_out(low_call, curr_res_proj, reg, 0);
}
if (! mem_proj) {
- mem_proj = new_r_Proj(bl, low_call, mode_M, pn_be_Call_M_regular);
+ mem_proj = new_r_Proj(low_call, mode_M, pn_be_Call_M_regular);
keep_alive(mem_proj);
}
}
ir_node *addsp_mem;
ir_node *sync;
- addsp_mem = new_r_Proj(block, new_alloc, mode_M, pn_be_AddSP_M);
+ addsp_mem = new_r_Proj(new_alloc, mode_M, pn_be_AddSP_M);
/* We need to sync the output mem of the AddSP with the input mem
edge into the alloc node. */
set_Proj_proj(alloc_res, pn_be_AddSP_res);
addr = alloc_res;
- curr_sp = new_r_Proj(block, new_alloc, get_irn_mode(curr_sp),
- pn_be_AddSP_sp);
+ curr_sp = new_r_Proj(new_alloc, get_irn_mode(curr_sp), pn_be_AddSP_sp);
return curr_sp;
}
subsp = be_new_SubSP(env->arch_env->sp, block, curr_sp, size);
set_irn_dbg_info(subsp, dbg);
- mem = new_r_Proj(block, subsp, mode_M, pn_be_SubSP_M);
- res = new_r_Proj(block, subsp, sp_mode, pn_be_SubSP_sp);
+ mem = new_r_Proj(subsp, mode_M, pn_be_SubSP_M);
+ res = new_r_Proj(subsp, sp_mode, pn_be_SubSP_sp);
/* we need to sync the memory */
in[0] = get_Free_mem(free);
add_type |= arch_register_req_type_produces_sp;
}
- proj = new_r_Proj(bl, irn, get_irn_mode(pred), n);
+ proj = new_r_Proj(irn, get_irn_mode(pred), n);
be_node_set_reg_class_in(irn, n, reg->reg_class);
if (in_req)
be_set_constr_single_reg_in(irn, n, reg, 0);
}
if (mem) {
- *mem = new_r_Proj(bl, irn, mode_M, n);
+ *mem = new_r_Proj(irn, mode_M, n);
}
return irn;
save_optimization_state(&state);
set_optimize(0);
- nmem = new_r_Proj(start_bl, get_irg_start(irg), mode_M, pn_Start_M);
+ nmem = new_r_Proj(get_irg_start(irg), mode_M, pn_Start_M);
restore_optimization_state(&state);
/* reroute all edges to the new memory source */
addr = be_new_FrameAddr(env->arch_env->sp->reg_class, first_bl, frame, entry->ent);
if (store)
- mem = new_r_Proj(first_bl, store, mode_M, pn_Store_M);
+ mem = new_r_Proj(store, mode_M, pn_Store_M);
/* the backing store itself */
store = new_r_Store(first_bl, mem, addr,
- new_r_Proj(args_bl, args, mode, i), 0);
+ new_r_Proj(args, mode, i), 0);
}
/* the new memory Proj gets the last Proj from store */
set_Proj_pred(nmem, store);
add_type |= arch_register_req_type_produces_sp | arch_register_req_type_ignore;
assert(nr >= 0);
- proj = new_r_Proj(start_bl, env->start, mode, nr + 1);
+ proj = new_r_Proj(env->start, mode, nr + 1);
pmap_insert(env->regs, (void *) reg, proj);
be_set_constr_single_reg_out(env->start, nr + 1, reg, add_type);
arch_set_irn_register(proj, reg);
/* create a new initial memory proj */
assert(is_Proj(old_mem));
arch_set_out_register_req(env->start, 0, arch_no_register_req);
- new_mem_proj = new_r_Proj(start_bl, env->start, mode_M, 0);
+ new_mem_proj = new_r_Proj(env->start, mode_M, 0);
mem = new_mem_proj;
set_irg_initial_mem(irg, mem);
ir_mode *load_mode = arg->load_mode;
ir_node *load = new_r_Load(start_bl, new_NoMem(), addr, load_mode, cons_floats);
- repl = new_r_Proj(start_bl, load, load_mode, pn_Load_res);
+ repl = new_r_Proj(load, load_mode, pn_Load_res);
if (mode != load_mode) {
repl = new_r_Conv(start_bl, repl, mode);
module. The loads are always safe and can therefore float
and need no memory input */
load = new_r_Load(block, new_NoMem(), add, mode, cons_floats);
- load_res = new_r_Proj(block, load, mode, pn_Load_res);
+ load_res = new_r_Proj(load, mode, pn_Load_res);
set_irn_n(node, i, load_res);
}
copy = remat(flags_needed, node);
if (get_irn_mode(copy) == mode_T) {
- ir_node *block = get_nodes_block(copy);
- ir_mode *mode = flag_class->mode;
- value = new_rd_Proj(NULL, block, copy, mode, pn);
+ ir_mode *mode = flag_class->mode;
+ value = new_rd_Proj(NULL, copy, mode, pn);
} else {
value = copy;
}
be_ssa_construction_env_t senv;
ir_mode *mode = get_irn_mode(perm_op);
- ir_node *proj = new_r_Proj(bl, perm, mode, i);
+ ir_node *proj = new_r_Proj(perm, mode, i);
arch_set_irn_register(proj, reg);
curr = proj;
int pidx = get_pairidx_for_in_regidx(pairs, n, cycle.elems[i]->index);
/* create intermediate proj */
- res1 = new_r_Proj(block, cpyxchg, get_irn_mode(res1), 0);
+ res1 = new_r_Proj(cpyxchg, get_irn_mode(res1), 0);
/* set as in for next Perm */
pairs[pidx].in_node = res1;
ir_node *be_Barrier_append_node(ir_node *barrier, ir_node *node)
{
- ir_node *block = get_nodes_block(barrier);
ir_mode *mode = get_irn_mode(node);
int n = add_irn_n(barrier, node);
- ir_node *proj = new_r_Proj(block, barrier, mode, n);
+ ir_node *proj = new_r_Proj(barrier, mode, n);
add_register_req_in(barrier);
add_register_req_out(barrier);
DB((dbg, LEVEL_2, "Perm %+F (perm %+F,%+F, before %+F)\n",
perm, in[0], in[1], before));
- proj0 = new_r_Proj(block, perm, get_irn_mode(in[0]), 0);
+ proj0 = new_r_Proj(perm, get_irn_mode(in[0]), 0);
mark_as_copy_of(proj0, in[0]);
reg = arch_register_for_index(cls, old_r);
use_reg(proj0, reg);
- proj1 = new_r_Proj(block, perm, get_irn_mode(in[1]), 1);
+ proj1 = new_r_Proj(perm, get_irn_mode(in[1]), 1);
mark_as_copy_of(proj1, in[1]);
reg = arch_register_for_index(cls, r2);
use_reg(proj1, reg);
*/
insert_after = perm;
for (pp = set_first(arg_set); pp; pp = set_next(arg_set)) {
- ir_node *proj = new_r_Proj(pred_bl, perm, get_irn_mode(pp->arg), pp->pos);
+ ir_node *proj = new_r_Proj(perm, get_irn_mode(pp->arg), pp->pos);
pp->proj = proj;
assert(get_reg(pp->arg));
set_reg(proj, get_reg(pp->arg));
/* push ebp */
push = new_bd_ia32_Push(NULL, bl, noreg, noreg, *mem, curr_bp, curr_sp);
- curr_sp = new_r_Proj(bl, push, get_irn_mode(curr_sp), pn_ia32_Push_stack);
- *mem = new_r_Proj(bl, push, mode_M, pn_ia32_Push_M);
+ curr_sp = new_r_Proj(push, get_irn_mode(curr_sp), pn_ia32_Push_stack);
+ *mem = new_r_Proj(push, mode_M, pn_ia32_Push_M);
/* the push must have SP out register */
arch_set_irn_register(curr_sp, arch_env->sp);
/* leave */
leave = new_bd_ia32_Leave(NULL, bl, curr_bp);
- curr_bp = new_r_Proj(bl, leave, mode_bp, pn_ia32_Leave_frame);
- curr_sp = new_r_Proj(bl, leave, get_irn_mode(curr_sp), pn_ia32_Leave_stack);
+ curr_bp = new_r_Proj(leave, mode_bp, pn_ia32_Leave_frame);
+ curr_sp = new_r_Proj(leave, get_irn_mode(curr_sp), pn_ia32_Leave_stack);
} else {
ir_node *pop;
/* pop ebp */
pop = new_bd_ia32_PopEbp(NULL, bl, *mem, curr_sp);
- curr_bp = new_r_Proj(bl, pop, mode_bp, pn_ia32_Pop_res);
- curr_sp = new_r_Proj(bl, pop, get_irn_mode(curr_sp), pn_ia32_Pop_stack);
+ curr_bp = new_r_Proj(pop, mode_bp, pn_ia32_Pop_res);
+ curr_sp = new_r_Proj(pop, get_irn_mode(curr_sp), pn_ia32_Pop_stack);
- *mem = new_r_Proj(bl, pop, mode_M, pn_ia32_Pop_M);
+ *mem = new_r_Proj(pop, mode_M, pn_ia32_Pop_M);
}
arch_set_irn_register(curr_sp, arch_env->sp);
arch_set_irn_register(curr_bp, arch_env->bp);
ir_node *noreg;
ir_node *load = new_bd_ia32_Load(dbgi, block, base, index, mem);
- ir_node *load_res = new_rd_Proj(dbgi, block, load, mode_Iu, pn_ia32_Load_res);
+ ir_node *load_res = new_rd_Proj(dbgi, load, mode_Iu, pn_ia32_Load_res);
ia32_copy_am_attrs(load, node);
if (is_ia32_is_reload(node))
DBG_OPT_RELOAD2LD(node, new_op);
- proj = new_rd_Proj(dbg, block, new_op, mode, pn_ia32_Load_res);
+ proj = new_rd_Proj(dbg, new_op, mode, pn_ia32_Load_res);
if (sched_point) {
sched_add_after(sched_point, new_op);
static ir_node* create_spproj(ir_node *node, ir_node *pred, int pos)
{
dbg_info *dbg = get_irn_dbg_info(node);
- ir_node *block = get_nodes_block(node);
ir_mode *spmode = mode_Iu;
const arch_register_t *spreg = &ia32_gp_regs[REG_ESP];
ir_node *sp;
- sp = new_rd_Proj(dbg, block, pred, spmode, pos);
+ sp = new_rd_Proj(dbg, pred, spmode, pos);
arch_set_irn_register(sp, spreg);
return sp;
/* mov ecx,<env> */
st = new_r_Store(block, mem, p, new_Const_long(mode_Bu, 0xb9), 0);
- mem = new_r_Proj(block, st, mode_M, pn_Store_M);
+ mem = new_r_Proj(st, mode_M, pn_Store_M);
p = new_r_Add(block, p, new_Const_long(mode_Iu, 1), mode);
st = new_r_Store(block, mem, p, env, 0);
- mem = new_r_Proj(block, st, mode_M, pn_Store_M);
+ mem = new_r_Proj(st, mode_M, pn_Store_M);
p = new_r_Add(block, p, new_Const_long(mode_Iu, 4), mode);
/* jmp <callee> */
st = new_r_Store(block, mem, p, new_Const_long(mode_Bu, 0xe9), 0);
- mem = new_r_Proj(block, st, mode_M, pn_Store_M);
+ mem = new_r_Proj(st, mode_M, pn_Store_M);
p = new_r_Add(block, p, new_Const_long(mode_Iu, 1), mode);
st = new_r_Store(block, mem, p, callee, 0);
- mem = new_r_Proj(block, st, mode_M, pn_Store_M);
+ mem = new_r_Proj(st, mode_M, pn_Store_M);
p = new_r_Add(block, p, new_Const_long(mode_Iu, 4), mode);
return mem;
sched_add_before(irn, adc);
set_irn_mode(adc, mode_T);
- adc_flags = new_r_Proj(block, adc, mode_Iu, pn_ia32_Adc_flags);
+ adc_flags = new_r_Proj(adc, mode_Iu, pn_ia32_Adc_flags);
arch_set_irn_register(adc_flags, &ia32_flags_regs[REG_EFLAGS]);
cmc = new_bd_ia32_Cmc(dbg, block, adc_flags);
in[1] = uses_out_reg;
perm = be_new_Perm(cls, block, 2, in);
- perm_proj0 = new_r_Proj(block, perm, get_irn_mode(in[0]), 0);
- perm_proj1 = new_r_Proj(block, perm, get_irn_mode(in[1]), 1);
+ perm_proj0 = new_r_Proj(perm, get_irn_mode(in[0]), 0);
+ perm_proj1 = new_r_Proj(perm, get_irn_mode(in[1]), 1);
arch_set_irn_register(perm_proj0, out_reg);
arch_set_irn_register(perm_proj1, in_reg);
set_ia32_use_frame(load);
sched_add_before(before, load);
- load_res = new_r_Proj(block, load, mode_Iu, pn_ia32_Load_res);
+ load_res = new_r_Proj(load, mode_Iu, pn_ia32_Load_res);
/* TODO: make the actual mode configurable in ChangeCW... */
or_const = new_bd_ia32_Immediate(NULL, get_irg_start_block(irg),
/* h_res = a_h + b_h + carry */
add_low = new_bd_ia32_l_Add(dbg, block, a_l, b_l, mode_T);
- flags = new_r_Proj(block, add_low, mode_flags, pn_ia32_flags);
+ flags = new_r_Proj(add_low, mode_flags, pn_ia32_flags);
add_high = new_bd_ia32_l_Adc(dbg, block, a_h, b_h, flags, h_mode);
- l_res = new_r_Proj(block, add_low, l_mode, pn_ia32_res);
+ l_res = new_r_Proj(add_low, l_mode, pn_ia32_res);
h_res = add_high;
resolve_call(call, l_res, h_res, current_ir_graph, block);
/* h_res = a_h - b_h - carry */
sub_low = new_bd_ia32_l_Sub(dbg, block, a_l, b_l, mode_T);
- flags = new_r_Proj(block, sub_low, mode_flags, pn_ia32_flags);
+ flags = new_r_Proj(sub_low, mode_flags, pn_ia32_flags);
sub_high = new_bd_ia32_l_Sbb(dbg, block, a_h, b_h, flags, h_mode);
- l_res = new_r_Proj( block, sub_low, l_mode, pn_ia32_res);
+ l_res = new_r_Proj(sub_low, l_mode, pn_ia32_res);
h_res = sub_high;
resolve_call(call, l_res, h_res, current_ir_graph, block);
irn = new_r_Const_long(irg, c_mode, 32);
irn = new_rd_And(dbg, upper, cnt, irn, c_mode);
irn = new_rd_Cmp(dbg, upper, irn, new_r_Const(irg, get_mode_null(c_mode)));
- irn = new_r_Proj(upper, irn, mode_b, pn_Cmp_Eq);
+ irn = new_r_Proj(irn, mode_b, pn_Cmp_Eq);
cond = new_rd_Cond(dbg, upper, irn);
- in[0] = new_r_Proj(upper, cond, mode_X, pn_Cond_true);
- in[1] = new_r_Proj(upper, cond, mode_X, pn_Cond_false);
+ in[0] = new_r_Proj(cond, mode_X, pn_Cond_true);
+ in[1] = new_r_Proj(cond, mode_X, pn_Cond_false);
/* the block for cnt >= 32 */
n_block = new_rd_Block(dbg, irg, 1, &in[1]);
irn = new_r_Const_long(irg, c_mode, 32);
irn = new_rd_And(dbg, upper, cnt, irn, c_mode);
irn = new_rd_Cmp(dbg, upper, irn, new_r_Const(irg, get_mode_null(c_mode)));
- irn = new_r_Proj(upper, irn, mode_b, pn_Cmp_Eq);
+ irn = new_r_Proj(irn, mode_b, pn_Cmp_Eq);
cond = new_rd_Cond(dbg, upper, irn);
- in[0] = new_r_Proj(upper, cond, mode_X, pn_Cond_true);
- in[1] = new_r_Proj(upper, cond, mode_X, pn_Cond_false);
+ in[0] = new_r_Proj(cond, mode_X, pn_Cond_true);
+ in[1] = new_r_Proj(cond, mode_X, pn_Cond_false);
/* the block for cnt >= 32 */
n_block = new_rd_Block(dbg, irg, 1, &in[1]);
irn = new_r_Const_long(irg, c_mode, 32);
irn = new_rd_And(dbg, upper, cnt, irn, c_mode);
irn = new_rd_Cmp(dbg, upper, irn, new_r_Const(irg, get_mode_null(c_mode)));
- irn = new_r_Proj(upper, irn, mode_b, pn_Cmp_Eq);
+ irn = new_r_Proj(irn, mode_b, pn_Cmp_Eq);
cond = new_rd_Cond(dbg, upper, irn);
- in[0] = new_r_Proj(upper, cond, mode_X, pn_Cond_true);
- in[1] = new_r_Proj(upper, cond, mode_X, pn_Cond_false);
+ in[0] = new_r_Proj(cond, mode_X, pn_Cond_true);
+ in[1] = new_r_Proj(cond, mode_X, pn_Cond_false);
/* the block for cnt >= 32 */
n_block = new_rd_Block(dbg, irg, 1, &in[1]);
/* handle the often used case of 32x32=64 mul */
if (is_sign_extend(a_l, a_h) && is_sign_extend(b_l, b_h)) {
mul = new_bd_ia32_l_IMul(dbg, block, a_l, b_l);
- h_res = new_rd_Proj(dbg, block, mul, h_mode, pn_ia32_l_IMul_res_high);
- l_res = new_rd_Proj(dbg, block, mul, l_mode, pn_ia32_l_IMul_res_low);
+ h_res = new_rd_Proj(dbg, mul, h_mode, pn_ia32_l_IMul_res_high);
+ l_res = new_rd_Proj(dbg, mul, l_mode, pn_ia32_l_IMul_res_low);
} else {
/* note that zero extension is handled hare efficiently */
mul = new_bd_ia32_l_Mul(dbg, block, a_l, b_l);
- pEDX = new_rd_Proj(dbg, block, mul, h_mode, pn_ia32_l_Mul_res_high);
- l_res = new_rd_Proj(dbg, block, mul, l_mode, pn_ia32_l_Mul_res_low);
+ pEDX = new_rd_Proj(dbg, mul, h_mode, pn_ia32_l_Mul_res_high);
+ l_res = new_rd_Proj(dbg, mul, l_mode, pn_ia32_l_Mul_res_low);
b_l = new_rd_Conv(dbg, block, b_l, h_mode);
mul = new_rd_Mul( dbg, block, a_h, b_l, h_mode);
(void) ctx;
res = new_bd_ia32_Minus64Bit(dbg, block, a_l, a_h);
- l_res = new_r_Proj(block, res, l_mode, pn_ia32_Minus64Bit_low_res);
- h_res = new_r_Proj(block, res, h_mode, pn_ia32_Minus64Bit_high_res);
+ l_res = new_r_Proj(res, l_mode, pn_ia32_Minus64Bit_low_res);
+ h_res = new_r_Proj(res, h_mode, pn_ia32_Minus64Bit_high_res);
resolve_call(call, l_res, h_res, current_ir_graph, block);
sub_h = new_rd_Eor(dbg, block, a_h, sign, h_mode);
l_sub = new_bd_ia32_l_Sub(dbg, block, sub_l, sign_l, mode_T);
- l_res = new_r_Proj(block, l_sub, l_mode, pn_ia32_res);
- flags = new_r_Proj(block, l_sub, mode_flags, pn_ia32_flags);
+ l_res = new_r_Proj(l_sub, l_mode, pn_ia32_res);
+ flags = new_r_Proj(l_sub, mode_flags, pn_ia32_flags);
h_res = new_bd_ia32_l_Sbb(dbg, block, sub_h, sign, flags, h_mode);
resolve_call(call, l_res, h_res, current_ir_graph, block);
/* convert from float to signed 64bit */
float_to_ll = new_bd_ia32_l_FloattoLL(dbg, block, a_f);
- l_res = new_r_Proj(block, float_to_ll, l_res_mode,
- pn_ia32_l_FloattoLL_res_low);
- h_res = new_r_Proj(block, float_to_ll, h_res_mode,
+ l_res = new_r_Proj(float_to_ll, l_res_mode,
+ pn_ia32_l_FloattoLL_res_low);
+ h_res = new_r_Proj(float_to_ll, h_res_mode,
pn_ia32_l_FloattoLL_res_high);
} else {
/* convert from float to signed 64bit */
upper_blk = get_nodes_block(call);
cmp = new_rd_Cmp(dbg, upper_blk, a_f, flt_corr);
- proj = new_r_Proj(upper_blk, cmp, mode_b, pn_Cmp_Lt);
+ proj = new_r_Proj(cmp, mode_b, pn_Cmp_Lt);
cond = new_rd_Cond(dbg, upper_blk, proj);
- in[0] = new_r_Proj(upper_blk, cond, mode_X, pn_Cond_true);
- in[1] = new_r_Proj(upper_blk, cond, mode_X, pn_Cond_false);
+ in[0] = new_r_Proj(cond, mode_X, pn_Cond_true);
+ in[1] = new_r_Proj(cond, mode_X, pn_Cond_false);
blk = new_r_Block(irg, 1, &in[1]);
in[1] = new_r_Jmp(blk);
float_to_ll = new_bd_ia32_l_FloattoLL(dbg, lower_blk, flt_phi);
- l_res = new_r_Proj(lower_blk, float_to_ll, l_res_mode,
+ l_res = new_r_Proj(float_to_ll, l_res_mode,
pn_ia32_l_FloattoLL_res_low);
- h_res = new_r_Proj(lower_blk, float_to_ll, h_res_mode,
+ h_res = new_r_Proj(float_to_ll, h_res_mode,
pn_ia32_l_FloattoLL_res_high);
h_res = new_rd_Add(dbg, lower_blk, h_res, int_phi, h_res_mode);
/* If there are other users, reroute them to result proj */
if (get_irn_n_edges(left) != 2) {
- ir_node *res = new_r_Proj(block, left, mode_Iu, pn_ia32_res);
+ ir_node *res = new_r_Proj(left, mode_Iu, pn_ia32_res);
edges_reroute(left, res, current_ir_graph);
/* Reattach the result proj to left */
}
flags_mode = ia32_reg_classes[CLASS_ia32_flags].mode;
- flags_proj = new_r_Proj(block, left, flags_mode, pn_ia32_flags);
+ flags_proj = new_r_Proj(left, flags_mode, pn_ia32_flags);
arch_set_irn_register(flags_proj, &ia32_flags_regs[REG_EFLAGS]);
assert(get_irn_mode(node) != mode_T);
sched_add_after(skip_Proj(curr_sp), push);
/* create stackpointer Proj */
- curr_sp = new_r_Proj(block, push, spmode, pn_ia32_Push_stack);
+ curr_sp = new_r_Proj(push, spmode, pn_ia32_Push_stack);
arch_set_irn_register(curr_sp, spreg);
/* create memory Proj */
- mem_proj = new_r_Proj(block, push, mode_M, pn_ia32_Push_M);
+ mem_proj = new_r_Proj(push, mode_M, pn_ia32_Push_M);
/* use the memproj now */
be_peephole_exchange(store, mem_proj);
copy_mark(load, pop);
/* create stackpointer Proj */
- pred_sp = new_r_Proj(block, pop, mode_Iu, pn_ia32_Pop_stack);
+ pred_sp = new_r_Proj(pop, mode_Iu, pn_ia32_Pop_stack);
arch_set_irn_register(pred_sp, esp);
sched_add_before(irn, pop);
pop = new_bd_ia32_Pop(dbgi, block, new_NoMem(), stack);
- stack = new_r_Proj(block, pop, mode_Iu, pn_ia32_Pop_stack);
+ stack = new_r_Proj(pop, mode_Iu, pn_ia32_Pop_stack);
arch_set_irn_register(stack, esp);
- val = new_r_Proj(block, pop, mode_Iu, pn_ia32_Pop_res);
+ val = new_r_Proj(pop, mode_Iu, pn_ia32_Pop_res);
arch_set_irn_register(val, reg);
sched_add_before(schedpoint, pop);
ir_node *push = new_bd_ia32_Push(dbgi, block, noreg, noreg, nomem, val, stack);
sched_add_before(schedpoint, push);
- stack = new_r_Proj(block, push, mode_Iu, pn_ia32_Push_stack);
+ stack = new_r_Proj(push, mode_Iu, pn_ia32_Push_stack);
arch_set_irn_register(stack, esp);
return stack;
set_ia32_op_type(load, ia32_AddrModeS);
set_ia32_am_sc(load, floatent);
arch_irn_add_flags(load, arch_irn_flags_rematerializable);
- res = new_r_Proj(block, load, mode_xmm, pn_ia32_xLoad_res);
+ res = new_r_Proj(load, mode_xmm, pn_ia32_xLoad_res);
}
} else {
if (is_Const_null(node)) {
set_ia32_op_type(load, ia32_AddrModeS);
set_ia32_am_sc(load, floatent);
arch_irn_add_flags(load, arch_irn_flags_rematerializable);
- res = new_r_Proj(block, load, mode_vfp, pn_ia32_vfld_res);
+ res = new_r_Proj(load, mode_vfp, pn_ia32_vfld_res);
}
}
#ifdef CONSTRUCT_SSE_CONST
if (mode != mode_T) {
set_irn_mode(node, mode_T);
- return new_rd_Proj(NULL, get_nodes_block(node), node, mode, pn_ia32_res);
+ return new_rd_Proj(NULL, node, mode, pn_ia32_res);
} else {
return node;
}
*/
static ir_node *gen_Mulh(ir_node *node)
{
- ir_node *block = get_nodes_block(node);
- ir_node *new_block = be_transform_node(block);
- dbg_info *dbgi = get_irn_dbg_info(node);
- ir_node *op1 = get_Mulh_left(node);
- ir_node *op2 = get_Mulh_right(node);
- ir_mode *mode = get_irn_mode(node);
- ir_node *new_node;
- ir_node *proj_res_high;
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *op1 = get_Mulh_left(node);
+ ir_node *op2 = get_Mulh_right(node);
+ ir_mode *mode = get_irn_mode(node);
+ ir_node *new_node;
+ ir_node *proj_res_high;
if (get_mode_size_bits(mode) != 32) {
panic("Mulh without 32bit size not supported in ia32 backend (%+F)", node);
if (mode_is_signed(mode)) {
new_node = gen_binop(node, op1, op2, new_bd_ia32_IMul1OP, match_commutative | match_am);
- proj_res_high = new_rd_Proj(dbgi, new_block, new_node, mode_Iu, pn_ia32_IMul1OP_res_high);
+ proj_res_high = new_rd_Proj(dbgi, new_node, mode_Iu, pn_ia32_IMul1OP_res_high);
} else {
new_node = gen_binop(node, op1, op2, new_bd_ia32_Mul, match_commutative | match_am);
- proj_res_high = new_rd_Proj(dbgi, new_block, new_node, mode_Iu, pn_ia32_Mul_res_high);
+ proj_res_high = new_rd_Proj(dbgi, new_node, mode_Iu, pn_ia32_Mul_res_high);
}
return proj_res_high;
}
/* Note: fisttp ALWAYS pop the tos. We have to ensure here that the value is copied
if other users exists */
ir_node *vfisttp = new_bd_ia32_vfisttp(dbgi, block, base, index, mem, val);
- ir_node *value = new_r_Proj(block, vfisttp, mode_E, pn_ia32_vfisttp_res);
+ ir_node *value = new_r_Proj(vfisttp, mode_E, pn_ia32_vfisttp_res);
be_new_Keep(block, 1, &value);
- new_node = new_r_Proj(block, vfisttp, mode_M, pn_ia32_vfisttp_M);
+ new_node = new_r_Proj(vfisttp, mode_M, pn_ia32_vfisttp_M);
*fist = vfisttp;
} else {
ir_node *trunc_mode = ia32_new_Fpu_truncate(env_cg);
} else {
sub = new_node;
set_irn_mode(sub, mode_T);
- new_node = new_rd_Proj(NULL, block, sub, mode, pn_ia32_res);
+ new_node = new_rd_Proj(NULL, sub, mode, pn_ia32_res);
}
- eflags = new_rd_Proj(NULL, block, sub, mode_Iu, pn_ia32_Sub_flags);
+ eflags = new_rd_Proj(NULL, sub, mode_Iu, pn_ia32_Sub_flags);
dbgi = get_irn_dbg_info(psi);
sbb = new_bd_ia32_Sbb0(dbgi, block, eflags);
load = new_bd_ia32_vfld(dbgi, block, am.addr.base, am.addr.index, am.addr.mem, new_mode);
set_am_attributes(load, &am);
- return new_rd_Proj(NULL, block, load, mode_vfp, pn_ia32_res);
+ return new_rd_Proj(NULL, load, mode_vfp, pn_ia32_res);
}
panic("cannot transform floating point Mux");
}
SET_IA32_ORIG_NODE(load, node);
- return new_r_Proj(block, load, mode_Iu, pn_ia32_Load_res);
+ return new_r_Proj(load, mode_Iu, pn_ia32_Load_res);
}
/**
set_ia32_op_type(load, ia32_AddrModeS);
SET_IA32_ORIG_NODE(load, node);
- new_node = new_r_Proj(block, load, mode_E, pn_ia32_vfld_res);
+ new_node = new_r_Proj(load, mode_E, pn_ia32_vfld_res);
return new_node;
}
ia32_address_t *addr = &am.addr;
fild = new_bd_ia32_vfild(dbgi, block, addr->base, addr->index, addr->mem);
- new_node = new_r_Proj(block, fild, mode_vfp, pn_ia32_vfild_res);
+ new_node = new_r_Proj(fild, mode_vfp, pn_ia32_vfild_res);
set_am_attributes(fild, &am);
SET_IA32_ORIG_NODE(fild, node);
set_ia32_op_type(fild, ia32_AddrModeS);
set_ia32_ls_mode(fild, store_mode);
- new_node = new_r_Proj(block, fild, mode_vfp, pn_ia32_vfild_res);
+ new_node = new_r_Proj(fild, mode_vfp, pn_ia32_vfild_res);
return new_node;
}
set_ia32_op_type(fld, ia32_AddrModeS);
set_ia32_use_frame(fld);
- mproj = new_r_Proj(block, fld, mode_M, pn_ia32_vfld_M);
- fld = new_r_Proj(block, fld, mode_vfp, pn_ia32_vfld_res);
+ mproj = new_r_Proj(fld, mode_M, pn_ia32_vfld_M);
+ fld = new_r_Proj(fld, mode_vfp, pn_ia32_vfld_res);
/* create a new barrier */
arity = get_irn_arity(barrier);
if (! is_Proj(res)) {
sub = res;
set_irn_mode(sub, mode_T);
- res = new_rd_Proj(NULL, block, sub, mode_Iu, pn_ia32_res);
+ res = new_rd_Proj(NULL, sub, mode_Iu, pn_ia32_res);
} else {
sub = get_Proj_pred(res);
}
- flags = new_rd_Proj(NULL, block, sub, mode_Iu, pn_ia32_Sub_flags);
+ flags = new_rd_Proj(NULL, sub, mode_Iu, pn_ia32_Sub_flags);
new_node = new_bd_ia32_Jcc(dbgi, block, flags, pn_Cmp_Lt | ia32_pn_Cmp_unsigned);
SET_IA32_ORIG_NODE(new_node, node);
} else {
SET_IA32_ORIG_NODE(fild, node);
- res = new_r_Proj(block, fild, mode_vfp, pn_ia32_vfild_res);
+ res = new_r_Proj(fild, mode_vfp, pn_ia32_vfild_res);
if (! mode_is_signed(get_irn_mode(val_high))) {
ia32_address_mode_t am;
set_am_attributes(fadd, &am);
set_irn_mode(fadd, mode_T);
- res = new_rd_Proj(NULL, block, fadd, mode_vfp, pn_ia32_res);
+ res = new_rd_Proj(NULL, fadd, mode_vfp, pn_ia32_res);
}
return res;
}
assert(pn == pn_ia32_l_FloattoLL_res_low);
}
- proj = new_r_Proj(block, load, mode_Iu, pn_ia32_Load_res);
+ proj = new_r_Proj(load, mode_Iu, pn_ia32_Load_res);
return proj;
}
*/
static ir_node *gen_Proj_be_AddSP(ir_node *node)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *pred = get_Proj_pred(node);
ir_node *new_pred = be_transform_node(pred);
dbg_info *dbgi = get_irn_dbg_info(node);
long proj = get_Proj_proj(node);
if (proj == pn_be_AddSP_sp) {
- ir_node *res = new_rd_Proj(dbgi, block, new_pred, mode_Iu,
+ ir_node *res = new_rd_Proj(dbgi, new_pred, mode_Iu,
pn_ia32_SubSP_stack);
arch_set_irn_register(res, &ia32_gp_regs[REG_ESP]);
return res;
} else if (proj == pn_be_AddSP_res) {
- return new_rd_Proj(dbgi, block, new_pred, mode_Iu,
+ return new_rd_Proj(dbgi, new_pred, mode_Iu,
pn_ia32_SubSP_addr);
} else if (proj == pn_be_AddSP_M) {
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_ia32_SubSP_M);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_ia32_SubSP_M);
}
panic("No idea how to transform proj->AddSP");
*/
static ir_node *gen_Proj_be_SubSP(ir_node *node)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *pred = get_Proj_pred(node);
ir_node *new_pred = be_transform_node(pred);
dbg_info *dbgi = get_irn_dbg_info(node);
long proj = get_Proj_proj(node);
if (proj == pn_be_SubSP_sp) {
- ir_node *res = new_rd_Proj(dbgi, block, new_pred, mode_Iu,
+ ir_node *res = new_rd_Proj(dbgi, new_pred, mode_Iu,
pn_ia32_AddSP_stack);
arch_set_irn_register(res, &ia32_gp_regs[REG_ESP]);
return res;
} else if (proj == pn_be_SubSP_M) {
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_ia32_AddSP_M);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_ia32_AddSP_M);
}
panic("No idea how to transform proj->SubSP");
*/
if (is_Load(pred) && proj == pn_Load_M && get_irn_n_edges(pred) > 1) {
ir_node *res;
- ir_node *old_block = get_nodes_block(node);
/* this is needed, because sometimes we have loops that are only
reachable through the ProjM */
be_enqueue_preds(node);
/* do it in 2 steps, to silence firm verifier */
- res = new_rd_Proj(dbgi, old_block, pred, mode_M, pn_Load_M);
+ res = new_rd_Proj(dbgi, pred, mode_M, pn_Load_M);
set_Proj_proj(res, pn_ia32_mem);
return res;
}
if (is_ia32_Load(new_pred)) {
switch (proj) {
case pn_Load_res:
- return new_rd_Proj(dbgi, block, new_pred, mode_Iu, pn_ia32_Load_res);
+ return new_rd_Proj(dbgi, new_pred, mode_Iu, pn_ia32_Load_res);
case pn_Load_M:
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_ia32_Load_M);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_ia32_Load_M);
case pn_Load_X_regular:
return new_rd_Jmp(dbgi, block);
case pn_Load_X_except:
/* This Load might raise an exception. Mark it. */
set_ia32_exc_label(new_pred, 1);
- return new_rd_Proj(dbgi, block, new_pred, mode_X, pn_ia32_Load_X_exc);
+ return new_rd_Proj(dbgi, new_pred, mode_X, pn_ia32_Load_X_exc);
default:
break;
}
is_ia32_Conv_I2I8Bit(new_pred)) {
set_irn_mode(new_pred, mode_T);
if (proj == pn_Load_res) {
- return new_rd_Proj(dbgi, block, new_pred, mode_Iu, pn_ia32_res);
+ return new_rd_Proj(dbgi, new_pred, mode_Iu, pn_ia32_res);
} else if (proj == pn_Load_M) {
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_ia32_mem);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_ia32_mem);
}
} else if (is_ia32_xLoad(new_pred)) {
switch (proj) {
case pn_Load_res:
- return new_rd_Proj(dbgi, block, new_pred, mode_xmm, pn_ia32_xLoad_res);
+ return new_rd_Proj(dbgi, new_pred, mode_xmm, pn_ia32_xLoad_res);
case pn_Load_M:
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_ia32_xLoad_M);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_ia32_xLoad_M);
case pn_Load_X_regular:
return new_rd_Jmp(dbgi, block);
case pn_Load_X_except:
/* This Load might raise an exception. Mark it. */
set_ia32_exc_label(new_pred, 1);
- return new_rd_Proj(dbgi, block, new_pred, mode_X, pn_ia32_xLoad_X_exc);
+ return new_rd_Proj(dbgi, new_pred, mode_X, pn_ia32_xLoad_X_exc);
default:
break;
}
} else if (is_ia32_vfld(new_pred)) {
switch (proj) {
case pn_Load_res:
- return new_rd_Proj(dbgi, block, new_pred, mode_vfp, pn_ia32_vfld_res);
+ return new_rd_Proj(dbgi, new_pred, mode_vfp, pn_ia32_vfld_res);
case pn_Load_M:
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_ia32_vfld_M);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_ia32_vfld_M);
case pn_Load_X_regular:
return new_rd_Jmp(dbgi, block);
case pn_Load_X_except:
/* This Load might raise an exception. Mark it. */
set_ia32_exc_label(new_pred, 1);
- return new_rd_Proj(dbgi, block, new_pred, mode_X, pn_ia32_vfld_X_exc);
+ return new_rd_Proj(dbgi, new_pred, mode_X, pn_ia32_vfld_X_exc);
default:
break;
}
if (proj != pn_Load_M) {
panic("internal error: transformed node not a Load");
}
- return new_rd_Proj(dbgi, block, new_pred, mode_M, 1);
+ return new_rd_Proj(dbgi, new_pred, mode_M, 1);
}
panic("No idea how to transform proj");
case iro_Div:
switch (proj) {
case pn_Div_M:
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_ia32_Div_M);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_ia32_Div_M);
case pn_Div_res:
- return new_rd_Proj(dbgi, block, new_pred, mode_Iu, pn_ia32_Div_div_res);
+ return new_rd_Proj(dbgi, new_pred, mode_Iu, pn_ia32_Div_div_res);
case pn_Div_X_regular:
return new_rd_Jmp(dbgi, block);
case pn_Div_X_except:
set_ia32_exc_label(new_pred, 1);
- return new_rd_Proj(dbgi, block, new_pred, mode_X, pn_ia32_Div_X_exc);
+ return new_rd_Proj(dbgi, new_pred, mode_X, pn_ia32_Div_X_exc);
default:
break;
}
case iro_Mod:
switch (proj) {
case pn_Mod_M:
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_ia32_Div_M);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_ia32_Div_M);
case pn_Mod_res:
- return new_rd_Proj(dbgi, block, new_pred, mode_Iu, pn_ia32_Div_mod_res);
+ return new_rd_Proj(dbgi, new_pred, mode_Iu, pn_ia32_Div_mod_res);
case pn_Mod_X_except:
set_ia32_exc_label(new_pred, 1);
- return new_rd_Proj(dbgi, block, new_pred, mode_X, pn_ia32_Div_X_exc);
+ return new_rd_Proj(dbgi, new_pred, mode_X, pn_ia32_Div_X_exc);
default:
break;
}
case iro_DivMod:
switch (proj) {
case pn_DivMod_M:
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_ia32_Div_M);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_ia32_Div_M);
case pn_DivMod_res_div:
- return new_rd_Proj(dbgi, block, new_pred, mode_Iu, pn_ia32_Div_div_res);
+ return new_rd_Proj(dbgi, new_pred, mode_Iu, pn_ia32_Div_div_res);
case pn_DivMod_res_mod:
- return new_rd_Proj(dbgi, block, new_pred, mode_Iu, pn_ia32_Div_mod_res);
+ return new_rd_Proj(dbgi, new_pred, mode_Iu, pn_ia32_Div_mod_res);
case pn_DivMod_X_regular:
return new_rd_Jmp(dbgi, block);
case pn_DivMod_X_except:
set_ia32_exc_label(new_pred, 1);
- return new_rd_Proj(dbgi, block, new_pred, mode_X, pn_ia32_Div_X_exc);
+ return new_rd_Proj(dbgi, new_pred, mode_X, pn_ia32_Div_X_exc);
default:
break;
}
*/
static ir_node *gen_Proj_CopyB(ir_node *node)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *pred = get_Proj_pred(node);
ir_node *new_pred = be_transform_node(pred);
dbg_info *dbgi = get_irn_dbg_info(node);
switch (proj) {
case pn_CopyB_M_regular:
if (is_ia32_CopyB_i(new_pred)) {
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_ia32_CopyB_i_M);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_ia32_CopyB_i_M);
} else if (is_ia32_CopyB(new_pred)) {
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_ia32_CopyB_M);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_ia32_CopyB_M);
}
break;
default:
*/
static ir_node *gen_Proj_Quot(ir_node *node)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *pred = get_Proj_pred(node);
ir_node *new_pred = be_transform_node(pred);
dbg_info *dbgi = get_irn_dbg_info(node);
switch (proj) {
case pn_Quot_M:
if (is_ia32_xDiv(new_pred)) {
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_ia32_xDiv_M);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_ia32_xDiv_M);
} else if (is_ia32_vfdiv(new_pred)) {
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_ia32_vfdiv_M);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_ia32_vfdiv_M);
}
break;
case pn_Quot_res:
if (is_ia32_xDiv(new_pred)) {
- return new_rd_Proj(dbgi, block, new_pred, mode_xmm, pn_ia32_xDiv_res);
+ return new_rd_Proj(dbgi, new_pred, mode_xmm, pn_ia32_xDiv_res);
} else if (is_ia32_vfdiv(new_pred)) {
- return new_rd_Proj(dbgi, block, new_pred, mode_vfp, pn_ia32_vfdiv_res);
+ return new_rd_Proj(dbgi, new_pred, mode_vfp, pn_ia32_vfdiv_res);
}
break;
case pn_Quot_X_regular:
}
SET_IA32_ORIG_NODE(load, node);
- return new_r_Proj(block, load, mode_Iu, pn_ia32_Load_res);
+ return new_r_Proj(load, mode_Iu, pn_ia32_Load_res);
}
/**
}
SET_IA32_ORIG_NODE(load, node);
- return new_r_Proj(block, load, mode_Iu, pn_ia32_Load_res);
+ return new_r_Proj(load, mode_Iu, pn_ia32_Load_res);
}
/**
SET_IA32_ORIG_NODE(new_node, node);
be_dep_on_frame(new_node);
- return new_r_Proj(block, new_node, mode_M, pn_ia32_Prefetch_M);
+ return new_r_Proj(new_node, mode_M, pn_ia32_Prefetch_M);
}
/**
/* bsf x */
if (get_irn_mode(real) != mode_T) {
set_irn_mode(real, mode_T);
- bsf = new_r_Proj(block, real, mode_Iu, pn_ia32_res);
+ bsf = new_r_Proj(real, mode_Iu, pn_ia32_res);
}
- flag = new_r_Proj(block, real, mode_b, pn_ia32_flags);
+ flag = new_r_Proj(real, mode_b, pn_ia32_flags);
/* sete */
set = new_bd_ia32_Setcc(dbgi, block, flag, pn_Cmp_Eq);
return new_node;
case ir_bk_inport:
if (get_Proj_proj(proj) == pn_Builtin_1_result) {
- return new_r_Proj(get_nodes_block(new_node),
- new_node, get_irn_mode(proj), pn_ia32_Inport_res);
+ return new_r_Proj(new_node, get_irn_mode(proj), pn_ia32_Inport_res);
} else {
assert(get_Proj_proj(proj) == pn_Builtin_M);
- return new_r_Proj(get_nodes_block(new_node),
- new_node, mode_M, pn_ia32_Inport_M);
+ return new_r_Proj(new_node, mode_M, pn_ia32_Inport_M);
}
case ir_bk_inner_trampoline:
if (get_Proj_proj(proj) == pn_Builtin_1_result) {
*/
static ir_node *gen_Proj_be_Call(ir_node *node)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *call = get_Proj_pred(node);
ir_node *new_call = be_transform_node(call);
dbg_info *dbgi = get_irn_dbg_info(node);
ir_node *res;
if (proj == pn_be_Call_M_regular) {
- return new_rd_Proj(dbgi, block, new_call, mode_M, n_ia32_Call_mem);
+ return new_rd_Proj(dbgi, new_call, mode_M, n_ia32_Call_mem);
}
/* transform call modes */
if (mode_is_data(mode)) {
assert(i < n_outs);
}
- res = new_rd_Proj(dbgi, block, new_call, mode, proj);
+ res = new_rd_Proj(dbgi, new_call, mode, proj);
/* TODO arch_set_irn_register() only operates on Projs, need variant with index */
switch (proj) {
case pn_Bound_X_regular:
new_node = be_transform_node(pred);
block = get_nodes_block(new_node);
- return new_r_Proj(block, new_node, mode_X, pn_ia32_Jcc_true);
+ return new_r_Proj(new_node, mode_X, pn_ia32_Jcc_true);
case pn_Bound_X_except:
new_node = be_transform_node(pred);
block = get_nodes_block(new_node);
- return new_r_Proj(block, new_node, mode_X, pn_ia32_Jcc_false);
+ return new_r_Proj(new_node, mode_X, pn_ia32_Jcc_false);
case pn_Bound_res:
return be_transform_node(get_Bound_index(pred));
default:
ir_mode *mode = get_irn_mode(node);
ir_node *pred = get_Proj_pred(node);
ir_node *new_pred = be_transform_node(pred);
- ir_node *block = get_nodes_block(new_pred);
long pos = get_Proj_proj(node);
if (mode == mode_M) {
panic("unexpected proj mode at ASM");
}
- return new_r_Proj(block, new_pred, mode, pos);
+ return new_r_Proj(new_pred, mode, pos);
}
/**
ir_mode *mode = get_irn_mode(node);
if (ia32_mode_needs_gp_reg(mode)) {
ir_node *new_pred = be_transform_node(pred);
- ir_node *block = be_transform_node(get_nodes_block(node));
- ir_node *new_proj = new_r_Proj(block, new_pred,
- mode_Iu, get_Proj_proj(node));
+ ir_node *new_proj = new_r_Proj(new_pred, mode_Iu,
+ get_Proj_proj(node));
new_proj->node_nr = node->node_nr;
return new_proj;
}
}
block = get_nodes_block(node);
- in[0] = new_r_Proj(block, node, arch_register_class_mode(cls), i);
+ in[0] = new_r_Proj(node, arch_register_class_mode(cls), i);
if (last_keep != NULL) {
be_Keep_add_node(last_keep, cls, in[0]);
} else {
ir_node *block = get_nodes_block(call);
ir_node *frame = get_irg_frame(current_ir_graph);
ir_node *old_mem = be_get_Proj_for_pn(call, pn_ia32_Call_M);
- ir_node *call_mem = new_r_Proj(block, call, mode_M, pn_ia32_Call_M);
+ ir_node *call_mem = new_r_Proj(call, mode_M, pn_ia32_Call_M);
ir_node *vfst, *xld, *new_mem;
/* store st(0) on stack */
set_ia32_op_type(xld, ia32_AddrModeS);
set_ia32_use_frame(xld);
- new_res = new_r_Proj(block, xld, mode, pn_ia32_xLoad_res);
- new_mem = new_r_Proj(block, xld, mode_M, pn_ia32_xLoad_M);
+ new_res = new_r_Proj(xld, mode, pn_ia32_xLoad_res);
+ new_mem = new_r_Proj(xld, mode_M, pn_ia32_xLoad_M);
if (old_mem != NULL) {
edges_reroute(old_mem, new_mem, current_ir_graph);
set_ia32_am_sc(vfld, get_ia32_am_sc(n));
set_ia32_ls_mode(vfld, get_ia32_ls_mode(n));
- rproj = new_r_Proj(block, vfld, get_ia32_ls_mode(vfld), pn_ia32_vfld_res);
- mproj = new_r_Proj(block, vfld, mode_M, pn_ia32_vfld_M);
+ rproj = new_r_Proj(vfld, get_ia32_ls_mode(vfld), pn_ia32_vfld_res);
+ mproj = new_r_Proj(vfld, mode_M, pn_ia32_vfld_M);
mem = get_irn_Proj_for_mode(n, mode_M);
assert(mem && "Store memory not found");
attr->load_store_mode = mode_Iu;
attr->tv = new_tarval_from_long(i * 4, mode_Is);
- mm[i] = new_r_Proj(irg, block, store, mode_M, pn_Store_M);
+ mm[i] = new_r_Proj(irg, store, mode_M, pn_Store_M);
}
*/
fp_save_offset - initial_frame_size);
panic("FIXME register requirement with ignore");
- fp = new_r_Proj(block, load, mode_Iu, pn_mips_lw_res);
- *mem = new_r_Proj(block, load, mode_Iu, pn_mips_lw_M);
+ fp = new_r_Proj(load, mode_Iu, pn_mips_lw_res);
+ *mem = new_r_Proj(load, mode_Iu, pn_mips_lw_M);
arch_set_irn_register(fp, &mips_gp_regs[REG_FP]);
be_abi_reg_map_set(reg_map, &mips_gp_regs[REG_FP], fp);
case iro_Div:
switch (pn) {
case pn_Div_M:
- return new_rd_Proj(dbgi, block, new_div, mode_M, pn_mips_div_M);
+ return new_rd_Proj(dbgi, new_div, mode_M, pn_mips_div_M);
case pn_Div_res:
- proj = new_rd_Proj(dbgi, block, new_div, mode_M, pn_mips_div_lohi);
+ proj = new_rd_Proj(dbgi, new_div, mode_M, pn_mips_div_lohi);
return new_bd_mips_mflo(dbgi, block, proj);
default:
break;
case iro_Mod:
switch (pn) {
case pn_Mod_M:
- return new_rd_Proj(dbgi, block, new_div, mode_M, pn_mips_div_M);
+ return new_rd_Proj(dbgi, new_div, mode_M, pn_mips_div_M);
case pn_Mod_res:
- proj = new_rd_Proj(dbgi, block, new_div, mode_M, pn_mips_div_lohi);
+ proj = new_rd_Proj(dbgi, new_div, mode_M, pn_mips_div_lohi);
return new_bd_mips_mfhi(dbgi, block, proj);
default:
break;
case iro_DivMod:
switch (pn) {
case pn_Div_M:
- return new_rd_Proj(dbgi, block, new_div, mode_M, pn_mips_div_M);
+ return new_rd_Proj(dbgi, new_div, mode_M, pn_mips_div_M);
case pn_DivMod_res_div:
- proj = new_rd_Proj(dbgi, block, new_div, mode_M, pn_mips_div_lohi);
+ proj = new_rd_Proj(dbgi, new_div, mode_M, pn_mips_div_lohi);
return new_bd_mips_mflo(dbgi, block, proj);
case pn_DivMod_res_mod:
- proj = new_rd_Proj(dbgi, block, new_div, mode_M, pn_mips_div_lohi);
+ proj = new_rd_Proj(dbgi, new_div, mode_M, pn_mips_div_lohi);
return new_bd_mips_mfhi(dbgi, block, proj);
default:
break;
assert(get_irn_mode(node) != mode_T);
if (mode_needs_gp_reg(get_irn_mode(node))) {
ir_node *new_pred = be_transform_node(pred);
- ir_node *block = be_transform_node(get_nodes_block(node));
long pn = get_Proj_proj(node);
- return new_rd_Proj(dbgi, block, new_pred, mode_Iu, pn);
+ return new_rd_Proj(dbgi, new_pred, mode_Iu, pn);
}
break;
}
attr->modes.load_store_mode = mode_Iu;
attr->tv = new_tarval_from_long(0, mode_Iu);
- proj = new_rd_Proj(dbg, block, load, mode_Iu, pn_Load_res);
+ proj = new_rd_Proj(dbg, load, mode_Iu, pn_Load_res);
switchjmp = new_bd_mips_SwitchJump(dbg, block, proj, mode_T);
attr = get_mips_attr(switchjmp);
attr->modes.load_store_mode = mode_Iu;
attr->tv = new_tarval_from_long(i * 4, mode_Iu);
- ld[i] = new_rd_Proj(dbg, irg, new_bl, load, mode_Iu, pn_Load_res);
+ ld[i] = new_rd_Proj(dbg, irg, load, mode_Iu, pn_Load_res);
}
/* create 4 parallel stores */
attr->modes.load_store_mode = mode_Iu;
attr->tv = new_tarval_from_long(i * 4, mode_Iu);
- mm[i] = new_rd_Proj(dbg, irg, new_bl, store, mode_M, pn_Store_M);
+ mm[i] = new_rd_Proj(dbg, irg, store, mode_M, pn_Store_M);
}
mem = new_r_Sync(irg, new_bl, 4, mm);
result = mem;
attr->modes.load_store_mode = mode;
attr->tv = new_tarval_from_long(offset, mode_Iu);
- projv = new_rd_Proj(dbg, irg, block, load, mode, pn_Load_res);
+ projv = new_rd_Proj(dbg, irg, load, mode, pn_Load_res);
store = new_bd_mips_store_r(dbg, block, mem, dst, projv, mode_T);
attr = get_mips_attr(store);
attr->modes.load_store_mode = mode;
attr->tv = new_tarval_from_long(offset, mode_Iu);
- mm[n] = new_rd_Proj(dbg, irg, block, store, mode_M, pn_Store_M);
+ mm[n] = new_rd_Proj(dbg, irg, store, mode_M, pn_Store_M);
n++;
}
load = new_bd_mips_lw(env->dbg, env->block, ptr, mem, ent, 0);
- proj = new_rd_Proj(env->dbg, env->block, load, mode_Iu, pn_mips_lw_res);
+ proj = new_rd_Proj(env->dbg, load, mode_Iu, pn_mips_lw_res);
if (sched_point) {
sched_add_after(sched_point, load);
set_ppc32_frame_entity(store, be_get_frame_entity(node));
- proj = new_rd_Proj(dbg, block, store, mode_M, pn_Store_M);
+ proj = new_rd_Proj(dbg, store, mode_M, pn_Store_M);
if (sched_is_scheduled(node)) {
sched_add_after(sched_prev(node), store);
set_ppc32_frame_entity(load, be_get_frame_entity(node));
- proj = new_rd_Proj(dbg, block, load, mode, pn_Load_res);
+ proj = new_rd_Proj(dbg, load, mode, pn_Load_res);
if (sched_is_scheduled(node)) {
sched_add_after(sched_prev(node), load);
}
if (proj_div == NULL)
- proj_div = new_rd_Proj(env->dbg, env->block, div_result, get_irn_mode(proj_mod), pn_DivMod_res_div);
+ proj_div = new_rd_Proj(env->dbg, div_result, get_irn_mode(proj_mod), pn_DivMod_res_div);
if (proj_mod!=NULL){
ir_node *mul_result;
}
- proj_div = new_rd_Proj(env->dbg, env->block, div_result, res_mode, pn_DivMod_res_div);
+ proj_div = new_rd_Proj(env->dbg, div_result, res_mode, pn_DivMod_res_div);
mul_result = new_bd_ppc32_Mullw(env->dbg, env->block, proj_div, op2, res_mode);
mod_result = new_bd_ppc32_Sub(env->dbg, env->block, op1, mul_result, res_mode);
ir_node* in[1];
set_ppc32_offset_mode(andi, ppc32_ao_Lo16);
set_ppc32_constant_tarval(andi, new_tarval_from_long(mask, mode_Is));
- in[0] = new_rd_Proj(env->dbg, env->block, andi, env->mode,1);
+ in[0] = new_rd_Proj(env->dbg, andi, env->mode,1);
be_new_Keep(env->block, 1, in);
- return new_rd_Proj(env->dbg, env->block, andi, env->mode,0);
+ return new_rd_Proj(env->dbg, andi, env->mode,0);
}
/**
{
ir_node *proj_load, *extsb_node;
load = new_bd_ppc32_Lbz(env->dbg, env->block, loadptr, get_Load_mem(node));
- proj_load = new_rd_Proj(env->dbg, env->block, load, mode, pn_Load_res);
+ proj_load = new_rd_Proj(env->dbg, load, mode, pn_Load_res);
extsb_node = new_bd_ppc32_Extsb(env->dbg, env->block, proj_load, mode);
exchange(get_succ_Proj(env->irn, pn_Load_res), extsb_node);
break;
load = new_bd_ppc32_Lwz(env->dbg, env->block, src, mem);
set_ppc32_constant_tarval(load, offset0);
set_ppc32_offset_mode(load, ppc32_ao_None);
- mem = new_rd_Proj(env->dbg, env->block, load, mode_M, pn_Load_M);
- res = new_rd_Proj(env->dbg, env->block, load, mode_Is, pn_Load_res);
+ mem = new_rd_Proj(env->dbg, load, mode_M, pn_Load_M);
+ res = new_rd_Proj(env->dbg, load, mode_Is, pn_Load_res);
store = new_bd_ppc32_Stw(env->dbg, env->block, dest, res, mem);
set_ppc32_constant_tarval(store, offset0);
set_ppc32_offset_mode(store, ppc32_ao_None);
- mem = new_rd_Proj(env->dbg, env->block, store, mode_M, pn_Store_M);
+ mem = new_rd_Proj(env->dbg, store, mode_M, pn_Store_M);
if (size/4==2)
{
load = new_bd_ppc32_Lwz(env->dbg, env->block, src, mem);
set_ppc32_constant_tarval(load, offset4);
set_ppc32_offset_mode(load, ppc32_ao_None);
- mem = new_rd_Proj(env->dbg, env->block, load, mode_M, pn_Load_M);
- res = new_rd_Proj(env->dbg, env->block, load, mode_Is, pn_Load_res);
+ mem = new_rd_Proj(env->dbg, load, mode_M, pn_Load_M);
+ res = new_rd_Proj(env->dbg, load, mode_Is, pn_Load_res);
store = new_bd_ppc32_Stw(env->dbg, env->block, dest, res, mem);
set_ppc32_constant_tarval(store, offset4);
set_ppc32_offset_mode(store, ppc32_ao_None);
- mem = new_rd_Proj(env->dbg, env->block, store, mode_M, pn_Store_M);
+ mem = new_rd_Proj(env->dbg, store, mode_M, pn_Store_M);
offset = 8;
}
mtctrnode = new_bd_ppc32_Mtctr(env->dbg, env->block, ornode, mode_Is);
store = new_bd_ppc32_LoopCopy(env->dbg, env->block, src, dest, mtctrnode, mem, mode_T);
- in[0] = new_rd_Proj(env->dbg, env->block, store, mode_Is, 1); // src
- in[1] = new_rd_Proj(env->dbg, env->block, store, mode_Is, 2); // dest
- in[2] = new_rd_Proj(env->dbg, env->block, store, mode_Is, 4); // temp
+ in[0] = new_rd_Proj(env->dbg, store, mode_Is, 1); // src
+ in[1] = new_rd_Proj(env->dbg, store, mode_Is, 2); // dest
+ in[2] = new_rd_Proj(env->dbg, store, mode_Is, 4); // temp
be_new_Keep(env->block, 3, in);
- in[0] = new_rd_Proj(env->dbg, env->block, store, mode_Is, 3); // ctr
+ in[0] = new_rd_Proj(env->dbg, store, mode_Is, 3); // ctr
be_new_Keep(env->block, 1, in);
- mem = new_rd_Proj(env->dbg, env->block, store, mode_M, 0);
+ mem = new_rd_Proj(env->dbg, store, mode_M, 0);
offset = 4;
}
load = new_bd_ppc32_Lhz(env->dbg, env->block, src, mem);
set_ppc32_constant_tarval(load, offset_tarval);
set_ppc32_offset_mode(load, ppc32_ao_None);
- mem = new_rd_Proj(env->dbg, env->block, load, mode_M, pn_Load_M);
- res = new_rd_Proj(env->dbg, env->block, load, mode_Is, pn_Load_res);
+ mem = new_rd_Proj(env->dbg, load, mode_M, pn_Load_M);
+ res = new_rd_Proj(env->dbg, load, mode_Is, pn_Load_res);
store = new_bd_ppc32_Sth(env->dbg, env->block, dest, res, mem);
set_ppc32_constant_tarval(store, offset_tarval);
set_ppc32_offset_mode(store, ppc32_ao_None);
- mem = new_rd_Proj(env->dbg, env->block, store, mode_M, pn_Store_M);
+ mem = new_rd_Proj(env->dbg, store, mode_M, pn_Store_M);
offset += 2;
}
load = new_bd_ppc32_Lbz(env->dbg, env->block, src, mem);
set_ppc32_constant_tarval(load, offset_tarval);
set_ppc32_offset_mode(load, ppc32_ao_None);
- mem = new_rd_Proj(env->dbg, env->block, load, mode_M, pn_Load_M);
- res = new_rd_Proj(env->dbg, env->block, load, mode_Is, pn_Load_res);
+ mem = new_rd_Proj(env->dbg, load, mode_M, pn_Load_M);
+ res = new_rd_Proj(env->dbg, load, mode_Is, pn_Load_res);
store = new_bd_ppc32_Stb(env->dbg, env->block, dest, res, mem);
set_ppc32_constant_tarval(store, offset_tarval);
set_ppc32_offset_mode(store, ppc32_ao_None);
- // mem = new_rd_Proj(env->dbg, env->irg, env->block, store, mode_M, pn_Store_M);
+ // mem = new_rd_Proj(env->dbg, env->irg, store, mode_M, pn_Store_M);
}
return store;
#if 0
}
#endif
- return new_rd_Proj(env->dbg, env->block, load, mode, pn_Load_res);
+ return new_rd_Proj(env->dbg, load, mode, pn_Load_res);
}
default:
node = new_bd_ppc32_Lwz(env->dbg, env->block, node_addis, new_NoMem());
set_ppc32_symconst_ident(node, id_symconst);
set_ppc32_offset_mode(node, ppc32_ao_Lo16);
- node = new_rd_Proj(env->dbg, env->block, node, env->mode, pn_Load_res);
+ node = new_rd_Proj(env->dbg, node, env->mode, pn_Load_res);
}
#endif
break;
method_ent = new_entity(get_glob_type(), new_id_from_str(funcname), method_type);
callee = new_rd_SymConst_addr_ent(env->dbg, env->irg, mode_P_code, method_ent, method_type);
call = new_rd_Call(env->dbg, env->block, memory, callee, 1, in, method_type);
- call_results = new_rd_Proj(env->dbg, env->block, call, mode_T, pn_Call_T_result);
- memory = new_rd_Proj(env->dbg, env->block, call, mode_M, pn_Call_M);
+ call_results = new_rd_Proj(env->dbg, call, mode_T, pn_Call_T_result);
+ memory = new_rd_Proj(env->dbg, call, mode_M, pn_Call_M);
- return new_rd_Proj(env->dbg, env->block, call_results, to_mode, 0);
+ return new_rd_Proj(env->dbg, call_results, to_mode, 0);
}
/**
ir_node *fctiw = new_bd_ppc32_fCtiw(env->dbg, env->block, op, from_mode);
ir_node *stfd = new_bd_ppc32_Stfd(env->dbg, env->block, get_irg_frame(env->irg),
fctiw, memory);
- ir_node *storememproj = new_rd_Proj(env->dbg, env->block, stfd, mode_M, pn_Store_M);
+ ir_node *storememproj = new_rd_Proj(env->dbg, stfd, mode_M, pn_Store_M);
ir_node *lwz = new_bd_ppc32_Lwz(env->dbg, env->block, get_irg_frame(env->irg),
storememproj);
set_ppc32_frame_entity(stfd, memslot);
set_ppc32_offset_mode(stfd, ppc32_ao_Lo16); // TODO: only allows a 16-bit offset on stack
set_ppc32_frame_entity(lwz, memslot);
set_ppc32_offset_mode(stfd, ppc32_ao_Lo16); // TODO: only allows a 16-bit offset on stack
- memory = new_rd_Proj(env->dbg, env->block, lwz, mode_M, pn_Store_M);
- res = new_rd_Proj(env->dbg, env->block, lwz, to_mode, pn_Load_res);
+ memory = new_rd_Proj(env->dbg, lwz, mode_M, pn_Store_M);
+ res = new_rd_Proj(env->dbg, lwz, to_mode, pn_Load_res);
}
else
sched_add_after(sched_point, load);
sched_remove(node);
- proj = new_rd_Proj(dbgi, block, load, mode, pn_sparc_Load_res);
+ proj = new_rd_Proj(dbgi, load, mode, pn_sparc_Load_res);
reg = arch_get_irn_register(node);
arch_set_irn_register(proj, reg);
*/
static ir_node *gen_Proj_Load(ir_node *node)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *load = get_Proj_pred(node);
ir_node *new_load = be_transform_node(load);
dbg_info *dbgi = get_irn_dbg_info(node);
case iro_sparc_Load:
/* handle all gp loads equal: they have the same proj numbers. */
if (proj == pn_Load_res) {
- return new_rd_Proj(dbgi, block, new_load, mode_Iu, pn_sparc_Load_res);
+ return new_rd_Proj(dbgi, new_load, mode_Iu, pn_sparc_Load_res);
} else if (proj == pn_Load_M) {
- return new_rd_Proj(dbgi, block, new_load, mode_M, pn_sparc_Load_M);
+ return new_rd_Proj(dbgi, new_load, mode_M, pn_sparc_Load_M);
}
break;
/*
*/
static ir_node *gen_Proj_be_AddSP(ir_node *node)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *pred = get_Proj_pred(node);
ir_node *new_pred = be_transform_node(pred);
dbg_info *dbgi = get_irn_dbg_info(node);
if (proj == pn_be_AddSP_sp) {
// TODO: check for correct pn_sparc_* flags
- ir_node *res = new_rd_Proj(dbgi, block, new_pred, mode_Iu,
+ ir_node *res = new_rd_Proj(dbgi, new_pred, mode_Iu,
pn_sparc_SubSP_stack);
arch_set_irn_register(res, &sparc_gp_regs[REG_SP]);
return res;
} else if (proj == pn_be_AddSP_res) {
// TODO: check for correct pn_sparc_* flags
- return new_rd_Proj(dbgi, block, new_pred, mode_Iu, pn_sparc_SubSP_stack);
+ return new_rd_Proj(dbgi, new_pred, mode_Iu, pn_sparc_SubSP_stack);
} else if (proj == pn_be_AddSP_M) {
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_sparc_SubSP_M);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_sparc_SubSP_M);
}
panic("Unsupported Proj from AddSP");
*/
static ir_node *gen_Proj_be_SubSP(ir_node *node)
{
- ir_node *block = be_transform_node(get_nodes_block(node));
ir_node *pred = get_Proj_pred(node);
ir_node *new_pred = be_transform_node(pred);
dbg_info *dbgi = get_irn_dbg_info(node);
long proj = get_Proj_proj(node);
if (proj == pn_be_SubSP_sp) {
- ir_node *res = new_rd_Proj(dbgi, block, new_pred, mode_Iu,
+ ir_node *res = new_rd_Proj(dbgi, new_pred, mode_Iu,
pn_sparc_AddSP_stack);
arch_set_irn_register(res, &sparc_gp_regs[REG_SP]);
return res;
} else if (proj == pn_be_SubSP_M) {
- return new_rd_Proj(dbgi, block, new_pred, mode_M, pn_sparc_AddSP_M);
+ return new_rd_Proj(dbgi, new_pred, mode_M, pn_sparc_AddSP_M);
}
panic("Unsupported Proj from SubSP");
ir_node *new_pred = be_transform_node(pred);
ir_mode *mode = get_irn_mode(node);
if (mode_needs_gp_reg(mode)) {
- ir_node *block = be_transform_node(get_nodes_block(node));
- ir_node *new_proj = new_r_Proj(block, new_pred, mode_Iu, get_Proj_proj(node));
+ ir_node *new_proj = new_r_Proj(new_pred, mode_Iu, get_Proj_proj(node));
new_proj->node_nr = node->node_nr;
return new_proj;
}
adr = new_r_SymConst(irg, mode_P_code, sym, symconst_addr_ent);
call = new_r_Call(first_block, get_irg_no_mem(irg), adr, 0, NULL, get_entity_type(ent));
- new_mem = new_r_Proj(first_block, call, mode_M, pn_Call_M);
+ new_mem = new_r_Proj(call, mode_M, pn_Call_M);
initial_mem = get_irg_initial_mem(irg);
edges_reroute(initial_mem, new_mem, irg);
return new_rd_Const(db, irg, new_tarval_from_long(value, mode));
} /* new_bd_Const_long */
-static ir_node *new_bd_defaultProj(dbg_info *db, ir_node *block, ir_node *arg,
- long max_proj)
+static ir_node *new_bd_defaultProj(dbg_info *db, ir_node *arg, long max_proj)
{
ir_node *res;
assert(arg->op == op_Cond);
arg->attr.cond.default_proj = max_proj;
- res = new_rd_Proj(db, block, arg, mode_X, max_proj);
+ res = new_rd_Proj(db, arg, mode_X, max_proj);
return res;
} /* new_bd_defaultProj */
return new_rd_Const(db, irg, new_tarval_from_long(value, mode));
} /* new_rd_Const_long */
-ir_node *new_rd_defaultProj(dbg_info *db, ir_node *block, ir_node *arg, long max_proj)
+ir_node *new_rd_defaultProj(dbg_info *db, ir_node *arg, long max_proj)
{
- ir_node *res;
- ir_graph *rem = current_ir_graph;
-
- current_ir_graph = get_Block_irg(block);
- res = new_bd_defaultProj(db, block, arg, max_proj);
- current_ir_graph = rem;
-
- return res;
+ return new_bd_defaultProj(db, arg, max_proj);
} /* new_rd_defaultProj */
ir_node *new_rd_simpleSel(dbg_info *db, ir_node *block, ir_node *store,
{
return new_rd_Sync(NULL, block, arity, in);
}
-ir_node *new_r_defaultProj(ir_node *block, ir_node *arg, long max_proj)
+ir_node *new_r_defaultProj(ir_node *arg, long max_proj)
{
- return new_rd_defaultProj(NULL, block, arg, max_proj);
+ return new_rd_defaultProj(NULL, arg, max_proj);
}
ir_node *new_r_Bad(ir_graph *irg)
{
ir_node *pred_b = get_Proj_pred(b);
if (pred_a == pred_b) {
dbg_info *dbgi = get_irn_dbg_info(n);
- ir_node *block = get_nodes_block(pred_a);
pn_Cmp pn_a = get_Proj_proj(a);
pn_Cmp pn_b = get_Proj_proj(b);
/* yes, we can simply calculate with pncs */
pn_Cmp new_pnc = pn_a & pn_b;
- return new_rd_Proj(dbgi, block, pred_a, mode_b, new_pnc);
+ return new_rd_Proj(dbgi, pred_a, mode_b, new_pnc);
}
}
if (is_Or(a)) {
ir_node *pred_b = get_Proj_pred(b);
if (pred_a == pred_b) {
dbg_info *dbgi = get_irn_dbg_info(n);
- ir_node *block = get_nodes_block(pred_a);
pn_Cmp pn_a = get_Proj_proj(a);
pn_Cmp pn_b = get_Proj_proj(b);
/* yes, we can simply calculate with pncs */
pn_Cmp new_pnc = pn_a ^ pn_b;
- return new_rd_Proj(dbgi, block, pred_a, mode_b, new_pnc);
+ return new_rd_Proj(dbgi, pred_a, mode_b, new_pnc);
}
}
if (mode == mode_b && is_Proj(a)) {
ir_node *a_pred = get_Proj_pred(a);
if (is_Cmp(a_pred)) {
- ir_node *cmp_block = get_nodes_block(a_pred);
/* We negate a Cmp. The Cmp has the negated result anyways! */
- n = new_r_Proj(cmp_block, get_Proj_pred(a),
+ n = new_r_Proj(get_Proj_pred(a),
mode_b, get_negated_pnc(get_Proj_proj(a), mode_b));
DBG_OPT_ALGSIM0(oldn, n, FS_OPT_NOT_CMP);
return n;
/* create a new compare */
n = new_rd_Cmp(get_irn_dbg_info(n), block, left, right);
- proj = new_rd_Proj(get_irn_dbg_info(proj), block, n, get_irn_mode(proj), proj_nr);
+ proj = new_rd_Proj(get_irn_dbg_info(proj), n, get_irn_mode(proj), proj_nr);
}
return proj;
ir_node *pred_b = get_Proj_pred(b);
if (pred_a == pred_b) {
dbg_info *dbgi = get_irn_dbg_info(n);
- ir_node *block = get_nodes_block(pred_a);
pn_Cmp pn_a = get_Proj_proj(a);
pn_Cmp pn_b = get_Proj_proj(b);
/* yes, we can simply calculate with pncs */
pn_Cmp new_pnc = pn_a | pn_b;
- return new_rd_Proj(dbgi, block, pred_a, mode_b, new_pnc);
+ return new_rd_Proj(dbgi, pred_a, mode_b, new_pnc);
}
}
/* Mux(x, 0, y) => Mux(x, y, 0) */
pn_Cmp pnc = get_Proj_proj(sel);
- sel = new_r_Proj(get_nodes_block(cmp), cmp, mode_b,
+ sel = new_r_Proj(cmp, mode_b,
get_negated_pnc(pnc, get_irn_mode(get_Cmp_left(cmp))));
n = new_rd_Mux(get_irn_dbg_info(n), get_nodes_block(n), sel, t, f, mode);
tmp = t;
cnst = new_r_Const_long(irg, mode_Iu, get_mode_size_bytes(mode_Iu) * id);
offset = new_r_Add(bb, address, cnst, get_modeP_data());
load = new_r_Load(bb, unknown, offset, mode_Iu, 0);
- projm = new_r_Proj(bb, load, mode_M, pn_Load_M);
- proji = new_r_Proj(bb, load, mode_Iu, pn_Load_res);
+ projm = new_r_Proj(load, mode_M, pn_Load_M);
+ proji = new_r_Proj(load, mode_Iu, pn_Load_res);
cnst = new_r_Const_long(irg, mode_Iu, 1);
add = new_r_Add(bb, proji, cnst, mode_Iu);
store = new_r_Store(bb, projm, offset, add, 0);
- projm = new_r_Proj(bb, store, mode_M, pn_Store_M);
+ projm = new_r_Proj(store, mode_M, pn_Store_M);
set_irn_link(bb, projm);
set_irn_link(projm, load);
}
ins[3] = new_r_Const_long(irg, mode_Iu, n_blocks);
call = new_r_Call(bb, get_irg_initial_mem(irg), symconst, 4, ins, init_type);
- ret = new_r_Return(bb, new_r_Proj(bb, call, mode_M, pn_Call_M), 0, NULL);
+ ret = new_r_Return(bb, new_r_Proj(call, mode_M, pn_Call_M), 0, NULL);
mature_immBlock(bb);
add_immBlock_pred(get_irg_end_block(irg), ret);
if (is_compound_type(tp)) {
ir_node *arg = get_irg_args(irg);
- arg = new_r_Proj(get_nodes_block(arg), arg, mode_P_data, env.first_hidden + k);
+ arg = new_r_Proj(arg, mode_P_data, env.first_hidden + k);
++k;
if (is_Unknown(pred)) {
pred,
tp
);
- mem = new_r_Proj(bl, copy, mode_M, pn_CopyB_M);
+ mem = new_r_Proj(copy, mode_M, pn_CopyB_M);
}
}
if (lp->flags & LF_RETURN_HIDDEN) {
add = new_r_Add(block, addr_src, addr_const, addr_mode);
load = new_r_Load(block, mem, add, mode, 0);
- load_res = new_r_Proj(block, load, mode, pn_Load_res);
- load_mem = new_r_Proj(block, load, mode_M, pn_Load_M);
+ load_res = new_r_Proj(load, mode, pn_Load_res);
+ load_mem = new_r_Proj(load, mode_M, pn_Load_M);
addr_const = new_r_Const_long(irg, mode_Iu, offset);
add = new_r_Add(block, addr_dst, addr_const, addr_mode);
store = new_r_Store(block, load_mem, add, load_res, 0);
- store_mem = new_r_Proj(block, store, mode_M, pn_Store_M);
+ store_mem = new_r_Proj(store, mode_M, pn_Store_M);
mem = store_mem;
}
/* create two loads */
dbg = get_irn_dbg_info(node);
low = new_rd_Load(dbg, block, mem, low, low_mode, volatility);
- proj = new_r_Proj(block, low, mode_M, pn_Load_M);
+ proj = new_r_Proj(low, mode_M, pn_Load_M);
high = new_rd_Load(dbg, block, proj, high, mode, volatility);
idx = get_irn_idx(node);
break;
case pn_Load_res: /* Result of load operation. */
assert(idx < env->n_entries);
- env->entries[idx]->low_word = new_r_Proj(block, low, low_mode, pn_Load_res);
- env->entries[idx]->high_word = new_r_Proj(block, high, mode, pn_Load_res);
+ env->entries[idx]->low_word = new_r_Proj(low, low_mode, pn_Load_res);
+ env->entries[idx]->high_word = new_r_Proj(high, mode, pn_Load_res);
break;
default:
assert(0 && "unexpected Proj number");
/* create two Stores */
dbg = get_irn_dbg_info(node);
low = new_rd_Store(dbg, block, mem, low, entry->low_word, volatility);
- proj = new_r_Proj(block, low, mode_M, pn_Store_M);
+ proj = new_r_Proj(low, mode_M, pn_Store_M);
high = new_rd_Store(dbg, block, proj, high, entry->high_word, volatility);
idx = get_irn_idx(node);
irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, env);
call = new_rd_Call(dbg, block, get_Div_mem(node), irn, 4, in, mtp);
set_irn_pinned(call, get_irn_pinned(node));
- irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
+ irn = new_r_Proj(call, mode_T, pn_Call_T_result);
for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
switch (get_Proj_proj(proj)) {
case pn_Div_res: /* Result of computation. */
idx = get_irn_idx(proj);
assert(idx < env->n_entries);
- env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
- env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
+ env->entries[idx]->low_word = new_r_Proj(irn, env->params->low_unsigned, 0);
+ env->entries[idx]->high_word = new_r_Proj(irn, mode, 1);
break;
default:
assert(0 && "unexpected Proj number");
irn = get_intrinsic_address(mtp, get_irn_op(node), opmode, opmode, env);
call = new_rd_Call(dbg, block, get_Mod_mem(node), irn, 4, in, mtp);
set_irn_pinned(call, get_irn_pinned(node));
- irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
+ irn = new_r_Proj(call, mode_T, pn_Call_T_result);
for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
switch (get_Proj_proj(proj)) {
case pn_Mod_res: /* Result of computation. */
idx = get_irn_idx(proj);
assert(idx < env->n_entries);
- env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
- env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
+ env->entries[idx]->low_word = new_r_Proj(irn, env->params->low_unsigned, 0);
+ env->entries[idx]->high_word = new_r_Proj(irn, mode, 1);
break;
default:
assert(0 && "unexpected Proj number");
irn = get_intrinsic_address(mtp, op_Div, opmode, opmode, env);
callDiv = new_rd_Call(dbg, block, mem, irn, 4, in, mtp);
set_irn_pinned(callDiv, get_irn_pinned(node));
- resDiv = new_r_Proj(block, callDiv, mode_T, pn_Call_T_result);
+ resDiv = new_r_Proj(callDiv, mode_T, pn_Call_T_result);
} /* if */
if (flags & 2) {
if (flags & 1)
- mem = new_r_Proj(block, callDiv, mode_M, pn_Call_M);
+ mem = new_r_Proj(callDiv, mode_M, pn_Call_M);
opmode = get_irn_op_mode(node);
irn = get_intrinsic_address(mtp, op_Mod, opmode, opmode, env);
callMod = new_rd_Call(dbg, block, mem, irn, 4, in, mtp);
set_irn_pinned(callMod, get_irn_pinned(node));
- resMod = new_r_Proj(block, callMod, mode_T, pn_Call_T_result);
+ resMod = new_r_Proj(callMod, mode_T, pn_Call_T_result);
} /* if */
for (proj = get_irn_link(node); proj; proj = get_irn_link(proj)) {
case pn_DivMod_res_div: /* Result of Div. */
idx = get_irn_idx(proj);
assert(idx < env->n_entries);
- env->entries[idx]->low_word = new_r_Proj(block, resDiv, env->params->low_unsigned, 0);
- env->entries[idx]->high_word = new_r_Proj(block, resDiv, mode, 1);
+ env->entries[idx]->low_word = new_r_Proj(resDiv, env->params->low_unsigned, 0);
+ env->entries[idx]->high_word = new_r_Proj(resDiv, mode, 1);
break;
case pn_DivMod_res_mod: /* Result of Mod. */
idx = get_irn_idx(proj);
- env->entries[idx]->low_word = new_r_Proj(block, resMod, env->params->low_unsigned, 0);
- env->entries[idx]->high_word = new_r_Proj(block, resMod, mode, 1);
+ env->entries[idx]->low_word = new_r_Proj(resMod, env->params->low_unsigned, 0);
+ env->entries[idx]->high_word = new_r_Proj(resMod, mode, 1);
break;
default:
assert(0 && "unexpected Proj number");
irn = new_rd_Call(dbg, block, get_irg_no_mem(current_ir_graph),
irn, 4, in, mtp);
set_irn_pinned(irn, get_irn_pinned(node));
- irn = new_r_Proj(block, irn, mode_T, pn_Call_T_result);
+ irn = new_r_Proj(irn, mode_T, pn_Call_T_result);
idx = get_irn_idx(node);
assert(idx < env->n_entries);
- env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
- env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
+ env->entries[idx]->low_word = new_r_Proj(irn, env->params->low_unsigned, 0);
+ env->entries[idx]->high_word = new_r_Proj(irn, mode, 1);
} /* lower_Binop */
/**
irn = new_rd_Call(dbg, block, get_irg_no_mem(current_ir_graph),
irn, 3, in, mtp);
set_irn_pinned(irn, get_irn_pinned(node));
- irn = new_r_Proj(block, irn, mode_T, pn_Call_T_result);
+ irn = new_r_Proj(irn, mode_T, pn_Call_T_result);
idx = get_irn_idx(node);
assert(idx < env->n_entries);
- env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
- env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
+ env->entries[idx]->low_word = new_r_Proj(irn, env->params->low_unsigned, 0);
+ env->entries[idx]->high_word = new_r_Proj(irn, mode, 1);
} /* lower_Shiftop */
/**
irn = new_rd_Call(dbg, block, get_irg_no_mem(current_ir_graph),
irn, 2, in, mtp);
set_irn_pinned(irn, get_irn_pinned(node));
- irn = new_r_Proj(block, irn, mode_T, pn_Call_T_result);
+ irn = new_r_Proj(irn, mode_T, pn_Call_T_result);
idx = get_irn_idx(node);
assert(idx < env->n_entries);
- env->entries[idx]->low_word = new_r_Proj(block, irn, env->params->low_unsigned, 0);
- env->entries[idx]->high_word = new_r_Proj(block, irn, mode, 1);
+ env->entries[idx]->low_word = new_r_Proj(irn, env->params->low_unsigned, 0);
+ env->entries[idx]->high_word = new_r_Proj(irn, mode, 1);
} /* lower_Unop */
/**
ir_node *or = new_rd_Or(dbg, block, low, high, mode);
ir_node *cmp = new_rd_Cmp(dbg, block, or, new_Const_long(mode, 0));
- ir_node *proj = new_r_Proj(block, cmp, mode_b, pnc);
+ ir_node *proj = new_r_Proj(cmp, mode_b, pnc);
set_Cond_selector(node, proj);
return;
}
assert(entry);
dst_blk = entry->value;
- irn = new_r_Proj(block, cmpH, mode_b, pn_Cmp_Eq);
+ irn = new_r_Proj(cmpH, mode_b, pn_Cmp_Eq);
dbg = get_irn_dbg_info(node);
irn = new_rd_Cond(dbg, block, irn);
- projHF = new_r_Proj(block, irn, mode_X, pn_Cond_false);
+ projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
mark_irn_visited(projHF);
exchange(projF, projHF);
- projHT = new_r_Proj(block, irn, mode_X, pn_Cond_true);
+ projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
mark_irn_visited(projHT);
new_bl = new_r_Block(irg, 1, &projHT);
dbg = get_irn_dbg_info(cmp);
cmpL = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word);
- irn = new_r_Proj(new_bl, cmpL, mode_b, pn_Cmp_Eq);
+ irn = new_r_Proj(cmpL, mode_b, pn_Cmp_Eq);
dbg = get_irn_dbg_info(node);
irn = new_rd_Cond(dbg, new_bl, irn);
- proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_false);
+ proj = new_r_Proj(irn, mode_X, pn_Cond_false);
mark_irn_visited(proj);
add_block_cf_input(dst_blk, projHF, proj);
- proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_true);
+ proj = new_r_Proj(irn, mode_X, pn_Cond_true);
mark_irn_visited(proj);
exchange(projT, proj);
} else if (pnc == pn_Cmp_Lg) {
assert(entry);
dst_blk = entry->value;
- irn = new_r_Proj(block, cmpH, mode_b, pn_Cmp_Lg);
+ irn = new_r_Proj(cmpH, mode_b, pn_Cmp_Lg);
dbg = get_irn_dbg_info(node);
irn = new_rd_Cond(dbg, block, irn);
- projHT = new_r_Proj(block, irn, mode_X, pn_Cond_true);
+ projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
mark_irn_visited(projHT);
exchange(projT, projHT);
- projHF = new_r_Proj(block, irn, mode_X, pn_Cond_false);
+ projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
mark_irn_visited(projHF);
new_bl = new_r_Block(irg, 1, &projHF);
dbg = get_irn_dbg_info(cmp);
cmpL = new_rd_Cmp(dbg, new_bl, lentry->low_word, rentry->low_word);
- irn = new_r_Proj(new_bl, cmpL, mode_b, pn_Cmp_Lg);
+ irn = new_r_Proj(cmpL, mode_b, pn_Cmp_Lg);
dbg = get_irn_dbg_info(node);
irn = new_rd_Cond(dbg, new_bl, irn);
- proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_true);
+ proj = new_r_Proj(irn, mode_X, pn_Cond_true);
mark_irn_visited(proj);
add_block_cf_input(dst_blk, projHT, proj);
- proj = new_r_Proj(new_bl, irn, mode_X, pn_Cond_false);
+ proj = new_r_Proj(irn, mode_X, pn_Cond_false);
mark_irn_visited(proj);
exchange(projF, proj);
} else {
assert(entry);
dstF = entry->value;
- irn = new_r_Proj(block, cmpH, mode_b, pnc & ~pn_Cmp_Eq);
+ irn = new_r_Proj(cmpH, mode_b, pnc & ~pn_Cmp_Eq);
dbg = get_irn_dbg_info(node);
irn = new_rd_Cond(dbg, block, irn);
- projHT = new_r_Proj(block, irn, mode_X, pn_Cond_true);
+ projHT = new_r_Proj(irn, mode_X, pn_Cond_true);
mark_irn_visited(projHT);
exchange(projT, projHT);
projT = projHT;
- projHF = new_r_Proj(block, irn, mode_X, pn_Cond_false);
+ projHF = new_r_Proj(irn, mode_X, pn_Cond_false);
mark_irn_visited(projHF);
newbl_eq = new_r_Block(irg, 1, &projHF);
- irn = new_r_Proj(block, cmpH, mode_b, pn_Cmp_Eq);
+ irn = new_r_Proj(cmpH, mode_b, pn_Cmp_Eq);
irn = new_rd_Cond(dbg, newbl_eq, irn);
- proj = new_r_Proj(newbl_eq, irn, mode_X, pn_Cond_false);
+ proj = new_r_Proj(irn, mode_X, pn_Cond_false);
mark_irn_visited(proj);
exchange(projF, proj);
projF = proj;
- proj = new_r_Proj(newbl_eq, irn, mode_X, pn_Cond_true);
+ proj = new_r_Proj(irn, mode_X, pn_Cond_true);
mark_irn_visited(proj);
newbl_l = new_r_Block(irg, 1, &proj);
dbg = get_irn_dbg_info(cmp);
cmpL = new_rd_Cmp(dbg, newbl_l, lentry->low_word, rentry->low_word);
- irn = new_r_Proj(newbl_l, cmpL, mode_b, pnc);
+ irn = new_r_Proj(cmpL, mode_b, pnc);
dbg = get_irn_dbg_info(node);
irn = new_rd_Cond(dbg, newbl_l, irn);
- proj = new_r_Proj(newbl_l, irn, mode_X, pn_Cond_true);
+ proj = new_r_Proj(irn, mode_X, pn_Cond_true);
mark_irn_visited(proj);
add_block_cf_input(dstT, projT, proj);
- proj = new_r_Proj(newbl_l, irn, mode_X, pn_Cond_false);
+ proj = new_r_Proj(irn, mode_X, pn_Cond_false);
mark_irn_visited(proj);
add_block_cf_input(dstF, projF, proj);
} /* if */
irn = get_intrinsic_address(mtp, get_irn_op(node), imode, omode, env);
call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 1, &op, mtp);
set_irn_pinned(call, get_irn_pinned(node));
- irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
+ irn = new_r_Proj(call, mode_T, pn_Call_T_result);
- entry->low_word = new_r_Proj(block, irn, low_unsigned, 0);
- entry->high_word = new_r_Proj(block, irn, low_signed, 1);
+ entry->low_word = new_r_Proj(irn, low_unsigned, 0);
+ entry->high_word = new_r_Proj(irn, low_signed, 1);
}
}
call = new_rd_Call(dbg, block, get_irg_no_mem(irg), irn, 2, in, mtp);
set_irn_pinned(call, get_irn_pinned(node));
- irn = new_r_Proj(block, call, mode_T, pn_Call_T_result);
+ irn = new_r_Proj(call, mode_T, pn_Call_T_result);
- exchange(node, new_r_Proj(block, irn, omode, 0));
+ exchange(node, new_r_Proj(irn, omode, 0));
}
}
dbg = get_irn_dbg_info(proj);
env->entries[idx]->low_word =
- new_rd_Proj(dbg, get_nodes_block(proj), args, low_mode, new_projs[proj_nr]);
+ new_rd_Proj(dbg, args, low_mode, new_projs[proj_nr]);
env->entries[idx]->high_word =
- new_rd_Proj(dbg, get_nodes_block(proj), args, mode, new_projs[proj_nr] + 1);
+ new_rd_Proj(dbg, args, mode, new_projs[proj_nr] + 1);
} /* if */
} /* for */
set_optimize(rem);
dbg = get_irn_dbg_info(proj);
env->entries[idx]->low_word =
- new_rd_Proj(dbg, get_nodes_block(proj), results, low_mode, res_numbers[proj_nr]);
+ new_rd_Proj(dbg, results, low_mode, res_numbers[proj_nr]);
env->entries[idx]->high_word =
- new_rd_Proj(dbg, get_nodes_block(proj), results, mode, res_numbers[proj_nr] + 1);
+ new_rd_Proj(dbg, results, mode, res_numbers[proj_nr] + 1);
} /* if */
mark_irn_visited(proj);
} /* if */
if (pnc == pn_Cmp_Eq) {
/* simple case:a == b <==> a_h == b_h && a_l == b_l */
res = new_rd_And(db, blk,
- new_r_Proj(blk, low, mode_b, pnc),
- new_r_Proj(blk, high, mode_b, pnc),
+ new_r_Proj(low, mode_b, pnc),
+ new_r_Proj(high, mode_b, pnc),
mode_b);
} else if (pnc == pn_Cmp_Lg) {
/* simple case:a != b <==> a_h != b_h || a_l != b_l */
res = new_rd_Or(db, blk,
- new_r_Proj(blk, low, mode_b, pnc),
- new_r_Proj(blk, high, mode_b, pnc),
+ new_r_Proj(low, mode_b, pnc),
+ new_r_Proj(high, mode_b, pnc),
mode_b);
} else {
/* a rel b <==> a_h REL b_h || (a_h == b_h && a_l rel b_l) */
t = new_rd_And(db, blk,
- new_r_Proj(blk, low, mode_b, pnc),
- new_r_Proj(blk, high, mode_b, pn_Cmp_Eq),
+ new_r_Proj(low, mode_b, pnc),
+ new_r_Proj(high, mode_b, pn_Cmp_Eq),
mode_b);
res = new_rd_Or(db, blk,
- new_r_Proj(blk, high, mode_b, pnc & ~pn_Cmp_Eq),
+ new_r_Proj(high, mode_b, pnc & ~pn_Cmp_Eq),
t,
mode_b);
} /* if */
#else /* normal code */
newn = new_rd_Load(dbg, bl, get_Sel_mem(sel), add, ent_mode, 0);
#endif
- newn = new_r_Proj(bl, newn, ent_mode, pn_Load_res);
+ newn = new_r_Proj(newn, ent_mode, pn_Load_res);
} else if (get_entity_owner(ent) != get_glob_type()) {
int offset;
/* create new proj, switch off CSE or we may get the old one back */
old_cse = get_opt_cse();
set_opt_cse(0);
- res = n_proj = new_r_Proj(block, load, mode, pn_Load_res);
+ res = n_proj = new_r_Proj(load, mode, pn_Load_res);
set_opt_cse(old_cse);
if (mode_is_signed(mode)) { /* signed */
if (neg_mask) {
/* there are some bits, normal case */
- irn = new_r_Load( block, mem, ptr, mode, 0);
- mem = new_r_Proj( block, irn, mode_M, pn_Load_M);
- irn = new_r_Proj( block, irn, mode, pn_Load_res);
+ irn = new_r_Load(block, mem, ptr, mode, 0);
+ mem = new_r_Proj(irn, mode_M, pn_Load_M);
+ irn = new_r_Proj(irn, mode, pn_Load_res);
irn = new_r_And(block, irn, new_Const_long(mode, neg_mask), mode);
irn = new_rd_Builtin(dbg, block, get_irg_no_mem(current_ir_graph), 1, &op, ir_bk_bswap, tp);
set_irn_pinned(irn, op_pin_state_floats);
DBG_OPT_ALGSIM0(call, irn, FS_OPT_RTS_ABS);
- irn = new_r_Proj(block, irn, get_irn_mode(op), pn_Builtin_1_result);
+ irn = new_r_Proj(irn, get_irn_mode(op), pn_Builtin_1_result);
replace_call(irn, call, mem, NULL, NULL);
return 1;
} /* i_mapper_bswap */
}
irn = new_rd_Alloc(dbg, block, mem, op, firm_unknown_type, stack_alloc);
- mem = new_rd_Proj(dbg, block, irn, mode_M, pn_Alloc_M);
- no_exc = new_rd_Proj(dbg, block, irn, mode_X, pn_Alloc_X_regular);
- exc = new_rd_Proj(dbg, block, irn, mode_X, pn_Alloc_X_except);
- irn = new_rd_Proj(dbg, block, irn, get_modeP_data(), pn_Alloc_res);
+ mem = new_rd_Proj(dbg, irn, mode_M, pn_Alloc_M);
+ no_exc = new_rd_Proj(dbg, irn, mode_X, pn_Alloc_X_regular);
+ exc = new_rd_Proj(dbg, irn, mode_X, pn_Alloc_X_except);
+ irn = new_rd_Proj(dbg, irn, get_modeP_data(), pn_Alloc_res);
DBG_OPT_ALGSIM0(call, irn, FS_OPT_RTS_ALLOCA);
replace_call(irn, call, mem, no_exc, exc);
irn = new_Const(get_mode_one(mode));
quot = new_rd_Quot(dbg, block, mem, irn, left, mode, op_pin_state_pinned);
- mem = new_r_Proj(block, quot, mode_M, pn_Quot_M);
- irn = new_r_Proj(block, quot, mode, pn_Quot_res);
- reg_jmp = new_r_Proj(block, quot, mode_X, pn_Quot_X_regular);
- exc_jmp = new_r_Proj(block, quot, mode_X, pn_Quot_X_except);
+ mem = new_r_Proj(quot, mode_M, pn_Quot_M);
+ irn = new_r_Proj(quot, mode, pn_Quot_res);
+ reg_jmp = new_r_Proj(quot, mode_X, pn_Quot_X_regular);
+ exc_jmp = new_r_Proj(quot, mode_X, pn_Quot_X_except);
}
DBG_OPT_ALGSIM0(call, irn, FS_OPT_RTS_POW);
replace_call(irn, call, mem, reg_jmp, exc_jmp);
/* replace the strcmp by (*x) */
irn = new_rd_Load(dbg, block, mem, v, mode, 0);
- mem = new_r_Proj(block, irn, mode_M, pn_Load_M);
- exc = new_r_Proj(block, irn, mode_X, pn_Load_X_except);
- reg = new_r_Proj(block, irn, mode_X, pn_Load_X_regular);
- irn = new_r_Proj(block, irn, mode, pn_Load_res);
+ mem = new_r_Proj(irn, mode_M, pn_Load_M);
+ exc = new_r_Proj(irn, mode_X, pn_Load_X_except);
+ reg = new_r_Proj(irn, mode_X, pn_Load_X_regular);
+ irn = new_r_Proj(irn, mode, pn_Load_res);
/* conv to the result mode */
mode = get_type_mode(res_tp);
set_irn_pinned(call, get_irn_pinned(node));
if (n_res > 0)
- res_proj = new_r_Proj(bl, call, mode_T, pn_Call_T_result);
+ res_proj = new_r_Proj(call, mode_T, pn_Call_T_result);
else
res_proj = NULL;
for (i = 0; i < n_proj; ++i)
set_Tuple_pred(node, i, new_r_Bad(irg));
if (rt->mem_proj_nr >= 0)
- set_Tuple_pred(node, rt->mem_proj_nr, new_r_Proj(bl, call, mode_M, pn_Call_M));
+ set_Tuple_pred(node, rt->mem_proj_nr, new_r_Proj(call, mode_M, pn_Call_M));
if (!is_NoMem(mem)) {
/* Exceptions can only be handled with real memory */
if (rt->regular_proj_nr >= 0)
- set_Tuple_pred(node, rt->regular_proj_nr, new_r_Proj(bl, call, mode_X, pn_Call_X_regular));
+ set_Tuple_pred(node, rt->regular_proj_nr, new_r_Proj(call, mode_X, pn_Call_X_regular));
if (rt->exc_proj_nr >= 0)
- set_Tuple_pred(node, rt->exc_proj_nr, new_r_Proj(bl, call, mode_X, pn_Call_X_except));
+ set_Tuple_pred(node, rt->exc_proj_nr, new_r_Proj(call, mode_X, pn_Call_X_except));
if (rt->exc_mem_proj_nr >= 0)
- set_Tuple_pred(node, rt->mem_proj_nr, new_r_Proj(bl, call, mode_M, pn_Call_M));
+ set_Tuple_pred(node, rt->mem_proj_nr, new_r_Proj(call, mode_M, pn_Call_M));
}
if (rt->res_proj_nr >= 0)
for (i = 0; i < n_res; ++i)
set_Tuple_pred(node, rt->res_proj_nr + i,
- new_r_Proj(bl, res_proj, get_type_mode(get_method_res_type(mtp, i)), i));
+ new_r_Proj(res_proj, get_type_mode(get_method_res_type(mtp, i)), i));
return 1;
} else {
/* only one return value supported */
if (n_res > 0) {
ir_mode *mode = get_type_mode(get_method_res_type(mtp, 0));
- res_proj = new_r_Proj(bl, call, mode_T, pn_Call_T_result);
- res_proj = new_r_Proj(bl, res_proj, mode, 0);
+ res_proj = new_r_Proj(call, mode_T, pn_Call_T_result);
+ res_proj = new_r_Proj(res_proj, mode, 0);
exchange(node, res_proj);
return 1;
ir_node *zero_cmp = new_d_Const(dbgi, tv_zeroc);
ir_node *cmp = new_rd_Cmp(dbgi, block, pred, zero_cmp);
- ir_node *proj = new_rd_Proj(dbgi, block, cmp, mode_b, pn_Cmp_Lg);
+ ir_node *proj = new_rd_Proj(dbgi, cmp, mode_b, pn_Cmp_Lg);
res = create_set(proj);
break;
}
* block in-between, so that the phi can be used to select the result
* value from the old mux node in the lower block. */
cond = new_r_Cond(upper_block, get_Mux_sel(mux));
- trueProj = new_r_Proj(upper_block, cond, mode_X, pn_Cond_true);
- falseProj = new_r_Proj(upper_block, cond, mode_X, pn_Cond_false);
+ trueProj = new_r_Proj(cond, mode_X, pn_Cond_true);
+ falseProj = new_r_Proj(cond, mode_X, pn_Cond_false);
falseBlock = new_r_Block(irg, 1, &falseProj);
mux_jmps[0] = trueProj;
mux_jmps[1] = new_r_Jmp(falseBlock);
p = new_r_And(dst_block, lol, hil, mode);
c = new_Const(tv_lo);
cmp = new_r_Cmp(dst_block, p, c);
- p = new_r_Proj(dst_block, cmp, mode_b, pn_Cmp_Eq);
+ p = new_r_Proj(cmp, mode_b, pn_Cmp_Eq);
return p;
}
}
} else if (tarval_is_one(tarval_sub(tv_hi, tv_lo, NULL))) { /* lo + 1 == hi */
if (pnc_lo == pn_Cmp_Ge && pnc_hi == pn_Cmp_Lt) {
/* x >= c && x < c + 1 ==> x == c */
- ir_node *const block = get_nodes_block(cmp_lo);
- ir_node *const p = new_r_Proj(block, cmp_lo, mode_b, pn_Cmp_Eq);
+ ir_node *const p = new_r_Proj(cmp_lo, mode_b, pn_Cmp_Eq);
return p;
} else if (pnc_lo == pn_Cmp_Gt) {
if (pnc_hi == pn_Cmp_Lg) {
/* x > c && x != c + 1 ==> x > c + 1 */
- ir_node *const block = get_nodes_block(cmp_hi);
- ir_node *const p = new_r_Proj(block, cmp_hi, mode_b, pn_Cmp_Gt);
+ ir_node *const p = new_r_Proj(cmp_hi, mode_b, pn_Cmp_Gt);
return p;
} else if (pnc_hi == pn_Cmp_Lt) {
/* x > c && x < c + 1 ==> false */
return t;
} else if (pnc_hi == pn_Cmp_Le) {
/* x > c && x <= c + 1 ==> x != c + 1 */
- ir_node *const block = get_nodes_block(cmp_hi);
- ir_node *const p = new_r_Proj(block, cmp_hi, mode_b, pn_Cmp_Eq);
+ ir_node *const p = new_r_Proj(cmp_hi, mode_b, pn_Cmp_Eq);
return p;
}
} else if (pnc_lo == pn_Cmp_Lg && pnc_hi == pn_Cmp_Lt) {
/* x != c && c < c + 1 ==> x < c */
- ir_node *const block = get_nodes_block(cmp_lo);
- ir_node *const p = new_r_Proj(block, cmp_lo, mode_b, pn_Cmp_Lt);
+ ir_node *const p = new_r_Proj(cmp_lo, mode_b, pn_Cmp_Lt);
return p;
}
} else if ((pnc_lo == pn_Cmp_Gt || pnc_lo == pn_Cmp_Ge) &&
sub = new_r_Sub(block, x, c, mode);
subc = new_r_Sub(block, new_Const(tv_hi), c, mode);
cmp = new_r_Cmp(block, sub, subc);
- p = new_r_Proj(block, cmp, mode_b, pnc_hi);
+ p = new_r_Proj(cmp, mode_b, pnc_hi);
return p;
}
}
p = new_r_Or(dst_block, lol, hil, mode);
c = new_Const(tv_lo);
cmp = new_r_Cmp(dst_block, p, c);
- p = new_r_Proj(dst_block, cmp, mode_b, pn_Cmp_Lg);
+ p = new_r_Proj(cmp, mode_b, pn_Cmp_Lg);
return p;
}
}
} else if (tarval_is_one(tarval_sub(tv_hi, tv_lo, NULL))) { /* lo + 1 == hi */
if (pnc_lo == pn_Cmp_Lt && pnc_hi == pn_Cmp_Ge) {
/* x < c || x >= c + 1 ==> x != c */
- ir_node *const block = get_nodes_block(cmp_lo);
- ir_node *const p = new_r_Proj(block, cmp_lo, mode_b, pn_Cmp_Lg);
+ ir_node *const p = new_r_Proj(cmp_lo, mode_b, pn_Cmp_Lg);
return p;
} else if (pnc_lo == pn_Cmp_Le) {
if (pnc_hi == pn_Cmp_Eq) {
/* x <= c || x == c + 1 ==> x <= c + 1 */
- ir_node *const block = get_nodes_block(cmp_hi);
- ir_node *const p = new_r_Proj(block, cmp_hi, mode_b, pn_Cmp_Le);
+ ir_node *const p = new_r_Proj(cmp_hi, mode_b, pn_Cmp_Le);
return p;
} else if (pnc_hi == pn_Cmp_Ge) {
/* x <= c || x >= c + 1 ==> true */
return t;
} else if (pnc_hi == pn_Cmp_Gt) {
/* x <= c || x > c + 1 ==> x != c + 1 */
- ir_node *const block = get_nodes_block(cmp_hi);
- ir_node *const p = new_r_Proj(block, cmp_hi, mode_b, pn_Cmp_Lg);
+ ir_node *const p = new_r_Proj(cmp_hi, mode_b, pn_Cmp_Lg);
return p;
}
} else if (pnc_lo == pn_Cmp_Eq && pnc_hi == pn_Cmp_Ge) {
/* x == c || x >= c + 1 ==> x >= c */
- ir_node *const block = get_nodes_block(cmp_lo);
- ir_node *const p = new_r_Proj(block, cmp_lo, mode_b, pn_Cmp_Ge);
+ ir_node *const p = new_r_Proj(cmp_lo, mode_b, pn_Cmp_Ge);
return p;
}
} else if ((pnc_lo == pn_Cmp_Lt || pnc_lo == pn_Cmp_Le) &&
sub = new_r_Sub(block, x, c, mode);
subc = new_r_Sub(block, new_Const(tv_hi), c, mode);
cmp = new_r_Cmp(block, sub, subc);
- p = new_r_Proj(block, cmp, mode_b, pnc_hi);
+ p = new_r_Proj(cmp, mode_b, pnc_hi);
return p;
}
}
if (cpair.proj_lo == cond_selector) {
ir_mode *mode = get_tarval_mode(cpair.tv_lo);
ir_node *cmp = get_Proj_pred(cpair.proj_lo);
- ir_node *block = get_nodes_block(cmp);
cpair.pnc_lo = get_negated_pnc(cpair.pnc_lo, mode);
- cpair.proj_lo = new_r_Proj(block, cmp, mode_b, cpair.pnc_lo);
+ cpair.proj_lo = new_r_Proj(cmp, mode_b, cpair.pnc_lo);
} else {
ir_mode *mode = get_tarval_mode(cpair.tv_hi);
ir_node *cmp = get_Proj_pred(cpair.proj_hi);
- ir_node *block = get_nodes_block(cmp);
assert(cpair.proj_hi == cond_selector);
cpair.pnc_hi = get_negated_pnc(cpair.pnc_hi, mode);
- cpair.proj_hi = new_r_Proj(block, cmp, mode_b, cpair.pnc_hi);
+ cpair.proj_hi = new_r_Proj(cmp, mode_b, cpair.pnc_hi);
}
}
if (get_Proj_proj(upper_cf) == pn_Cond_false) {
if (cpair.proj_lo == upper_cond_selector) {
ir_mode *mode = get_tarval_mode(cpair.tv_lo);
ir_node *cmp = get_Proj_pred(cpair.proj_lo);
- ir_node *block = get_nodes_block(cmp);
cpair.pnc_lo = get_negated_pnc(cpair.pnc_lo, mode);
- cpair.proj_lo = new_r_Proj(block, cmp, mode_b, cpair.pnc_lo);
+ cpair.proj_lo = new_r_Proj(cmp, mode_b, cpair.pnc_lo);
} else {
ir_mode *mode = get_tarval_mode(cpair.tv_hi);
ir_node *cmp = get_Proj_pred(cpair.proj_hi);
- ir_node *block = get_nodes_block(cmp);
assert(cpair.proj_hi == upper_cond_selector);
cpair.pnc_hi = get_negated_pnc(cpair.pnc_hi, mode);
- cpair.proj_hi = new_r_Proj(block, cmp, mode_b, cpair.pnc_hi);
+ cpair.proj_hi = new_r_Proj(cmp, mode_b, cpair.pnc_hi);
}
}
if (v_pred != pred) {
/* must create a new value here */
- v = new_r_Proj(get_nodes_block(v_pred), v_pred, get_irn_mode(v), get_Proj_proj(v));
+ v = new_r_Proj(v_pred, get_irn_mode(v), get_Proj_proj(v));
}
}
v = identify_remember(value_table, v);
if (info->projs[pn_Load_res]) {
if (pred_info->projs[pn_Load_res] == NULL) {
/* create a new Proj again */
- pred_info->projs[pn_Load_res] = new_r_Proj(get_nodes_block(pred), pred, get_Load_mode(pred), pn_Load_res);
+ pred_info->projs[pn_Load_res] = new_r_Proj(pred, get_Load_mode(pred), pn_Load_res);
}
value = pred_info->projs[pn_Load_res];
co_set_irn_name(store, co_get_irn_ident(old_store));
#endif
- projM = new_rd_Proj(NULL, block, store, mode_M, pn_Store_M);
+ projM = new_rd_Proj(NULL, store, mode_M, pn_Store_M);
info = get_ldst_info(store, &wenv->obst);
info->projs[pn_Store_M] = projM;
/* fifths step: repair exception flow */
if (exc) {
- ir_node *projX = new_rd_Proj(NULL, block, store, mode_X, pn_Store_X_except);
+ ir_node *projX = new_rd_Proj(NULL, store, mode_X, pn_Store_X_except);
info->projs[pn_Store_X_except] = projX;
info->exc_block = exc;
pe->load = irn;
ninfo = get_ldst_info(irn, phase_obst(&env->ph));
- ninfo->projs[pn_Load_M] = mem = new_r_Proj(pred, irn, mode_M, pn_Load_M);
+ ninfo->projs[pn_Load_M] = mem = new_r_Proj(irn, mode_M, pn_Load_M);
set_Phi_pred(phi, pos, mem);
- ninfo->projs[pn_Load_res] = new_r_Proj(pred, irn, load_mode, pn_Load_res);
+ ninfo->projs[pn_Load_res] = new_r_Proj(irn, load_mode, pn_Load_res);
}
/* now kill the old Load */
}
/* memory output for some exceptions is directly connected to End */
if (is_Call(ret)) {
- cf_pred[n_mem_phi++] = new_r_Proj(get_nodes_block(ret), ret, mode_M, 3);
+ cf_pred[n_mem_phi++] = new_r_Proj(ret, mode_M, 3);
} else if (is_fragile_op(ret)) {
/* We rely that all cfops have the memory output at the same position. */
- cf_pred[n_mem_phi++] = new_r_Proj(get_nodes_block(ret), ret, mode_M, 0);
+ cf_pred[n_mem_phi++] = new_r_Proj(ret, mode_M, 0);
} else if (is_Raise(ret)) {
- cf_pred[n_mem_phi++] = new_r_Proj(get_nodes_block(ret), ret, mode_M, 1);
+ cf_pred[n_mem_phi++] = new_r_Proj(ret, mode_M, 1);
}
}
phi = new_Phi(n_mem_phi, cf_pred, mode_M);
assert(last_mem != NULL);
adr = phi_translate(op->value.address, block, i);
load = new_rd_Load(db, pred, last_mem, adr, mode, cons_none);
- def = new_r_Proj(pred, load, mode, pn_Load_res);
+ def = new_r_Proj(load, mode, pn_Load_res);
DB((dbg, LEVEL_1, "Created new %+F in %+F for party redundant %+F\n", load, pred, op->node));
new_op = alloc_memop(load);
- new_op->mem = new_r_Proj(pred, load, mode_M, pn_Load_M);
+ new_op->mem = new_r_Proj(load, mode_M, pn_Load_M);
new_op->value.address = adr;
new_op->value.id = op->value.id;
new_op->value.mode = mode;
exchange(proj, sync);
assert(pn_Load_M == pn_Store_M);
- proj = new_r_Proj(block, mem_op, mode_M, pn_Load_M);
+ proj = new_r_Proj(mem_op, mode_M, pn_Load_M);
set_Sync_pred(sync, 0, proj);
n = ir_nodeset_size(&pi.this_mem);
/* build the memory phi */
i = 0;
- in[i] = new_r_Proj(get_irg_start_block(irg), get_irg_start(irg), mode_M, pn_Start_M);
+ in[i] = new_r_Proj(get_irg_start(irg), mode_M, pn_Start_M);
set_irg_initial_mem(irg, in[i]);
++i;
for (i = 0; i < n_params; ++i) {
ir_mode *mode = get_type_mode(get_method_param_type(method_tp, i));
- in[0] = new_r_Proj(args_bl, args, mode, i);
+ in[0] = new_r_Proj(args, mode, i);
for (j = 0; j < env->n_tail_calls; ++j)
in[j + 1] = call_params[j][i];
from spec_util import is_dynamic_pinned, verify_node, isAbstract, setdefault
from ir_spec import nodes
-def format_argdecls(node, first = False, voidwhenempty = False):
- if len(node.arguments) == 0:
- if voidwhenempty:
- return "void"
- else:
- return ""
-
- arguments = map(lambda arg: arg["type"] + " " + arg["name"], node.arguments)
- res = ""
- if not first:
- res = ", "
- res += ", ".join(arguments)
- return res
-
-def format_args(node, first = False):
- res = ""
- if not first and node.arguments != []:
- res = ", "
+def format_parameterlist(parameterlist):
+ return "\n".join(parameterlist)
+def format_nodearguments(node):
arguments = map(lambda arg: arg["name"], node.arguments)
- res += ", ".join(arguments)
- return res
+ return format_parameterlist(arguments)
-def format_blockdecl(node):
+def format_nodeparameters(node):
+ parameters = map(lambda arg: arg["type"] + " " + arg["name"], node.arguments)
+ return format_parameterlist(parameters)
+
+def format_blockparameter(node):
if hasattr(node, "knownBlock"):
+ if hasattr(node, "knownGraph"):
+ return ""
return "ir_graph *irg"
else:
return "ir_node *block"
-def format_irgassign(node):
+def format_blockargument(node):
if hasattr(node, "knownBlock"):
- return ""
+ if hasattr(node, "knownGraph"):
+ return ""
+ return "irg"
else:
- return "ir_graph *irg = get_Block_irg(block);\n"
+ return "block"
+
+def format_irgassign(node):
+ if hasattr(node, "knownGraph"):
+ return "ir_graph *irg = %s;\n" % node.graph
-def format_block(node):
if hasattr(node, "knownBlock"):
- return "irg"
+ return ""
else:
- return "block"
+ return "ir_graph *irg = get_Block_irg(block);\n"
def format_curblock(node):
if hasattr(node, "knownBlock"):
+ if hasattr(node, "knownGraph"):
+ return ""
return "current_ir_graph"
else:
return "current_ir_graph->current_block"
result.append(node)
return result
+def format_arguments(string, voidwhenempty = False):
+ args = re.split('\s*\n\s*', string)
+ if args[0] == '':
+ args = args[1:]
+ if len(args) > 0 and args[-1] == '':
+ args = args[:-1]
+ if len(args) == 0 and voidwhenempty:
+ return "void"
+ return ", ".join(args)
+
+def format_parameters(string):
+ return format_arguments(string, voidwhenempty = True)
+
env = Environment()
-env.filters['argdecls'] = format_argdecls
-env.filters['args'] = format_args
-env.filters['blockdecl'] = format_blockdecl
-env.filters['irgassign'] = format_irgassign
-env.filters['block'] = format_block
-env.filters['curblock'] = format_curblock
-env.filters['insdecl'] = format_insdecl
-env.filters['arity_and_ins'] = format_arity_and_ins
-env.filters['arity'] = format_arity
-env.filters['pinned'] = format_pinned
-env.filters['flags'] = format_flags
-env.filters['attr_size'] = format_attr_size
-env.filters['isnot'] = filter_isnot
-env.filters['opindex'] = format_opindex
+env.filters['parameterlist'] = format_parameterlist
+env.filters['nodearguments'] = format_nodearguments
+env.filters['nodeparameters'] = format_nodeparameters
+env.filters['blockparameter'] = format_blockparameter
+env.filters['blockargument'] = format_blockargument
+env.filters['irgassign'] = format_irgassign
+env.filters['curblock'] = format_curblock
+env.filters['insdecl'] = format_insdecl
+env.filters['arity_and_ins'] = format_arity_and_ins
+env.filters['arity'] = format_arity
+env.filters['pinned'] = format_pinned
+env.filters['flags'] = format_flags
+env.filters['attr_size'] = format_attr_size
+env.filters['opindex'] = format_opindex
+env.filters['isnot'] = filter_isnot
+env.filters['arguments'] = format_arguments
+env.filters['parameters'] = format_parameters
def prepare_attr(attr):
if "init" in attr:
constructor_template = env.from_string('''
-ir_node *new_rd_{{node.constrname}}(dbg_info *dbgi, {{node|blockdecl}}{{node|argdecls}})
+ir_node *new_rd_{{node.constrname}}(
+ {%- filter parameters %}
+ dbg_info *dbgi
+ {{node|blockparameter}}
+ {{node|nodeparameters}}
+ {% endfilter %})
{
ir_node *res;
ir_graph *rem = current_ir_graph;
{{node|irgassign}}
{{node|insdecl}}
current_ir_graph = irg;
- res = new_ir_node(dbgi, irg, {{node.block}}, op_{{node.name}}, {{node.mode}}, {{node|arity_and_ins}});
+ res = new_ir_node(
+ {%- filter arguments %}
+ dbgi
+ irg
+ {{node.block}}
+ op_{{node.name}}
+ {{node.mode}}
+ {{node|arity_and_ins}}
+ {% endfilter %});
{% for attr in node.attrs -%}
res->attr.{{node.attrs_name}}{{attr["initname"]}} =
{%- if "init" in attr %} {{ attr["init"] -}};
return res;
}
-ir_node *new_r_{{node.constrname}}({{node|blockdecl}}{{node|argdecls}})
+ir_node *new_r_{{node.constrname}}(
+ {%- filter parameters %}
+ {{node|blockparameter}}
+ {{node|nodeparameters}}
+ {% endfilter %})
{
- return new_rd_{{node.constrname}}(NULL, {{node|block}}{{node|args}});
+ return new_rd_{{node.constrname}}(
+ {%- filter arguments %}
+ NULL
+ {{node|blockargument}}
+ {{node|nodearguments}}
+ {% endfilter %});
}
-ir_node *new_d_{{node.constrname}}(dbg_info *dbgi{{node|argdecls}})
+ir_node *new_d_{{node.constrname}}(
+ {%- filter parameters %}
+ dbg_info *dbgi
+ {{node|nodeparameters}}
+ {% endfilter %})
{
ir_node *res;
{{ node.d_pre }}
- res = new_rd_{{node.constrname}}(dbgi, {{node|curblock}}{{node|args}});
+ res = new_rd_{{node.constrname}}(
+ {%- filter parameters %}
+ dbgi
+ {{node|curblock}}
+ {{node|nodearguments}}
+ {% endfilter %});
{{ node.d_post }}
return res;
}
-ir_node *new_{{node.constrname}}({{node|argdecls(True, True)}})
+ir_node *new_{{node.constrname}}(
+ {%- filter parameters %}
+ {{node|nodeparameters}}
+ {% endfilter %})
{
- return new_d_{{node.constrname}}(NULL{{node|args}});
+ return new_d_{{node.constrname}}(
+ {%- filter arguments %}
+ NULL
+ {{node|nodearguments}}
+ {% endfilter %});
}
''')
void init_op(void)
{
{% for node in nodes %}
- op_{{node.name}} = new_ir_op(iro_{{node.name}}, "{{node.name}}", {{node|pinned}}, {{node|flags}}, {{node|arity}}, {{node|opindex}}, {{node|attr_size}}, NULL);
+ op_{{node.name}} = new_ir_op(
+ {%- filter arguments %}
+ iro_{{node.name}}
+ "{{node.name}}"
+ {{node|pinned}}
+ {{node|flags}}
+ {{node|arity}}
+ {{node|opindex}}
+ {{node|attr_size}}
+ NULL
+ {% endfilter %});
{%- endfor %}
be_init_op();
#!/usr/bin/env python
import sys
+import re
from jinja2 import Environment, Template
from jinja2.filters import do_dictsort
from spec_util import is_dynamic_pinned, verify_node, isAbstract
sys.stderr.write("Warning: " + msg + "\n");
def format_args(arglist):
- s = ", ".join(arglist)
- if len(s) == 0:
- return ""
- return ", " + s
+ return "\n".join(arglist)
def format_ifnset(string, node, key):
if hasattr(node, key):
def format_block(node):
if hasattr(node, "knownBlock"):
+ if hasattr(node, "knownGraph"):
+ return ""
return "current_ir_graph"
else:
return "get_node(env, preds[0])"
+def format_arguments(string):
+ args = re.split('\s*\n\s*', string)
+ if args[0] == '':
+ args = args[1:]
+ if len(args) > 0 and args[-1] == '':
+ args = args[:-1]
+ return ", ".join(args)
+
env = Environment()
-env.filters['args'] = format_args
-env.filters['ifnset'] = format_ifnset
-env.filters['block'] = format_block
+env.filters['args'] = format_args
+env.filters['ifnset'] = format_ifnset
+env.filters['block'] = format_block
+env.filters['arguments'] = format_arguments
def get_io_type(type, attrname, node):
if type == "tarval*":
{% endfor %}break;''')
import_attrs_template = env.from_string('''
- case iro_{{node.name}}:
- {
+ case iro_{{node.name}}: {
{{"ir_mode *mode = read_mode(env);"|ifnset(node,"mode")}}
- {% for attr in node.attrs %}{{attr.importcmd}}
- {% endfor %}
- {% for attr in node.constructor_args %}{{attr.importcmd}}
- {% endfor %}
- {% for special in node.special_constructors %}if({{special.attrname}} == {{special.value}})
- newnode = new_r_{{special.constrname}}({{node|block}}{{node.arguments|args}});
- else{% endfor %}
- newnode = new_r_{{node.name}}({{node|block}}{{node.arguments|args}});
- {% for (initarg, initfunc) in node.initargs %}{{initfunc}}(newnode, {{initarg}});
- {% endfor %}
+ {% for attr in node.attrs %}
+ {{attr.importcmd}}
+ {% endfor -%}
+ {% for attr in node.constructor_args %}
+ {{attr.importcmd}}
+ {% endfor -%}
+ {% for special in node.special_constructors %}
+ if ({{special.attrname}} == {{special.value}})
+ newnode = new_r_{{special.constrname}}(
+{%- filter arguments %}
+{{node|block}}
+{{node.arguments|args}}
+{% endfilter %});
+ else
+ {% endfor -%}
+ newnode = new_r_{{node.name}}(
+{%- filter arguments %}
+{{node|block}}
+{{node.arguments|args}}
+{% endfilter %});
+ {% for (initarg, initfunc) in node.initargs %}
+ {{initfunc}}(newnode, {{initarg}});
+ {% endfor -%}
break;
}
''')
flags = [ "commutative" ]
class Phi(Op):
- pinned = "yes"
- arity = "variable"
- flags = []
- attr_struct = "phi_attr"
- custom_is = True
+ pinned = "yes"
+ arity = "variable"
+ flags = []
+ attr_struct = "phi_attr"
+ custom_is = True
java_noconstr = True
init = '''
/* Memory Phis in endless loops must be kept alive.
pinned = "yes"
class Proj(Op):
- ins = [ "pred" ]
- flags = []
- pinned = "no"
- attrs = [
+ ins = [ "pred" ]
+ flags = []
+ pinned = "no"
+ knownBlock = True
+ knownGraph = True
+ block = "get_nodes_block(irn_pred)"
+ graph = "get_irn_irg(irn_pred)"
+ attrs = [
dict(
type = "long",
name = "proj",
projects / libfirm / commitdiff