constructors => \%binop_operand_constructors,
},
-Slr => {
+Srl => {
irn_flags => [ "rematerializable" ],
mode => $mode_gp,
emit => '. srl %S0, %R1I, %D0',
return new_bd_sparc_And_imm(dbgi, block, op, NULL, 0xFF);
} else if (src_bits == 16) {
ir_node *lshift = new_bd_sparc_Sll_imm(dbgi, block, op, NULL, 16);
- ir_node *rshift = new_bd_sparc_Slr_imm(dbgi, block, lshift, NULL, 16);
+ ir_node *rshift = new_bd_sparc_Srl_imm(dbgi, block, lshift, NULL, 16);
return rshift;
} else {
panic("zero extension only supported for 8 and 16 bits");
static ir_node *gen_Shr(ir_node *node)
{
- return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Slr_reg, new_bd_sparc_Slr_imm);
+ return gen_helper_binop(node, MATCH_NONE, new_bd_sparc_Srl_reg, new_bd_sparc_Srl_imm);
}
static ir_node *gen_Shrs(ir_node *node)