if ((res == irn) && (get_ia32_am_support(irn) != ia32_am_None) && !is_ia32_Lea(irn)) {
/* 1st: check for Load/Store -> LEA */
- if (is_ia32_Ld(irn) || is_ia32_St(irn)) {
+ if (is_ia32_Ld(irn) || is_ia32_St(irn) || is_ia32_Store8Bit(irn)) {
left = get_irn_n(irn, 0);
if (is_ia32_Lea(left)) {
set_ia32_am_scale(irn, get_ia32_am_scale(left));
set_ia32_am_flavour(irn, get_ia32_am_flavour(left));
- set_ia32_op_type(irn, is_ia32_St(irn) ? ia32_AddrModeD : ia32_AddrModeS);
+ set_ia32_op_type(irn, is_ia32_Ld(irn) ? ia32_AddrModeS : ia32_AddrModeD);
/* set base and index */
set_irn_n(irn, 0, get_irn_n(left, 0));
ir_node *val = get_Store_value(node);
ir_node *ptr = get_Store_ptr(node);
ir_node *mem = get_Store_mem(node);
+ ir_node *mode = get_irn_mode(val);
ir_node *sval = val;
ir_node *new_op;
sval = noreg;
}
- if (mode_is_float(env->mode)) {
- new_op = new_rd_ia32_fStore(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, env->mode);
+ if (mode_is_float(mode)) {
+ new_op = new_rd_ia32_fStore(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, mode_T);
}
- else if (get_mode_size_bits(env->mode) == 8) {
- new_op = new_rd_ia32_Store8Bit(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, env->mode);
+ else if (get_mode_size_bits(mode) == 8) {
+ new_op = new_rd_ia32_Store8Bit(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, mode_T);
}
else {
- new_op = new_rd_ia32_Store(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, env->mode);
+ new_op = new_rd_ia32_Store(env->dbg, env->irg, env->block, ptr, noreg, sval, mem, mode_T);
}
/* stored const is an attribute (saves a register) */