if (be_get_Proj_for_pn(node, pn_Load_res) == NULL) {
/* add a result proj and a Keep to produce a pseudo use */
ir_node *proj = new_r_Proj(irg, block, new_load, mode_Iu, pn_arm_Load_res);
- be_new_Keep(arch_get_irn_reg_class(env_cg->arch_env, proj, -1), irg, block, 1, &proj);
+ be_new_Keep(arch_get_irn_reg_class(proj, -1), irg, block, 1, &proj);
}
return new_load;
return req->cls == reg->reg_class;
}
-const arch_register_class_t *
-arch_get_irn_reg_class(const arch_env_t *env, const ir_node *irn, int pos)
+const arch_register_class_t *arch_get_irn_reg_class(const ir_node *irn, int pos)
{
const arch_irn_ops_t *ops = get_irn_ops(irn);
const arch_register_req_t *req = ops->get_irn_reg_req(irn, pos);
- (void)env; // TODO remove parameter
assert(req->type != arch_register_req_type_none || req->cls == NULL);
/**
* Get the register class of an operand of a node.
- * @param env The architecture environment.
* @param irn The node.
* @param pos The position of the operand, -1 for the output.
* @return The register class of the operand or NULL, if
* operand is a non-register operand.
*/
-extern const arch_register_class_t *
-arch_get_irn_reg_class(const arch_env_t *env, const ir_node *irn, int pos);
+const arch_register_class_t *arch_get_irn_reg_class(const ir_node *irn, int pos);
/**
* Get the register allocated at a certain output operand of a node.
#define arch_irn_is(env, irn, flag) ((arch_irn_get_flags(env, irn) & arch_irn_flags_ ## flag) != 0)
-#define arch_irn_has_reg_class(env, irn, pos, cls) \
- ((cls) == arch_get_irn_reg_class(env, irn, pos))
+#define arch_irn_has_reg_class(irn, pos, cls) \
+ ((cls) == arch_get_irn_reg_class(irn, pos))
#define arch_irn_consider_in_reg_alloc(env, cls, irn) \
- (arch_irn_has_reg_class(env, irn, -1, cls) && !arch_irn_is(env, irn, ignore))
+ (arch_irn_has_reg_class(irn, -1, cls) && !arch_irn_is(env, irn, ignore))
/**
* Get the operations of an irn.
const arch_register_t *reg;
const arch_register_req_t *req;
- if (arch_get_irn_reg_class(aenv, irn, i) != env->cls)
+ if (arch_get_irn_reg_class(irn, i) != env->cls)
continue;
reg = arch_get_irn_register(aenv, op);
#define get_irn_col(co, irn) arch_register_get_index(arch_get_irn_register((co)->aenv, irn))
#define set_irn_col(co, irn, col) arch_set_irn_register((co)->aenv, irn, arch_register_for_index((co)->cls, col))
-#define is_curr_reg_class(co, irn) (arch_get_irn_reg_class((co)->aenv, irn, -1) == (co)->cls)
+#define is_curr_reg_class(co, irn) (arch_get_irn_reg_class(irn, -1) == (co)->cls)
#define list_entry_units(lh) list_entry(lh, unit_t, units)
all_phi_classes = get_all_phi_classes(pc_obj);
foreach_ir_nodeset(all_phi_nodes, n, iter) {
- if (arch_get_irn_reg_class(aenv, n, -1) == cenv->cls)
+ if (arch_get_irn_reg_class(n, -1) == cenv->cls)
stat_phi_node(cenv, n);
}
foreach_ir_nodeset(all_copy_nodes, n, iter) {
- if (arch_get_irn_reg_class(aenv, n, -1) == cenv->cls)
+ if (arch_get_irn_reg_class(n, -1) == cenv->cls)
stat_copy_node(cenv, n);
}
foreach_pset(all_phi_classes, pc) {
ir_node *member = pc[0];
- if (arch_get_irn_reg_class(aenv, member, -1) == cenv->cls)
+ if (arch_get_irn_reg_class(member, -1) == cenv->cls)
stat_phi_class(cenv, pc);
}
static void save_load(ir_node *irn, void *env) {
color_save_t *saver = env;
- if (saver->chordal_env->cls == arch_get_irn_reg_class(saver->arch_env, irn, -1)) {
+ if (saver->chordal_env->cls == arch_get_irn_reg_class(irn, -1)) {
if (saver->flag == 0) { /* save */
const arch_register_t *reg = arch_get_irn_register(saver->arch_env, irn);
pmap_insert(saver->saved_colors, irn, (void *) reg);
/* test whether the current node needs flags */
arity = get_irn_arity(node);
for(i = 0; i < arity; ++i) {
- const arch_register_class_t *cls
- = arch_get_irn_reg_class(arch_env, node, i);
+ const arch_register_class_t *cls = arch_get_irn_reg_class(node, i);
if(cls == flag_class) {
assert(new_flags_needed == NULL);
new_flags_needed = get_irn_n(node, i);
pset *op_set = env->op_set;
const arch_env_t *arch_env = be_get_birg_arch_env(birg);
ir_node *block = get_nodes_block(irn);
- const arch_register_class_t *cls = arch_get_irn_reg_class(arch_env, other_different, -1);
+ const arch_register_class_t *cls = arch_get_irn_reg_class(other_different, -1);
ir_node *in[2], *keep, *cpy;
op_copy_assoc_t key, *entry;
DEBUG_ONLY(firm_dbg_module_t *mod = env->dbg;)
*/
void assure_constraints(be_irg_t *birg) {
ir_graph *irg = be_get_birg_irg(birg);
- const arch_env_t *arch_env = be_get_birg_arch_env(birg);
constraint_env_t cenv;
op_copy_assoc_t *entry;
ir_node **nodes;
ir_node *keep;
int n = get_irn_arity(cp);
- keep = be_new_Keep(arch_get_irn_reg_class(arch_env, cp, -1),
+ keep = be_new_Keep(arch_get_irn_reg_class(cp, -1),
irg, get_nodes_block(cp), n, get_irn_in(cp) + 1);
sched_add_before(cp, keep);
edge = get_irn_out_edge_first_kind(perm, EDGE_KIND_NORMAL);
one_proj = get_edge_src_irn(edge);
assert(is_Proj(one_proj));
- cls = arch_get_irn_reg_class(aenv, one_proj, -1);
+ cls = arch_get_irn_reg_class(one_proj, -1);
/* Find the point in the schedule after which the
* potentially movable nodes must be defined.
{
int i;
ir_node *frame = get_irg_frame(irg);
- const arch_register_class_t *cls_frame = arch_get_irn_reg_class(arch_env, frame, -1);
+ const arch_register_class_t *cls_frame = arch_get_irn_reg_class(frame, -1);
ir_node *irn;
const arch_register_t *sp = arch_env->sp;
be_memperm_attr_t *attr;
{
ir_graph *irg = get_irn_irg(block);
ir_node *frame = get_irg_frame(irg);
- const arch_register_class_t *cls = arch_get_irn_reg_class(arch_env, irn, -1);
- const arch_register_class_t *cls_frame = arch_get_irn_reg_class(arch_env, frame, -1);
+ const arch_register_class_t *cls = arch_get_irn_reg_class(irn, -1);
+ const arch_register_class_t *cls_frame = arch_get_irn_reg_class(frame, -1);
ir_node *spill;
+ (void)arch_env;
spill = be_new_Spill(cls, cls_frame, irg, block, frame, irn);
return spill;
ir_node *bl = is_Block(insert) ? insert : get_nodes_block(insert);
ir_graph *irg = get_irn_irg(bl);
ir_node *frame = get_irg_frame(irg);
- const arch_register_class_t *cls_frame = arch_get_irn_reg_class(arch_env, frame, -1);
+ const arch_register_class_t *cls_frame = arch_get_irn_reg_class(frame, -1);
assert(be_is_Spill(spill) || (is_Phi(spill) && get_irn_mode(spill) == mode_M));
}
if (is_Proj(user)) {
-
- //if (arch_get_irn_reg_class(rss->arch_env, user, -1) == rss->cls)
+ //if (arch_get_irn_reg_class(user, -1) == rss->cls)
collect_descendants(rss, rirn, user, got_sink, cur_desc_walk);
}
else {
ir_node *consumer = get_edge_src_irn(edge);
if (is_Proj(consumer)) {
- //if (arch_get_irn_reg_class(rss->arch_env, consumer, -1) == rss->cls)
+ //if (arch_get_irn_reg_class(consumer, -1) == rss->cls)
collect_consumer(rss, rss_irn, consumer, got_sink);
}
else
if (be_is_Keep(irn))
continue;
- if (! arch_irn_is(rss->arch_env, irn, ignore) && arch_get_irn_reg_class(rss->arch_env, irn, -1) == cls) {
+ if (!arch_irn_is(rss->arch_env, irn, ignore) && arch_get_irn_reg_class(irn, -1) == cls) {
plist_insert_back(rss->nodes, skip_Proj(irn));
}
//}
return;
mode = get_irn_mode(node);
- cls = arch_get_irn_reg_class(arch_env, node, -1);
+ cls = arch_get_irn_reg_class(node, -1);
align = arch_env_get_reg_class_alignment(arch_env, cls);
be_node_needs_frame_entity(env, node, mode, align);
phi_block = get_nodes_block(phi);
phi_reg = get_reg(phi);
- cls = arch_get_irn_reg_class(get_chordal_arch(chordal_env), phi, -1);
+ cls = arch_get_irn_reg_class(phi, -1);
/* process all arguments of the phi */
for (i = 0, max = get_irn_arity(phi); i < max; ++i) {
int i, arity;
/* verify output register */
- if (arch_get_irn_reg_class(arch_env, node, -1) != NULL) {
+ if (arch_get_irn_reg_class(node, -1) != NULL) {
reg = arch_get_irn_register(arch_env, node);
if (reg == NULL) {
ir_fprintf(stderr, "Verify warning: Node %+F in block %+F(%s) should have a register assigned\n",
continue;
}
- if (arch_get_irn_reg_class(arch_env, node, i) == NULL)
+ if (arch_get_irn_reg_class(node, i) == NULL)
continue;
reg = arch_get_irn_register(arch_env, pred);
const arch_register_t *reg;
ir_node *reg_node;
- if (arch_get_irn_reg_class(arch_env, node, -1) != regclass)
+ if (arch_get_irn_reg_class(node, -1) != regclass)
return;
reg = arch_get_irn_register(arch_env, node);
const arch_register_t *reg;
ir_node *reg_node;
- if (arch_get_irn_reg_class(arch_env, node, -1) != regclass)
+ if (arch_get_irn_reg_class(node, -1) != regclass)
return;
reg = arch_get_irn_register(arch_env, node);
/* transform call modes */
if (mode_is_data(mode)) {
- cls = arch_get_irn_reg_class(env_cg->arch_env, node, -1);
+ cls = arch_get_irn_reg_class(node, -1);
mode = cls->mode;
}
return node_added;
}
-static
-void keep_float_node_alive(x87_state *state, ir_node *node)
+static void keep_float_node_alive(ir_node *node)
{
ir_graph *irg;
ir_node *block;
irg = get_irn_irg(node);
block = get_nodes_block(node);
- cls = arch_get_irn_reg_class(state->sim->arch_env, node, -1);
+ cls = arch_get_irn_reg_class(node, -1);
in[0] = node;
keep = be_new_Keep(cls, irg, block, 1, in);
int op1_idx, out_idx;
unsigned live;
- cls = arch_get_irn_reg_class(sim->arch_env, n, -1);
+ cls = arch_get_irn_reg_class(n, -1);
if (cls->regs != ia32_vfp_regs)
return 0;
sched_add_before(next, node);
if (get_irn_n_edges(pred) == 0) {
- keep_float_node_alive(state, pred);
+ keep_float_node_alive(pred);
}
DB((dbg, LEVEL_1, "<<< %+F %s -> ?\n", node, op1->name));
dbg_info *dbg = get_irn_dbg_info(node);
ir_node *block = get_nodes_block(node);
- const arch_register_class_t *regclass = arch_get_irn_reg_class(cgenv->arch_env, node, 1);
+ const arch_register_class_t *regclass = arch_get_irn_reg_class(node, 1);
if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp])
{
ir_node *block = get_nodes_block(node);
ir_mode *mode = get_irn_mode(node);
- const arch_register_class_t *regclass = arch_get_irn_reg_class(cgenv->arch_env, node, -1);
+ const arch_register_class_t *regclass = arch_get_irn_reg_class(node, -1);
if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp])
{
* Emits code for a backend Copy node
*/
static void emit_be_Copy(const ir_node *irn) {
- const arch_register_class_t *regclass = arch_get_irn_reg_class(arch_env, irn, 0);
+ const arch_register_class_t *regclass = arch_get_irn_reg_class(irn, 0);
if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp]) {
be_emit_cstring("\tmr ");
* Emits code for a backend Perm node
*/
static void emit_be_Perm(const ir_node *irn) {
- const arch_register_class_t *regclass = arch_get_irn_reg_class(arch_env, irn, 0);
+ const arch_register_class_t *regclass = arch_get_irn_reg_class(irn, 0);
if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp]) {
be_emit_cstring("\txor ");