return 1;
}
+/**
+ * Map a Minus (a_l, a_h)
+ */
+static int map_Minus(ir_node *call, void *ctx) {
+ ir_graph *irg = current_ir_graph;
+ dbg_info *dbg = get_irn_dbg_info(call);
+ ir_node *block = get_nodes_block(call);
+ ir_node **params = get_Call_param_arr(call);
+ ir_type *method = get_Call_type(call);
+ ir_node *a_l = params[BINOP_Left_Low];
+ ir_node *a_h = params[BINOP_Left_High];
+ ir_mode *l_res_mode = get_type_mode(get_method_res_type(method, 0));
+ ir_mode *h_res_mode = get_type_mode(get_method_res_type(method, 1));
+ ir_node *l_res, *h_res, *cnst;
+
+ /* l_res = 0 - a_l */
+ l_res = new_rd_ia32_l_Minus(dbg, irg, block, a_l, l_res_mode);
+
+ /* h_res = 0 - a_h - carry */
+
+ /* too bad: we need 0 in a register here */
+ cnst = new_Const_long(h_res_mode, 0);
+ h_res = new_rd_ia32_l_SubC(dbg, irg, block, cnst, a_h, h_res_mode);
+
+ resolve_call(call, l_res, h_res, irg, block);
+
+ return 1;
+}
+
/* Ia32 implementation of intrinsic mapping. */
entity *ia32_create_intrinsic_fkt(ir_type *method, const ir_op *op,
const ir_mode *imode, const ir_mode *omode,
* @param env The transformation environment
* @return the created ia32 XXX node
*/
-#define GEN_LOWERED_OP(op) \
+#define GEN_LOWERED_OP(op) \
static ir_node *gen_ia32_l_##op(ia32_transform_env_t *env) { \
return gen_binop(env, get_binop_left(env->irn), get_binop_right(env->irn), new_rd_ia32_##op); \
} \
-#define GEN_LOWERED_SHIFT_OP(op) \
+#define GEN_LOWERED_UNOP(op) \
+ static ir_node *gen_ia32_l_##op(ia32_transform_env_t *env) { \
+ return gen_unop(env, get_unop_op(env->irn), new_rd_ia32_##op); \
+ } \
+
+#define GEN_LOWERED_SHIFT_OP(op) \
static ir_node *gen_ia32_l_##op(ia32_transform_env_t *env) { \
return gen_shift_binop(env, get_binop_left(env->irn), get_binop_right(env->irn), new_rd_ia32_##op); \
} \
GEN_LOWERED_OP(Sub)
GEN_LOWERED_OP(Mul)
+GEN_LOWERED_UNOP(Minus)
+
/**
* Transforms a l_MulS into a "real" MulS node.
*
GEN(ia32_l_AddC);
GEN(ia32_l_Sub);
GEN(ia32_l_SubC);
+ GEN(ia32_l_Minus);
GEN(ia32_l_Mul);
GEN(ia32_l_MulS);
GEN(ia32_l_Shl);