*/
FIRM_API ir_node *get_idx_irn(const ir_graph *irg, unsigned idx);
-
-/** The states of an ir graph.
- *
- * state phase values: phase_building, phase_high, phase_low, phase_backend.
- *
- * The graph is in phase_building during construction of the irgraph.
- * The construction is finished by a call to finalize_cons().
- *
- * Finalize_cons() sets the state to phase_high. All standard Firm nodes are
- * allowed.
- *
- * To get the irgraph into phase_low all Sel nodes must be removed and
- * replaced by explicit address computations. SymConst size and
- * type tag nodes must be removed (@@@ really?). Initialization of
- * memory allocated by Alloc must be explicit. @@@ More conditions?
- *
- * phase_backend is set if architecture specific machine nodes are inserted
- * (and probably most standard Firm are removed).
- */
-typedef enum {
- phase_building, /**< The graph is still being constructed. */
- phase_high, /**< The construction of the graph is finish, high level nodes may be present. */
- phase_low, /**< High level nodes are removed. */
- phase_backend /**< The graph is taken by the backend. Machine specific nodes may be present. */
-} irg_phase_state;
-
-/** Returns the phase_state of an IR graph. */
-FIRM_API irg_phase_state get_irg_phase_state(const ir_graph *irg);
-
-/** Sets the phase state of an IR graph. */
-FIRM_API void set_irg_phase_state(ir_graph *irg, irg_phase_state state);
-
/** state: op_pin_state_pinned
The graph is "op_pin_state_pinned" if all nodes are associated with a basic block.
It is in state "op_pin_state_floats" if nodes are in arbitrary blocks. In state
* Warning: It is only safe to enable this when you are sure that you
* apply all localopts to the fixpunkt. (=in optimize_graph_df)
*/
- IR_GRAPH_CONSTRAINT_OPTIMIZE_UNREACHABLE_CODE = 1U << 4,
+ IR_GRAPH_CONSTRAINT_OPTIMIZE_UNREACHABLE_CODE = 1U << 3,
+ /**
+ * The graph is being constructed: We have a current_block set,
+ * and blocks contain mapping of variable numbers to current
+ * values.
+ */
+ IR_GRAPH_CONSTRAINT_CONSTRUCTION = 1U << 4,
+ /**
+ * Intermediate language constructs not supported by the backend have
+ * been lowered.
+ */
+ IR_GRAPH_CONSTRAINT_TARGET_LOWERED = 1U << 5,
+ /**
+ * We have a backend graph: all data values have register constraints
+ * annotated.
+ */
+ IR_GRAPH_CONSTRAINT_BACKEND = 1U << 6,
} ir_graph_constraints_t;
ENUM_BITSET(ir_graph_constraints_t)
*/
FIRM_API ir_graph *get_const_code_irg(void);
-/** The phase state for the program.
- *
- * The phase state of the whole program is
- * building: if at least one graph is state_building
- * or one type is incomplete.
- * high: all graphs are in state high or low, all types are constructed.
- * low: all graphs are in state low, all types are in state layout fixed.
- */
-FIRM_API irg_phase_state get_irp_phase_state(void);
-/** Sets the phase state of the program */
-FIRM_API void set_irp_phase_state(irg_phase_state s);
-
-/**
- * Creates an ir_prog pass for set_irp_phase_state().
- *
- * @param name the name of this pass or NULL
- * @param state the state to set
- *
- * @return the newly created ir_prog pass
- */
-FIRM_API ir_prog_pass_t *set_irp_phase_state_pass(const char *name,
- irg_phase_state state);
-
/** Returns callee info state for the whole program.
* @see get_irg_callee_info_state() */
FIRM_API irg_callee_info_state get_irp_callee_info_state(void);
assure_edges(irg);
- /* reset phase data for all nodes in the block */
+ /* reset data for all nodes in the block */
foreach_out_edge(block, edge) {
ir_node *irn = get_edge_src_irn(edge);
irn_height_t *ih = get_height_data(h, irn);
current_ir_graph = irg;
/* Update graph state */
- assert(get_irg_phase_state(irg) != phase_building);
+ assert(!irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_CONSTRUCTION));
/* Count the number of blocks in the graph. */
n_blocks = 0;
void free_dom(ir_graph *irg)
{
/* Update graph state */
- assert(get_irg_phase_state(irg) != phase_building);
clear_irg_properties(irg, IR_GRAPH_PROPERTY_CONSISTENT_DOMINANCE);
/* With the implementation right now there is nothing to free */
current_ir_graph = irg;
/* Update graph state */
- assert(get_irg_phase_state(irg) != phase_building);
+ assert(!irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_CONSTRUCTION));
/* Count the number of blocks in the graph. */
n_blocks = 0;
void free_postdom(ir_graph *irg)
{
/* Update graph state */
- assert(get_irg_phase_state(irg) != phase_building);
clear_irg_properties(irg, IR_GRAPH_PROPERTY_CONSISTENT_POSTDOMINANCE);
-
- /* With the implementation right now there is nothing to free,
- but better call it anyways... */
}
/* Ensure, that the ir_edges are computed. */
assure_edges(irg);
- set_irg_phase_state(irg, phase_backend);
+ add_irg_constraints(irg, IR_GRAPH_CONSTRAINT_BACKEND);
be_info_init_irg(irg);
dump(DUMP_INITIAL, irg, "prepared");
initialize_isa();
- /* shouldn't lower program twice */
- assert(get_irp_phase_state() != phase_low);
-
isa_if->lower_for_target();
/* set the phase to low */
for (i = get_irp_n_irgs(); i > 0;) {
ir_graph *irg = get_irp_irg(--i);
- set_irg_phase_state(irg, phase_low);
+ assert(!irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_TARGET_LOWERED));
+ add_irg_constraints(irg, IR_GRAPH_CONSTRAINT_TARGET_LOWERED);
}
- set_irp_phase_state(phase_low);
}
/**
be_timing = (be_options.timing == BE_TIME_ON);
/* perform target lowering if it didn't happen yet */
- if (get_irp_phase_state() != phase_low)
+ if (get_irp_n_irgs() > 0 && !irg_is_constrained(get_irp_irg(0), IR_GRAPH_CONSTRAINT_TARGET_LOWERED))
be_lower_for_target();
if (be_timing) {
ir_node *new_d_Const_long(dbg_info *db, ir_mode *mode, long value)
{
- assert(get_irg_phase_state(current_ir_graph) == phase_building);
+ assert(irg_is_constrained(current_ir_graph, IR_GRAPH_CONSTRAINT_CONSTRUCTION));
return new_rd_Const_long(db, current_ir_graph, mode, value);
}
ir_node *new_d_simpleSel(dbg_info *db, ir_node *store, ir_node *objptr,
ir_entity *ent)
{
- assert(get_irg_phase_state(current_ir_graph) == phase_building);
+ assert(irg_is_constrained(current_ir_graph, IR_GRAPH_CONSTRAINT_CONSTRUCTION));
return new_rd_Sel(db, current_ir_graph->current_block,
store, objptr, 0, NULL, ent);
}
ir_node *new_d_SymConst(dbg_info *db, ir_mode *mode, symconst_symbol value,
symconst_kind kind)
{
- assert(get_irg_phase_state(current_ir_graph) == phase_building);
+ assert(irg_is_constrained(current_ir_graph, IR_GRAPH_CONSTRAINT_CONSTRUCTION));
return new_rd_SymConst(db, current_ir_graph, mode, value, kind);
}
size_t n_outs, ir_asm_constraint *outputs,
size_t n_clobber, ident *clobber[], ident *text)
{
- assert(get_irg_phase_state(current_ir_graph) == phase_building);
+ assert(irg_is_constrained(current_ir_graph, IR_GRAPH_CONSTRAINT_CONSTRUCTION));
return new_rd_ASM(db, current_ir_graph->current_block, mem, arity, in,
inputs, n_outs, outputs, n_clobber, clobber, text);
}
ir_node *new_d_DivRL(dbg_info *dbgi, ir_node * irn_mem, ir_node * irn_left, ir_node * irn_right, ir_mode* resmode, op_pin_state pin_state)
{
ir_node *res;
- assert(get_irg_phase_state(current_ir_graph) == phase_building);
+ assert(irg_is_constrained(current_ir_graph, IR_GRAPH_CONSTRAINT_CONSTRUCTION));
res = new_rd_DivRL(dbgi, current_ir_graph->current_block, irn_mem, irn_left, irn_right, resmode, pin_state);
return res;
}
{
ir_node *res;
- assert(get_irg_phase_state(irg) == phase_building);
+ assert(irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_CONSTRUCTION));
/* creates a new dynamic in-array as length of in is -1 */
res = new_ir_node(dbgi, irg, NULL, op_Block, mode_BB, -1, NULL);
void set_r_cur_block(ir_graph *irg, ir_node *target)
{
- assert(get_irg_phase_state(irg) == phase_building);
+ assert(irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_CONSTRUCTION));
assert(target == NULL || is_Block(target));
assert(target == NULL || get_irn_irg(target) == irg);
irg->current_block = target;
ir_node *get_r_cur_block(ir_graph *irg)
{
- assert(get_irg_phase_state(irg) == phase_building);
+ assert(irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_CONSTRUCTION));
return irg->current_block;
}
ir_node *get_r_value(ir_graph *irg, int pos, ir_mode *mode)
{
- assert(get_irg_phase_state(irg) == phase_building);
+ assert(irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_CONSTRUCTION));
assert(pos >= 0);
return get_r_value_internal(irg->current_block, pos + 1, mode);
void set_r_value(ir_graph *irg, int pos, ir_node *value)
{
- assert(get_irg_phase_state(irg) == phase_building);
+ assert(irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_CONSTRUCTION));
assert(pos >= 0);
assert(pos+1 < irg->n_loc);
assert(is_ir_node(value));
ir_node *get_r_store(ir_graph *irg)
{
- assert(get_irg_phase_state(irg) == phase_building);
+ assert(irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_CONSTRUCTION));
return get_r_value_internal(irg->current_block, 0, mode_M);
}
{
ir_node *load, *pload, *pred, *in[2];
- assert(get_irg_phase_state(irg) == phase_building);
+ assert(irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_CONSTRUCTION));
/* Beware: due to dead code elimination, a store might become a Bad node even in
the construction phase. */
assert((get_irn_mode(store) == mode_M || is_Bad(store)) && "storing non-memory node");
ir_node *end_block = get_irg_end_block(irg);
mature_immBlock(end_block);
- set_irg_phase_state(irg, phase_high);
+ clear_irg_constraints(irg, IR_GRAPH_CONSTRAINT_CONSTRUCTION);
}
void irp_finalize_cons(void)
for (i = 0, n = get_irp_n_irgs(); i < n; ++i) {
irg_finalize_cons(get_irp_irg(i));
}
- irp->phase_state = phase_high;
}
ir_node *new_Const_long(ir_mode *mode, long value)
res->attr.block.backedge = new_backedge_arr(irg->obst, arity);
set_Block_matured(res, 1);
/* Create and initialize array for Phi-node construction. */
- if (get_irg_phase_state(irg) == phase_building) {
+ if (irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_CONSTRUCTION)) {
res->attr.block.graph_arr = NEW_ARR_D(ir_node *, irg->obst, irg->n_loc);
memset(res->attr.block.graph_arr, 0, irg->n_loc * sizeof(ir_node*));
}
{
ir_graph *irg = get_irn_irg(n);
- /* Handle graph state */
- assert(get_irg_phase_state(irg) != phase_building);
-
if (get_opt_global_cse())
set_irg_pinned(irg, op_pin_state_floats);
clear_irg_properties(irg, IR_GRAPH_PROPERTY_CONSISTENT_DOMINANCE);
void irg_set_nloc(ir_graph *res, int n_loc)
{
- assert(res->phase_state == phase_building);
+ assert(irg_is_constrained(res, IR_GRAPH_CONSTRAINT_CONSTRUCTION));
res->n_loc = n_loc + 1; /* number of local variables that are never
dereferenced in this graph plus one for
res->obst = XMALLOC(struct obstack);
obstack_init(res->obst);
- res->phase_state = phase_building;
+ /* graphs are in construction mode by default */
+ add_irg_constraints(res, IR_GRAPH_CONSTRAINT_CONSTRUCTION);
irg_set_nloc(res, n_loc);
/* descriptions will be allocated on demand */
res->last_node_idx = 0;
- res->phase_state = phase_building;
res->irg_pinned_state = op_pin_state_pinned;
res->fp_model = fp_model_precise;
res->ent = NULL;
res->frame_type = NULL;
+ add_irg_constraints(res, IR_GRAPH_CONSTRAINT_CONSTRUCTION);
+
/* the Anchor node must be created first */
res->anchor = new_r_Anchor(res);
res->last_node_idx = 0;
- res->phase_state = irg->phase_state;
res->irg_pinned_state = irg->irg_pinned_state;
res->fp_model = irg->fp_model;
irp_reserve_resources(irp, IRP_RESOURCE_ENTITY_LINK);
res->frame_type = clone_frame_type(irg->frame_type);
- res->phase_state = irg->phase_state;
-
ir_reserve_resources(irg, IR_RESOURCE_IRN_LINK);
/* copy all nodes from the graph irg to the new graph res */
return 0;
}
-irg_phase_state (get_irg_phase_state)(const ir_graph *irg)
-{
- return get_irg_phase_state_(irg);
-}
-
-void (set_irg_phase_state)(ir_graph *irg, irg_phase_state state)
-{
- set_irg_phase_state_(irg, state);
-}
-
op_pin_state (get_irg_pinned)(const ir_graph *irg)
{
return get_irg_pinned_(irg);
return irg->obst;
}
-
-static inline irg_phase_state get_irg_phase_state_(const ir_graph *irg)
-{
- return irg->phase_state;
-}
-
-static inline void set_irg_phase_state_(ir_graph *irg, irg_phase_state state)
-{
- irg->phase_state = state;
-}
-
static inline op_pin_state get_irg_pinned_(const ir_graph *irg)
{
return irg->irg_pinned_state;
#define get_irg_frame_type(irg) get_irg_frame_type_(irg)
#define set_irg_frame_type(irg, ftp) set_irg_frame_type_(irg, ftp)
#define get_irg_obstack(irg) get_irg_obstack_(irg)
-#define get_irg_phase_state(irg) get_irg_phase_state_(irg)
-#define set_irg_phase_state(irg, state) set_irg_phase_state_(irg, state)
#define get_irg_pinned(irg) get_irg_pinned_(irg)
#define set_irg_pinned(irg, p) set_irg_pinned_(irg, p)
#define get_irg_callee_info_state(irg) get_irg_callee_info_state_(irg)
edges_notify_edge(res, i - 1, res->in[i], NULL, irg);
hook_new_node(irg, res);
- if (get_irg_phase_state(irg) == phase_backend) {
+ if (irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_BACKEND)) {
be_info_new_node(irg, res);
}
(void) b;
/* do not CSE Phi-nodes without any inputs when building new graphs */
if (get_irn_arity(a) == 0 &&
- get_irg_phase_state(get_irn_irg(a)) == phase_building) {
+ irg_is_constrained(get_irn_irg(a), IR_GRAPH_CONSTRAINT_CONSTRUCTION)) {
return 1;
}
return 0;
ir_node *first_val = NULL; /* to shutup gcc */
if (!get_opt_optimize() &&
- get_irg_phase_state(get_irn_irg(n)) != phase_building)
+ !irg_is_constrained(get_irn_irg(n), IR_GRAPH_CONSTRAINT_CONSTRUCTION))
return n;
n_preds = get_Phi_n_preds(n);
ir_node *optimize_in_place(ir_node *n)
{
ir_graph *irg = get_irn_irg(n);
- /* Handle graph state */
- assert(get_irg_phase_state(irg) != phase_building);
if (get_opt_global_cse())
set_irg_pinned(irg, op_pin_state_floats);
set_class_final(irp->segment_types[IR_SEGMENT_GLOBAL], 1);
irp->const_code_irg = new_const_code_irg();
- irp->phase_state = phase_building;
irp->class_cast_state = ir_class_casts_transitive;
irp->globals_entity_usage_state = ir_entity_usage_not_computed;
#undef IDENT
return get_const_code_irg_();
}
-irg_phase_state get_irp_phase_state(void)
-{
- return irp->phase_state;
-}
-
-void set_irp_phase_state(irg_phase_state s)
-{
- irp->phase_state = s;
-}
-
-typedef struct pass_t {
- ir_prog_pass_t pass;
- irg_phase_state state;
-} pass_t;
-
-/**
- * Wrapper for setting the state of a whole ir_prog.
- */
-static int set_irp_phase_state_wrapper(ir_prog *irp, void *context)
-{
- pass_t *pass = (pass_t *)context;
- irg_phase_state state = pass->state;
- size_t i, n;
-
- (void)irp;
-
- /* set the phase of all graphs */
- for (i = 0, n = get_irp_n_irgs(); i < n; ++i)
- set_irg_phase_state(get_irp_irg(i), state);
-
- /* set the irp phase */
- set_irp_phase_state(state);
-
- return 0;
-}
-
-ir_prog_pass_t *set_irp_phase_state_pass(const char *name, irg_phase_state state)
-{
- struct pass_t *pass = XMALLOCZ(struct pass_t);
-
- def_prog_pass_constructor(
- &pass->pass, name ? name : "set_irp_phase", set_irp_phase_state_wrapper);
- pass->state = state;
-
- /* no dump/verify */
- pass->pass.verify_irprog = ir_prog_no_verify;
- pass->pass.dump_irprog = ir_prog_no_dump;
-
- return &pass->pass;
-}
-
void set_irp_ip_outedges(ir_node ** ip_outedges)
{
irp->ip_outedges = ip_outedges;
void ssa_cons_start(ir_graph *irg, int n_loc)
{
- /* for now we support only phase_high graphs */
- assert(irg->phase_state == phase_high);
-
- /* reset the phase to phase building: some optimization might depend on it */
- set_irg_phase_state(irg, phase_building);
+ add_irg_constraints(irg, IR_GRAPH_CONSTRAINT_CONSTRUCTION);
irg_set_nloc(irg, n_loc);
/* -- Fields indicating different states of irgraph -- */
ir_graph_properties_t properties;
ir_graph_constraints_t constraints;
- irg_phase_state phase_state; /**< Compiler phase. */
op_pin_state irg_pinned_state; /**< Flag for status of nodes. */
ir_typeinfo_state typeinfo_state; /**< Validity of type information. */
irg_callee_info_state callee_info_state; /**< Validity of callee information. */
ident **global_asms; /**< An array of global ASM insertions. */
/* -- states of and access to generated information -- */
- irg_phase_state phase_state; /**< The state of construction. */
-
ir_node **ip_outedges; /**< A huge Array that contains all out edges
in interprocedural view. */
if ((mode_is_reference(mode)) && is_compound_type(get_method_param_type(mt, proj)))
/* value argument */ break;
- if (get_irg_phase_state(get_irn_irg(pred)) != phase_backend) {
+ if (!irg_is_constrained(get_irn_irg(pred), IR_GRAPH_CONSTRAINT_BACKEND)) {
ASSERT_AND_RET_DBG(
(mode == get_type_mode(get_method_param_type(mt, proj))),
"Mode of Proj from Start doesn't match mode of param type.", 0,
ASSERT_AND_RET(get_Block_n_cfgpreds(n) == 0, "Start Block node", 0);
}
- if (n == get_irg_end_block(irg) && get_irg_phase_state(irg) != phase_backend) {
+ if (n == get_irg_end_block(irg) && !irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_BACKEND)) {
/* End block may only have Return, Raise or fragile ops as preds. */
for (i = get_Block_n_cfgpreds(n) - 1; i >= 0; --i) {
ir_node *pred = skip_Proj(get_Block_cfgpred(n, i));
for (i = get_Return_n_ress(n) - 1; i >= 0; --i) {
ir_type *res_type = get_method_res_type(mt, i);
- if (get_irg_phase_state(irg) != phase_backend) {
+ if (irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_BACKEND)) {
if (is_atomic_type(res_type)) {
ASSERT_AND_RET_DBG(
get_irn_mode(get_Return_res(n, i)) == get_type_mode(res_type),
for (i = 0; i < get_method_n_params(mt); i++) {
ir_type *t = get_method_param_type(mt, i);
- if (get_irg_phase_state(irg) != phase_backend) {
+ if (irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_BACKEND)) {
if (is_atomic_type(t)) {
ASSERT_AND_RET_DBG(
get_irn_mode(get_Call_param(n, i)) == get_type_mode(t),
/* a Phi node MUST have the same number of inputs as its block
* Exception is a phi with 0 inputs which is used when (re)constructing the
* SSA form */
- if (! is_Bad(block) && get_irg_phase_state(get_irn_irg(n)) != phase_building && get_irn_arity(n) > 0) {
+ if (! is_Bad(block)
+ && !irg_is_constrained(get_irn_irg(n), IR_GRAPH_CONSTRAINT_CONSTRUCTION)
+ && get_irn_arity(n) > 0) {
ASSERT_AND_RET_DBG(
get_irn_arity(n) == get_irn_arity(block),
"wrong number of inputs in Phi node", 0,
ir_mode *op2mode = get_irn_mode(get_Load_ptr(n));
ASSERT_AND_RET(op1mode == mode_M, "Load node", 0);
- if (get_irg_phase_state(irg) != phase_backend) {
+ if (!irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_BACKEND)) {
ASSERT_AND_RET(mode_is_reference(op2mode), "Load node", 0 );
}
ASSERT_AND_RET( mymode == mode_T, "Load node", 0 );
ir_mode *op3mode = get_irn_mode(get_Store_value(n));
ASSERT_AND_RET(op1mode == mode_M && mode_is_datab(op3mode), "Store node", 0 );
- if (get_irg_phase_state(irg) != phase_backend) {
+ if (!irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_BACKEND)) {
ASSERT_AND_RET(mode_is_reference(op2mode), "Store node", 0 );
}
ASSERT_AND_RET(mymode == mode_T, "Store node", 0);
/* CopyB: BB x M x ref x ref --> M x X */
ASSERT_AND_RET(mymode == mode_T && op1mode == mode_M, "CopyB node", 0);
- if (get_irg_phase_state(irg) != phase_backend) {
+ if (!irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_BACKEND)) {
ASSERT_AND_RET(mode_is_reference(op2mode) && mode_is_reference(op3mode),
"CopyB node", 0 );
}
env.changed = false;
env.phis_moved = false;
- assert(get_irg_phase_state(irg) != phase_building);
-
/* if the graph is not pinned, we cannot determine empty blocks */
assert(get_irg_pinned(irg) != op_pin_state_floats &&
"Control flow optimization need a pinned graph");
irg = get_irn_irg(n);
start_block = get_irg_start_block(irg);
if (new_block == start_block && block != start_block &&
- get_irg_phase_state(irg) != phase_backend) {
+ !irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_BACKEND)) {
assert(get_irn_n_edges_kind(start_block, EDGE_KIND_BLOCK) == 1);
const ir_edge_t *edge = get_block_succ_first(start_block);
new_block = get_edge_src_irn(edge);
waitq *worklist;
/* Handle graph state */
- assert(get_irg_phase_state(irg) != phase_building);
assure_irg_properties(irg,
IR_GRAPH_PROPERTY_NO_CRITICAL_EDGES |
IR_GRAPH_PROPERTY_NO_UNREACHABLE_CODE |
/* inform statistics that we started a dead-node elimination run */
hook_dead_node_elim(irg, 1);
- assert(get_irg_phase_state(irg) != phase_building);
-
/* Handle graph state */
free_callee_info(irg);
free_irg_outs(irg);
FIRM_DBG_REGISTER(dbg, "firm.opt.ldstopt");
- assert(get_irg_phase_state(irg) != phase_building);
assert(get_irg_pinned(irg) != op_pin_state_floats &&
"LoadStore optimization needs pinned graph");
set_optimize(0);
/* Handle graph state */
- assert(get_irg_phase_state(irg) != phase_building);
assert(get_irg_pinned(irg) == op_pin_state_pinned);
assert(get_irg_pinned(called_graph) == op_pin_state_pinned);
clear_irg_properties(irg, IR_GRAPH_PROPERTY_CONSISTENT_DOMINANCE
inline_env_t env;
current_ir_graph = irg;
- /* Handle graph state */
- assert(get_irg_phase_state(irg) != phase_building);
free_callee_info(irg);
/* Find Call nodes to inline.
for (i = 0; i < n_irgs; ++i) {
ir_graph *irg = get_irp_irg(i);
- assert(get_irg_phase_state(irg) != phase_building);
free_callee_info(irg);
assure_irg_properties(irg,
*/
void optimize_reassociation(ir_graph *irg)
{
- assert(get_irg_phase_state(irg) != phase_building);
assert(get_irg_pinned(irg) != op_pin_state_floats &&
"Reassociation needs pinned graph to work properly");
{% endfilter %})
{
ir_node *res;
- assert(get_irg_phase_state(current_ir_graph) == phase_building);
+ assert(irg_is_constrained(current_ir_graph, IR_GRAPH_CONSTRAINT_CONSTRUCTION));
res = new_rd_{{node.name}}(
{%- filter parameters %}
dbgi
set_Block_matured(res, 1);
/* Create and initialize array for Phi-node construction. */
- if (get_irg_phase_state(irg) == phase_building) {
+ if (irg_is_constrained(irg, IR_GRAPH_CONSTRAINT_CONSTRUCTION)) {
res->attr.block.graph_arr = NEW_ARR_D(ir_node *, irg->obst, irg->n_loc);
memset(res->attr.block.graph_arr, 0, irg->n_loc * sizeof(ir_node*));
}