}
}
+static ir_node *gen_Proj_ASM(ir_node *node)
+{
+ ir_node *pred;
+ ir_node *new_pred;
+ ir_node *block;
+
+ if (get_irn_mode(node) != mode_M)
+ return be_duplicate_node(node);
+
+ pred = get_Proj_pred(node);
+ new_pred = be_transform_node(pred);
+ block = get_nodes_block(new_pred);
+ return new_r_Proj(current_ir_graph, block, new_pred, mode_M,
+ get_ia32_n_res(new_pred) + 1);
+}
+
/**
* Transform and potentially renumber Proj nodes.
*/
}
case iro_Load:
return gen_Proj_Load(node);
+ case iro_ASM:
+ return gen_Proj_ASM(node);
case iro_Div:
case iro_Mod:
case iro_DivMod:
ir_node *proj = get_edge_src_irn(edge);
int pn = get_Proj_proj(proj);
- assert(get_irn_mode(proj) == mode_M || pn < n_outs);
+ if (get_irn_mode(proj) == mode_M)
+ continue;
+
+ assert(pn < n_outs);
found_projs |= 1 << pn;
}
continue;
}
- req = get_ia32_out_req(node, i);
+ req = get_ia32_out_req(node, i);
cls = req->cls;
if(cls == NULL) {
continue;