}
}
+void sparc_emit_source_reg_and_offset(const ir_node *node, int regpos,
+ int offpos)
+{
+ const arch_register_t *reg = arch_get_irn_register_in(node, regpos);
+ const sparc_load_store_attr_t *attr;
+
+ if (reg == &sparc_registers[REG_SP]) {
+ attr = get_sparc_load_store_attr_const(node);
+ if (!attr->is_reg_reg
+ && attr->base.immediate_value < SPARC_MIN_STACKSIZE) {
+
+ ir_fprintf(stderr, "warning: emitting stack pointer relative load/store with offset < %d\n", SPARC_MIN_STACKSIZE);
+ }
+ }
+
+ sparc_emit_source_register(node, regpos);
+ sparc_emit_offset(node, offpos);
+}
+
void sparc_emit_float_load_store_mode(const ir_node *node)
{
const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(node);
case 64: be_emit_char('d'); return;
case 128: be_emit_char('q'); return;
}
- panic("invalid flaot load/store mode %+F", mode);
+ panic("invalid float load/store mode %+F", mode);
}
/**
void sparc_emit_load_mode(const ir_node *node);
void sparc_emit_store_mode(const ir_node *node);
void sparc_emit_float_load_store_mode(const ir_node *node);
+void sparc_emit_source_reg_and_offset(const ir_node *node, int regpos,
+ int offpos);
void sparc_emit_fp_mode_suffix(const ir_node *node);
void sparc_emit_fp_conv_source(const ir_node *node);
void sparc_emit_fp_conv_destination(const ir_node *node);
FCONVD => "${arch}_emit_fp_conv_destination(node);",
O1 => "${arch}_emit_offset(node, 1);",
O2 => "${arch}_emit_offset(node, 2);",
+ S0O1 => "${arch}_emit_source_reg_and_offset(node, 0, 1);",
+ S1O2 => "${arch}_emit_source_reg_and_offset(node, 1, 2);",
);
$default_attr_type = "sparc_attr_t";
ins => [ "ptr", "mem" ],
outs => [ "res", "M" ],
attr_type => "sparc_load_store_attr_t",
- emit => '. ld%LM [%S0%O1], %D0'
+ emit => '. ld%LM [%S0O1], %D0'
},
SetHi => {
ins => [ "val", "ptr", "mem" ],
outs => [ "M" ],
attr_type => "sparc_load_store_attr_t",
- emit => '. st%SM %S0, [%S1%O2]'
+ emit => '. st%SM %S0, [%S1O2]'
},
Save => {