{
if (irn->op == op_amd64_Add) {
be_emit_cstring("\tadd ");
- } else if (irn->op == op_amd64_Mul) {
- be_emit_cstring("\tmul ");
} else if (irn->op == op_amd64_Sub) {
be_emit_cstring("\tsub ");
}
set_emitter(op_be_IncSP, emit_be_IncSP);
set_emitter(op_amd64_Add, emit_amd64_binop);
- set_emitter(op_amd64_Mul, emit_amd64_binop);
set_emitter(op_be_Start, emit_nothing);
set_emitter(op_be_Keep, emit_nothing);
modified_flags => 1,
},
Mul => {
- op_flags => "C",
- irn_flags => "R",
- state => "exc_pinned",
- reg_req => { in => [ "gp", "gp" ],
- out => [ "gp" ] },
- in => [ "left", "right" ],
- outs => [ "res" ],
- mode => $mode_gp,
- modified_flags => 1,
+ # we should not rematrialize this node. It produces 2 results and has
+ # very strict constraints
+ state => "exc_pinned",
+ reg_req => { in => [ "rax", "gp" ],
+ out => [ "rax rdx" ] },
+ ins => [ "left", "right" ],
+ emit => '. mul %S2',
+ outs => [ "res" ],
+ mode => $mode_gp,
+ am => "source,binary",
+ modified_flags => $status_flags
},
Sub => {
irn_flags => "R",
return res;
}
+static ir_node *gen_Mul(ir_node *node) {
+ ir_node *block = be_transform_node(get_nodes_block(node));
+ /* ir_mode *mode = get_irn_mode(node); */
+ ir_node *op1 = get_Mul_left(node);
+ ir_node *op2 = get_Mul_right(node);
+ dbg_info *dbgi = get_irn_dbg_info(node);
+ ir_node *new_op1 = be_transform_node(op1);
+ ir_node *new_op2 = be_transform_node(op2);
+
+ ir_node *res = new_bd_amd64_Mul(dbgi, block, new_op1, new_op2);
+ be_dep_on_frame (res);
+ return res;
+}
+
static ir_node *gen_Jmp(ir_node *node)
{
ir_node *block = get_nodes_block(node);
set_transformer(op_Const, gen_Const);
set_transformer(op_SymConst, gen_SymConst);
set_transformer(op_Add, gen_Add);
+ set_transformer(op_Mul, gen_Mul);
set_transformer(op_be_Call, gen_be_Call);
set_transformer(op_be_FrameAddr, gen_be_FrameAddr);
set_transformer(op_Conv, gen_Conv);