int n = get_method_n_params(method_type);
int biggest_n = -1;
int stack_idx = 0;
- int i, ignore;
+ int i, ignore_1, ignore_2;
ir_mode **modes;
const arch_register_t *reg;
be_abi_call_flags_t call_flags;
// if (cc & cc_reg_param) {
if (1) {
/* determine the number of parameters passed via registers */
- biggest_n = ia32_get_n_regparam_class(n, modes, &ignore, &ignore);
+ biggest_n = ia32_get_n_regparam_class(n, modes, &ignore_1, &ignore_2);
/* loop over all parameters and set the register requirements */
for (i = 0; i <= biggest_n; i++) {
/* verify that this function is never called on non-AM supporting operations */
assert(get_ia32_am_support(n) != ia32_am_None && "emit binop expects addressmode support");
+#define PRODUCES_RESULT(n) !(is_ia32_St(n) || is_ia32_CondJmp(n) || is_ia32_fCondJmp(n) || is_ia32_SwitchJmp(n))
+
if (! buf) {
buf = xcalloc(1, SNPRINTF_BUF_LEN);
}
else {
const arch_register_t *in1 = get_in_reg(n, 2);
const arch_register_t *in2 = get_in_reg(n, 3);
- const arch_register_t *out = get_ia32_n_res(n) > 0 ? get_out_reg(n, 0) : NULL;
+ const arch_register_t *out = PRODUCES_RESULT(n) ? get_out_reg(n, 0) : NULL;
const arch_register_t *in;
in = out ? (REGS_ARE_EQUAL(out, in2) ? in1 : in2) : in2;
assert(0 && "unsupported op type");
}
+#undef PRODUCES_RESULT
+
return buf;
}
int ia32_get_n_regparam_class(int n, ir_mode **modes, int *n_int, int *n_float) {
int i, finished = 0;
+ *n_int = 0;
+ *n_float = 0;
+
for (i = 0; i < n && !finished; i++) {
- if (mode_is_int(modes[i])) {
+ if (mode_is_int(modes[i]) || mode_is_reference(modes[i])) {
*n_int = *n_int + 1;
}
else if (mode_is_float(modes[i])) {