/* we might have to rewrite x87 virtual registers */
if (cg->do_x87_sim) {
- x87_simulate_graph(cg->arch_env, cg->birg);
+ x87_simulate_graph(cg->birg);
}
/* do peephole optimisations */
update_liveness(sim, block);
} /* update_liveness_walker */
-/**
- * Run a simulation and fix all virtual instructions for a graph.
- *
- * @param env the architecture environment
- * @param irg the current graph
- *
- * Needs a block-schedule.
- */
-void x87_simulate_graph(const arch_env_t *arch_env, be_irg_t *birg)
+void x87_simulate_graph(be_irg_t *birg)
{
ir_node *block, *start_block;
blk_state *bl_state;
x87_simulator sim;
ir_graph *irg = be_get_birg_irg(birg);
- (void)arch_env;
/* create the simulator */
x87_init_simulator(&sim, irg);
* Replaces all virtual floating point instructions and registers
* by real ones.
*
- * @param env architecture environment
* @param birg the graph to simulate and patch
*
- * Registers must be allocated. Needs a block-schedule.
+ * Registers must be allocated.
*/
-void x87_simulate_graph(const arch_env_t *env, be_irg_t *birg);
+void x87_simulate_graph(be_irg_t *birg);
#endif /* FIRM_BE_IA32_IA32_X87_H */