irg_walk_blkwise_graph(cg->irg, NULL, ia32_after_ra_walker, self);
/* if we do x87 code generation, rewrite all the virtual instructions and registers */
- if (USE_x87(cg)) {
+ if (cg->used_x87) {
x87_simulate_graph(cg->arch_env, cg->irg, cg->blk_sched);
be_dump(cg->irg, "-x87", dump_ir_extblock_graph_sched);
}
cg->birg = birg;
cg->blk_sched = NULL;
cg->fp_kind = isa->fp_kind;
+ cg->used_x87 = 0;
+
FIRM_DBG_REGISTER(cg->mod, "firm.be.ia32.cg");
/* set optimizations */
cg->opt.incdec = 0;
- cg->opt.doam = USE_SSE2(cg) ? 1 : 0;
+ cg->opt.doam = 1;
cg->opt.placecnst = 1;
cg->opt.immops = 1;
cg->opt.extbb = 1;
ir_node **blk_sched; /**< an array containing the scheduled blocks */
ia32_optimize_t opt; /**< contains optimization information */
char fp_kind; /**< floating point kind */
+ char used_x87; /**< x87 floating point unit used in this graph */
} ia32_code_gen_t;
typedef struct _ia32_isa_t {