Just use new_NoMem(), it is always the current irg.

[r23534]

diff --git a/ir/be/arm/arm_transform.c b/ir/be/arm/arm_transform.c
index 7caa8d0..523df19 100644 (file)
--- a/ir/be/arm/arm_transform.c
+++ b/ir/be/arm/arm_transform.c
@@ -1166,7 +1166,7 @@ static ir_node *gen_StackParam(ir_node *irn) {
        ir_node  *block    = be_transform_node(get_nodes_block(node));
        ir_node   *new_op = NULL;
        ir_node   *noreg  = ia32_new_NoReg_gp(env->cg);
-       ir_node   *mem    = new_rd_NoMem(env->irg);
+       ir_node   *mem    = new_NoMem();
        ir_node   *ptr    = get_irn_n(irn, 0);
        ir_entity *ent    = be_get_frame_entity(irn);
        ir_mode   *mode   = env->mode;

diff --git a/ir/be/ia32/bearch_ia32.c b/ir/be/ia32/bearch_ia32.c
index 4bcedb1..e89c330 100644 (file)
--- a/ir/be/ia32/bearch_ia32.c
+++ b/ir/be/ia32/bearch_ia32.c
@@ -598,7 +598,7 @@ static arch_inverse_t *ia32_get_inverse(const ir_node *irn, int i, arch_inverse_
        mode     = get_irn_mode(irn);
        irn_mode = get_irn_mode(irn);
        noreg    = get_irn_n(irn, 0);
-       nomem    = new_r_NoMem(irg);
+       nomem    = new_NoMem();
        dbg      = get_irn_dbg_info(irn);
 
        /* initialize structure */
@@ -1107,7 +1107,7 @@ static void transform_to_Store(ia32_code_gen_t *cg, ir_node *node) {
        const ir_node *spillval = get_irn_n(node, be_pos_Spill_val);
        ir_mode *mode  = get_spill_mode(spillval);
        ir_node *noreg = ia32_new_NoReg_gp(cg);
-       ir_node *nomem = new_rd_NoMem(irg);
+       ir_node *nomem = new_NoMem();
        ir_node *ptr   = get_irg_frame(irg);
        ir_node *val   = get_irn_n(node, be_pos_Spill_val);
        ir_node *store;

diff --git a/ir/be/ia32/ia32_finish.c b/ir/be/ia32/ia32_finish.c
index d8ba800..a882eed 100644 (file)
--- a/ir/be/ia32/ia32_finish.c
+++ b/ir/be/ia32/ia32_finish.c
@@ -68,7 +68,7 @@ static void ia32_transform_sub_to_neg_add(ir_node *irn, ia32_code_gen_t *cg)
 
        noreg    = ia32_new_NoReg_gp(cg);
        noreg_fp = ia32_new_NoReg_xmm(cg);
-       nomem    = new_rd_NoMem(cg->irg);
+       nomem    = new_NoMem();
        in1      = get_irn_n(irn, n_ia32_binary_left);
        in2      = get_irn_n(irn, n_ia32_binary_right);
        in1_reg  = arch_get_irn_register(in1);

diff --git a/ir/be/ia32/ia32_transform.c b/ir/be/ia32/ia32_transform.c
index 9909feb..ba4f766 100644 (file)
--- a/ir/be/ia32/ia32_transform.c
+++ b/ir/be/ia32/ia32_transform.c
@@ -1651,7 +1651,7 @@ static ir_node *gen_Minus(ir_node *node)
                         * several AM nodes... */
                        ir_node *noreg_gp  = ia32_new_NoReg_gp(env_cg);
                        ir_node *noreg_xmm = ia32_new_NoReg_xmm(env_cg);
-                       ir_node *nomem     = new_rd_NoMem(irg);
+                       ir_node *nomem     = new_NoMem();
 
                        new_node = new_rd_ia32_xXor(dbgi, irg, block, noreg_gp, noreg_gp,
                                                    nomem, new_op, noreg_xmm);
@@ -3299,7 +3299,7 @@ static ir_node *gen_Conv(ir_node *node)
        int       src_bits  = get_mode_size_bits(src_mode);
        int       tgt_bits  = get_mode_size_bits(tgt_mode);
        ir_node  *noreg     = ia32_new_NoReg_gp(env_cg);
-       ir_node  *nomem     = new_rd_NoMem(irg);
+       ir_node  *nomem     = new_NoMem();
        ir_node  *res       = NULL;
 
        if (src_mode == mode_b) {

diff --git a/ir/be/ia32/ia32_x87.c b/ir/be/ia32/ia32_x87.c
index 22ffaa8..4909fe6 100644 (file)
--- a/ir/be/ia32/ia32_x87.c
+++ b/ir/be/ia32/ia32_x87.c
@@ -1264,7 +1264,7 @@ static int sim_store(x87_state *state, ir_node *n, ir_op *op, ir_op *op_p)
 
                                block = get_nodes_block(n);
                                irg   = get_irn_irg(n);
-                               vfld  = new_rd_ia32_vfld(NULL, irg, block, get_irn_n(n, 0), get_irn_n(n, 1), new_rd_NoMem(irg), get_ia32_ls_mode(n));
+                               vfld  = new_rd_ia32_vfld(NULL, irg, block, get_irn_n(n, 0), get_irn_n(n, 1), new_NoMem(), get_ia32_ls_mode(n));
 
                                /* copy all attributes */
                                set_ia32_frame_ent(vfld, get_ia32_frame_ent(n));

diff --git a/ir/be/mips/mips_transform.c b/ir/be/mips/mips_transform.c
index be1c88b..4df75f6 100644 (file)
--- a/ir/be/mips/mips_transform.c
+++ b/ir/be/mips/mips_transform.c
@@ -660,7 +660,7 @@ ir_node *gen_node_for_SwitchCond(mips_transform_env_t *env)
 
        la = new_rd_mips_la(dbg, irg, block);
        add = new_rd_mips_addu(dbg, irg, block, sl, la);
-       load = new_rd_mips_load_r(dbg, irg, block, new_rd_NoMem(irg), add, mode_T);
+       load = new_rd_mips_load_r(dbg, irg, block, new_NoMem(), add, mode_T);
        attr = get_mips_attr(load);
        attr->modes.load_store_mode = mode_Iu;
        attr->tv = new_tarval_from_long(0, mode_Iu);
@@ -1046,7 +1046,7 @@ static void mips_transform_Spill(mips_transform_env_t* env) {
        ir_node   *node = env->irn;
        ir_node   *sched_point = NULL;
        ir_node   *store;
-       ir_node   *nomem = new_rd_NoMem(env->irg);
+       ir_node   *nomem = new_NoMem();
        ir_node   *ptr   = get_irn_n(node, 0);
        ir_node   *val   = get_irn_n(node, 1);
        ir_entity *ent   = be_get_frame_entity(node);

diff --git a/ir/be/ppc32/bearch_ppc32.c b/ir/be/ppc32/bearch_ppc32.c
index 1a5daee..054fba6 100644 (file)
--- a/ir/be/ppc32/bearch_ppc32.c
+++ b/ir/be/ppc32/bearch_ppc32.c
@@ -400,12 +400,12 @@ static void ppc32_transform_spill(ir_node *node, void *env)
                if (regclass == &ppc32_reg_classes[CLASS_ppc32_gp])
                {
                        store = new_rd_ppc32_Stw(dbg, current_ir_graph, block,
-                               get_irn_n(node, 0), get_irn_n(node, 1), new_rd_NoMem(current_ir_graph));
+                               get_irn_n(node, 0), get_irn_n(node, 1), new_NoMem());
                }
                else if (regclass == &ppc32_reg_classes[CLASS_ppc32_fp])
                {
                        store = new_rd_ppc32_Stfd(dbg, current_ir_graph, block,
-                               get_irn_n(node, 0), get_irn_n(node, 1), new_rd_NoMem(current_ir_graph));
+                               get_irn_n(node, 0), get_irn_n(node, 1), new_NoMem());
                }
                else panic("Spill for register class not supported yet!");