if (mode_needs_gp_reg(mode))
mode = mode_Iu;
res = new_rd_arm_Mov_i(dbg, irg, block, mode, value);
- /* ensure the const is scheduled AFTER the stack frame */
- add_irn_dep(res, get_irg_frame(irg));
+ be_dep_on_frame(res);
return res;
}
if (mode_needs_gp_reg(mode))
mode = mode_Iu;
res = new_rd_arm_Mvn_i(dbg, irg, block, mode, value);
- /* ensure the const is scheduled AFTER the stack frame */
- add_irn_dep(res, get_irg_frame(irg));
+ be_dep_on_frame(res);
return res;
}
} else {
node = new_rd_arm_fpaConst(dbg, irg, block, tv);
}
- /* ensure the const is scheduled AFTER the stack frame */
- add_irn_dep(node, get_irg_frame(irg));
+ be_dep_on_frame(node);
return node;
}
else if (USE_VFP(env_cg->isa)) {
ir_node *res;
res = new_rd_arm_SymConst(dbg, irg, block, mode, get_sc_ident(node));
- /* ensure the const is scheduled AFTER the stack frame */
- add_irn_dep(res, get_irg_frame(irg));
+ be_dep_on_frame(res);
return res;
}
new_node = new_rd_ia32_Asm(dbgi, irg, new_block, arity, in, out_arity,
get_ASM_text(node), register_map);
- /* Prevent the ASM node from being scheduled before the Barrier, if it has
- * no inputs */
- if (arity == 0 && get_irg_start_block(irg) == new_block) {
- add_irn_dep(new_node, get_irg_frame(irg));
- }
+ if (arity == 0)
+ be_dep_on_frame(new_node);
set_ia32_out_req_all(new_node, out_reg_reqs);
set_ia32_in_req_all(new_node, in_reg_reqs);
size >>= 2;
res = new_rd_ia32_Const(dbgi, irg, block, NULL, 0, size);
- add_irn_dep(res, get_irg_frame(irg));
+ be_dep_on_frame(res);
res = new_rd_ia32_CopyB(dbgi, irg, block, new_dst, new_src, res, new_mem, rem);
} else {
ir_node *block = get_irg_start_block(irg);
ir_node *ret = new_rd_ia32_vfldz(dbgi, irg, block);
- /* Const Nodes before the initial IncSP are a bad idea, because
- * they could be spilled and we have no SP ready at that point yet.
- * So add a dependency to the initial frame pointer calculation to
- * avoid that situation.
- */
- add_irn_dep(ret, get_irg_frame(irg));
+ be_dep_on_frame(ret);
return ret;
}
} else if (ia32_mode_needs_gp_reg(mode)) {
}
}
end:
- /* Const Nodes before the initial IncSP are a bad idea, because
- * they could be spilled and we have no SP ready at that point yet.
- * So add a dependency to the initial frame pointer calculation to
- * avoid that situation.
- */
- if (get_irg_start_block(irg) == block) {
- add_irn_dep(load, get_irg_frame(irg));
- }
-
SET_IA32_ORIG_NODE(load, ia32_get_old_node_name(env_cg, node));
+
+ be_dep_on_frame(load);
return res;
} else { /* non-float mode */
ir_node *cnst;
cnst = new_rd_ia32_Const(dbgi, irg, block, NULL, 0, val);
SET_IA32_ORIG_NODE(cnst, ia32_get_old_node_name(env_cg, node));
- /* see above */
- if (get_irg_start_block(irg) == block) {
- add_irn_dep(cnst, get_irg_frame(irg));
- }
-
+ be_dep_on_frame(cnst);
return cnst;
}
}
cnst = new_rd_ia32_Const(dbgi, irg, block, entity, 0, 0);
}
- /* Const Nodes before the initial IncSP are a bad idea, because
- * they could be spilled and we have no SP ready at that point yet
- */
- if (get_irg_start_block(irg) == block) {
- add_irn_dep(cnst, get_irg_frame(irg));
- }
-
SET_IA32_ORIG_NODE(cnst, ia32_get_old_node_name(env_cg, node));
+ be_dep_on_frame(cnst);
return cnst;
}
ir_graph *irg = current_ir_graph;
new_node = new_rd_ia32_Const(dbgi, irg, new_block, addr.symconst_ent,
addr.symconst_sign, addr.offset);
- add_irn_dep(new_node, get_irg_frame(irg));
+ be_dep_on_frame(new_node);
SET_IA32_ORIG_NODE(new_node, ia32_get_old_node_name(env_cg, node));
return new_node;
}
if (mode_is_signed(mode)) {
ir_node *produceval = new_rd_ia32_ProduceVal(dbgi, irg, new_block);
- add_irn_dep(produceval, get_irg_frame(irg));
+ be_dep_on_frame(produceval);
sign_extension = new_rd_ia32_Cltd(dbgi, irg, new_block, am.new_op1,
produceval);
am.new_op1, sign_extension);
} else {
sign_extension = new_rd_ia32_Const(dbgi, irg, new_block, NULL, 0, 0);
- add_irn_dep(sign_extension, get_irg_frame(irg));
+ be_dep_on_frame(sign_extension);
new_node = new_rd_ia32_Div(dbgi, irg, new_block, addr->base,
addr->index, new_mem, am.new_op2,
ir_node *op = left;
ir_node *new_op = be_transform_node(op);
ir_node *pval = new_rd_ia32_ProduceVal(dbgi, irg, block);
- add_irn_dep(pval, get_irg_frame(irg));
+ be_dep_on_frame(pval);
return new_rd_ia32_Cltd(dbgi, irg, block, new_op, pval);
}
}
sign_extension = new_rd_ia32_Cltd(dbgi, irg, new_block,
new_op, pval);
- add_irn_dep(pval, get_irg_frame(irg));
+ be_dep_on_frame(pval);
SET_IA32_ORIG_NODE(sign_extension,ia32_get_old_node_name(env_cg, node));
xor = new_rd_ia32_Xor(dbgi, irg, new_block, noreg_gp, noreg_gp,
add_ia32_flags(new_node, arch_irn_flags_rematerializable);
}
- /* make sure we are scheduled behind the initial IncSP/Barrier
- * to avoid spills being placed before it
- */
- if (block == get_irg_start_block(irg)) {
- add_irn_dep(new_node, get_irg_frame(irg));
- }
-
SET_IA32_ORIG_NODE(new_node, ia32_get_old_node_name(env_cg, node));
+ be_dep_on_frame(new_node);
return new_node;
}