--- /dev/null
+#
+# Project: libFIRM
+# File name: ir/be/ia32/Makefile.in
+# Purpose:
+# Author: Boris Boesler, Till Riedel
+# Modified by:
+# Created:
+# CVS-ID: $Id$
+# Copyright: (c) 1999-2005 Universitaet Karlsruhe
+# Licence: This file protected by GPL - GNU GENERAL PUBLIC LICENSE.
+#
+
+top_srcdir := @top_srcdir@
+srcdir = @srcdir@
+topdir = ../../..
+subdir := ir/be/mips
+full_dir = $(top_srcdir)/ir/be
+full_dirbe = $(full_dir)/mips
+arch = mips
+
+SOURCES = Makefile.in $(arch)_new_nodes.c $(arch)_new_nodes.h gen_$(arch)_new_nodes.c.inl gen_$(arch)_new_nodes.h \
+ gen_$(arch)_emitter.c gen_$(arch)_emitter.h $(arch)_emitter.c $(arch)_emitter.h \
+ bearch_$(arch).c gen_$(arch)_regalloc_if_t.h gen_$(arch)_regalloc_if.h gen_$(arch)_regalloc_if.c \
+ $(arch)_transform.c $(arch)_transform.h $(arch)_gen_decls.c $(arch)_gen_decls.h \
+ $(arch)_map_regs.c $(arch)_map_regs.h
+include $(topdir)/MakeRules
+
+CPPFLAGS += -I$(top_srcdir)/ir/adt -I$(top_srcdir)/ir/ir -I$(top_srcdir)/ir/common \
+ -I$(top_srcdir)/ir/ident -I$(top_srcdir)/ir/tr -I$(top_srcdir)/ir/tv \
+ -I$(top_srcdir)/ir/debug -I$(top_srcdir)/ir/ana -I$(top_srcdir)/ir/st \
+ -I$(top_srcdir)/ir/stat -I$(top_srcdir)/ir/external -I$(top_srcdir)/ir/ana2 -I$(top_srcdir)/ir/lower \
+ -I$(topdir)/ir/config
+
+include $(top_srcdir)/MakeTargets
+
+$(full_dirbe)/$(arch)_new_nodes.c: $(full_dirbe)/gen_$(arch)_regalloc_if.h $(full_dirbe)/gen_$(arch)_new_nodes.c.inl
+
+$(full_dirbe)/$(arch)_new_nodes.h: $(full_dirbe)/gen_$(arch)_new_nodes.h.inl
+
+$(full_dirbe)/bearch_$(arch).c: $(full_dirbe)/gen_$(arch)_regalloc_if.h
+
+$(full_dirbe)/gen_$(arch)_new_nodes.c.inl $(full_dirbe)/gen_$(arch)_new_nodes.h.inl: $(full_dir)/scripts/generate_new_opcodes.pl $(full_dirbe)/$(arch)_spec.pl
+ $(full_dir)/scripts/generate_new_opcodes.pl $(full_dirbe)/$(arch)_spec.pl $(full_dirbe)
+
+$(full_dirbe)/gen_$(arch)_emitter.c $(full_dirbe)/gen_$(arch)_emitter.h: $(full_dir)/scripts/generate_emitter.pl $(full_dirbe)/$(arch)_spec.pl
+ $(full_dir)/scripts/generate_emitter.pl $(full_dirbe)/$(arch)_spec.pl $(full_dirbe)
+
+$(full_dirbe)/gen_$(arch)_regalloc_if.c $(full_dirbe)/gen_$(arch)_regalloc_if.h $(full_dirbe)/gen_$(arch)_regalloc_if_t.h: $(full_dir)/scripts/generate_regalloc_if.pl $(full_dirbe)/$(arch)_spec.pl
+ $(full_dir)/scripts/generate_regalloc_if.pl $(full_dirbe)/$(arch)_spec.pl $(full_dirbe)
+
+all: subdir.o