%nodes = (
Add => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
emit => '. add %D0, %S0, %SO',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
},
Mul => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp" ], out => [ "!in_r1" ] },
emit =>'. mul %D0, %S0, %S1',
mode => $mode_gp,
},
Smull => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp" ], out => [ "gp", "gp" ] },
emit =>'. smull %D0, %D1, %S0, %S1',
outs => [ "low", "high" ],
},
Umull => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp" ], out => [ "gp", "gp" ] },
emit =>'. umull %D0, %D1, %S0, %S1',
outs => [ "low", "high" ],
},
Mla => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp", "gp" ], out => [ "!in_r1" ] },
emit =>'. mla %D0, %S0, %S1, %S2',
mode => $mode_gp,
},
And => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
emit => '. and %D0, %S0, %SO',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
},
Or => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
emit => '. orr %D0, %S0, %SO',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
},
Eor => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
emit => '. eor %D0, %S0, %SO',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
},
Bic => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
emit => '. bic %D0, %S0, %SO',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
},
Sub => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
emit => '. sub %D0, %S0, %SO',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
},
Rsb => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
emit => '. rsb %D0, %S0, %SO',
mode => $mode_gp,
attr_type => "arm_shifter_operand_t",
},
Mov => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
arity => "variable",
emit => '. mov %D0, %SO',
mode => $mode_gp,
},
Mvn => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
attr_type => "arm_shifter_operand_t",
arity => "variable",
emit => '. mvn %D0, %SO',
# this node produces ALWAYS an empty (tempary) gp reg and cannot be CSE'd
EmptyReg => {
- op_flags => "c",
- irn_flags => "R",
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "gp" ] },
emit => '. /* %D0 now available for calculations */',
cmp_attr => 'return 1;',
},
CopyB => {
- op_flags => "F|H",
+ op_flags => [ "fragile" ],
state => "pinned",
attr => "unsigned size",
attr_type => "arm_CopyB_attr_t",
},
FrameAddr => {
- op_flags => "c",
- irn_flags => "R",
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
attr => "ir_entity *entity, int symconst_offset",
reg_req => { in => [ "gp" ], out => [ "gp" ] },
ins => [ "base" ],
},
SymConst => {
- op_flags => "c",
- irn_flags => "R",
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
attr => "ir_entity *entity, int symconst_offset",
reg_req => { out => [ "gp" ] },
attr_type => "arm_SymConst_attr_t",
},
Cmp => {
- irn_flags => "R|F",
+ irn_flags => [ "rematerializable", "modify_flags" ],
emit => '. cmp %S0, %SO',
mode => $mode_flags,
attr_type => "arm_cmp_attr_t",
},
Tst => {
- irn_flags => "R|F",
+ irn_flags => [ "rematerializable", "modify_flags" ],
emit => '. tst %S0, %SO',
mode => $mode_flags,
attr_type => "arm_cmp_attr_t",
},
B => {
- op_flags => "L|X|Y",
+ op_flags => [ "labeled", "cfopcode", "forking" ],
state => "pinned",
mode => "mode_T",
reg_req => { in => [ "flags" ], out => [ "none", "none" ] },
Jmp => {
state => "pinned",
- op_flags => "X",
- irn_flags => "J",
+ op_flags => [ "cfopcode" ],
+ irn_flags => [ "simple_jump" ],
reg_req => { out => [ "none" ] },
mode => "mode_X",
},
SwitchJmp => {
- op_flags => "L|X|Y",
+ op_flags => [ "labeled", "cfopcode", "forking" ],
state => "pinned",
mode => "mode_T",
attr => "int n_projs, long def_proj_num",
},
Ldr => {
- op_flags => "L|F",
+ op_flags => [ "labeled", "fragile" ],
state => "exc_pinned",
ins => [ "ptr", "mem" ],
outs => [ "res", "M" ],
},
Str => {
- op_flags => "L|F",
+ op_flags => [ "labeled", "fragile" ],
state => "exc_pinned",
ins => [ "ptr", "val", "mem" ],
outs => [ "mem" ],
},
StoreStackM4Inc => {
- op_flags => "L|F",
- irn_flags => "R",
+ op_flags => [ "labeled", "fragile" ],
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "sp", "gp", "gp", "gp", "gp", "none" ], out => [ "sp:I|S", "none" ] },
emit => '. stmfd %S0!, {%S1, %S2, %S3, %S4}',
},
LoadStackM3Epilogue => {
- op_flags => "L|F",
- irn_flags => "R",
+ op_flags => [ "labeled", "fragile" ],
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "sp", "none" ], out => [ "r11:I", "sp:I|S", "pc:I", "none" ] },
emit => '. ldmfd %S0, {%D0, %D1, %D2}',
Adf => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] },
emit => '. adf%AM %D0, %S0, %S1',
attr_type => "arm_farith_attr_t",
},
Muf => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] },
emit =>'. muf%AM %D0, %S0, %S1',
attr_type => "arm_farith_attr_t",
},
Suf => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "fpa", "fpa" ], out => [ "fpa" ] },
emit => '. suf%AM %D0, %S0, %S1',
attr_type => "arm_farith_attr_t",
},
Mvf => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "fpa" ], out => [ "fpa" ] },
emit => '. mvf%AM %S0, %D0',
attr_type => "arm_farith_attr_t",
},
FltX => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp" ], out => [ "fpa" ] },
emit => '. flt%AM %D0, %S0',
attr_type => "arm_farith_attr_t",
},
Cmfe => {
- irn_flags => "R|F",
+ irn_flags => [ "rematerializable", "modify_flags" ],
mode => $mode_flags,
attr_type => "arm_cmp_attr_t",
attr => "bool ins_permuted",
},
Ldf => {
- op_flags => "L|F",
+ op_flags => [ "labeled", "fragile" ],
state => "exc_pinned",
ins => [ "ptr", "mem" ],
outs => [ "res", "M" ],
},
Stf => {
- op_flags => "L|F",
+ op_flags => [ "labeled", "fragile" ],
state => "exc_pinned",
ins => [ "ptr", "val", "mem" ],
outs => [ "M" ],
# floating point constants
#
fConst => {
- op_flags => "c",
- irn_flags => "R",
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
attr => "tarval *tv",
init_attr => "attr->tv = tv;",
mode => "get_tarval_mode(tv)",
#
# ); # close the %nodes initializer
-# op_flags: flags for the operation, OPTIONAL (default is "N")
-# the op_flags correspond to the firm irop_flags:
-# N irop_flag_none
-# L irop_flag_labeled
-# C irop_flag_commutative
-# X irop_flag_cfopcode
-# I irop_flag_ip_cfopcode
-# F irop_flag_fragile
-# Y irop_flag_forking
-# H irop_flag_highlevel
-# c irop_flag_constlike
-# K irop_flag_keep
-# NB irop_flag_dump_noblock
-# NI irop_flag_dump_noinput
-#
-# irn_flags: special node flags, OPTIONAL (default is 0)
-# following irn_flags are supported:
-# R rematerializeable
-# N not spillable
-#
# state: state of the operation, OPTIONAL (default is "floats")
#
# arity: arity of the operation, MUST NOT BE OMITTED
Immediate => {
state => "pinned",
- op_flags => "c",
+ op_flags => [ "constlike" ],
reg_req => { out => [ "gp_NOREG:I" ] },
attr => "ir_entity *symconst, int symconst_sign, int no_pic_adjust, long offset",
attr_type => "ia32_immediate_attr_t",
# "allocates" a free register
ProduceVal => {
- op_flags => "c|n",
- irn_flags => "R",
+ op_flags => [ "constlike", "cse_neutral" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "gp" ] },
emit => "",
units => [ ],
},
Add => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ],
out => [ "in_r4 in_r5", "flags", "none" ] },
},
AddMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "val" ],
},
AddMem8Bit => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "val" ],
},
l_Add => {
- op_flags => "C",
+ op_flags => [ "constlike" ],
reg_req => { in => [ "none", "none" ], out => [ "none" ] },
ins => [ "left", "right" ],
},
l_Mul => {
# we should not rematrialize this node. It produces 2 results and has
# very strict constraints
- op_flags => "C",
+ op_flags => [ "constlike" ],
cmp_attr => "return 1;",
reg_req => { in => [ "none", "none" ],
out => [ "none", "none", "none", "none" ] },
},
IMul => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
# TODO: adjust out requirements for the 3 operand form
# (no need for should_be_same then)
},
IMul1OP => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eax", "gp" ],
out => [ "eax", "flags", "none", "edx" ] },
},
l_IMul => {
- op_flags => "C",
+ op_flags => [ "constlike" ],
cmp_attr => "return 1;",
reg_req => { in => [ "none", "none" ],
out => [ "none", "none", "none", "none" ] },
},
And => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ],
out => [ "in_r4 in_r5", "flags", "none" ] },
},
AndMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "val" ],
},
AndMem8Bit => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "val" ],
},
Or => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ],
out => [ "in_r4 in_r5", "flags", "none" ] },
},
OrMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "val" ],
},
OrMem8Bit => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "val" ],
},
Xor => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ],
out => [ "in_r4 in_r5", "flags", "none" ] },
},
Xor0 => {
- op_flags => "c",
- irn_flags => "R",
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "gp", "flags" ] },
outs => [ "res", "flags" ],
emit => ". xor%M %D0, %D0",
},
XorMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "val" ],
},
XorMem8Bit => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "val" ],
},
Sub => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ],
out => [ "in_r4", "flags", "none" ] },
},
SubMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "subtrahend" ],
},
SubMem8Bit => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "subtrahend" ],
Sbb0 => {
# Spiller currently fails when rematerializing flag consumers
- # irn_flags => "R",
+ # irn_flags => [ "rematerializable" ],
reg_req => { in => [ "flags" ], out => [ "gp", "flags" ] },
outs => [ "res", "flags" ],
emit => ". sbb%M %D0, %D0",
},
IDiv => {
- op_flags => "F|L",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp", "eax", "edx" ],
out => [ "eax", "flags", "none", "edx", "none" ] },
},
Div => {
- op_flags => "F|L",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp", "eax", "edx" ],
out => [ "eax", "flags", "none", "edx", "none" ] },
},
Shl => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "ecx" ],
out => [ "in_r1 !in_r2", "flags" ] },
ins => [ "val", "count" ],
},
ShlMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "count" ],
},
ShlD => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp", "ecx" ],
out => [ "in_r1 !in_r2 !in_r3", "flags" ] },
ins => [ "val_high", "val_low", "count" ],
},
Shr => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "ecx" ],
out => [ "in_r1 !in_r2", "flags" ] },
ins => [ "val", "count" ],
},
ShrMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "count" ],
},
ShrD => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp", "ecx" ],
out => [ "in_r1 !in_r2 !in_r3", "flags" ] },
ins => [ "val_high", "val_low", "count" ],
},
Sar => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "ecx" ],
out => [ "in_r1 !in_r2", "flags" ] },
ins => [ "val", "count" ],
},
SarMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "count" ],
},
Ror => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "ecx" ],
out => [ "in_r1 !in_r2", "flags" ] },
ins => [ "val", "count" ],
},
RorMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "count" ],
},
Rol => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "ecx" ],
out => [ "in_r1 !in_r2", "flags" ] },
ins => [ "val", "count" ],
},
RolMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "ecx" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "count" ],
},
Neg => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp" ],
out => [ "in_r1", "flags" ] },
emit => '. neg%M %S0',
},
NegMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
},
Minus64Bit => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp" ], out => [ "in_r1", "in_r2" ] },
outs => [ "low_res", "high_res" ],
units => [ "GP" ],
Inc => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp" ],
out => [ "in_r1", "flags" ] },
ins => [ "val" ],
},
IncMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
},
Dec => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp" ],
out => [ "in_r1", "flags" ] },
ins => [ "val" ],
},
DecMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
},
Not => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp" ],
out => [ "in_r1" ] },
ins => [ "val" ],
},
NotMem => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
},
Cmp => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ],
out => [ "flags", "none", "none" ] },
},
Cmp8Bit => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ] ,
out => [ "flags", "none", "none" ] },
},
Test => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp", "gp" ] ,
out => [ "flags", "none", "none" ] },
},
Test8Bit => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx", "eax ebx ecx edx" ] ,
out => [ "flags", "none", "none" ] },
},
Setcc => {
- #irn_flags => "R",
+ #irn_flags => [ "rematerializable" ],
reg_req => { in => [ "eflags" ], out => [ "eax ebx ecx edx" ] },
ins => [ "eflags" ],
outs => [ "res" ],
},
SetccMem => {
- #irn_flags => "R",
+ #irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eflags" ], out => [ "none" ] },
ins => [ "base", "index", "mem","eflags" ],
},
CMovcc => {
- #irn_flags => "R",
+ #irn_flags => [ "rematerializable" ],
state => "exc_pinned",
# (note: leave the false,true order intact to make it compatible with other
# ia32_binary ops)
Jcc => {
state => "pinned",
- op_flags => "L|X|Y",
+ op_flags => [ "labeled", "cfopcode", "forking" ],
reg_req => { in => [ "eflags" ], out => [ "none", "none" ] },
ins => [ "eflags" ],
outs => [ "false", "true" ],
SwitchJmp => {
state => "pinned",
- op_flags => "L|X|Y",
+ op_flags => [ "labeled", "cfopcode", "forking" ],
reg_req => { in => [ "gp" ] },
mode => "mode_T",
attr_type => "ia32_condcode_attr_t",
Jmp => {
state => "pinned",
- irn_flags => "J",
- op_flags => "X",
+ irn_flags => [ "simple_jump" ],
+ op_flags => [ "cfopcode" ],
reg_req => { out => [ "none" ] },
latency => 1,
units => [ "BRANCH" ],
IJmp => {
state => "pinned",
- op_flags => "X",
+ op_flags => [ "cfopcode" ],
reg_req => { in => [ "gp", "gp", "none", "gp" ] },
ins => [ "base", "index", "mem", "target" ],
am => "source,unary",
},
Const => {
- op_flags => "c",
- irn_flags => "R",
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "gp" ] },
units => [ "GP" ],
attr => "ir_entity *symconst, int symconst_sign, int no_pic_adjust, long offset",
},
Unknown => {
- op_flags => "c",
- irn_flags => "R",
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "gp" ] },
latency => 0,
emit => '',
},
GetEIP => {
- op_flags => "c",
+ op_flags => [ "constlike" ],
reg_req => { out => [ "gp" ] },
units => [ "GP" ],
latency => 5,
NoReg_GP => {
state => "pinned",
- op_flags => "c|NB|NI",
+ op_flags => [ "constlike", "dump_noblock", "dump_noinput" ],
reg_req => { out => [ "gp_NOREG:I" ] },
units => [],
emit => "",
NoReg_VFP => {
state => "pinned",
- op_flags => "c|NB|NI",
+ op_flags => [ "constlike", "dump_noblock", "dump_noinput" ],
reg_req => { out => [ "vfp_NOREG:I" ] },
units => [],
emit => "",
NoReg_XMM => {
state => "pinned",
- op_flags => "c|NB|NI",
+ op_flags => [ "constlike", "dump_noblock", "dump_noinput" ],
reg_req => { out => [ "xmm_NOREG:I" ] },
units => [],
emit => "",
ChangeCW => {
state => "pinned",
- op_flags => "c",
+ op_flags => [ "constlike" ],
reg_req => { out => [ "fpcw:I" ] },
mode => $mode_fpcw,
latency => 3,
},
FldCW => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "fpcw:I" ] },
ins => [ "base", "index", "mem" ],
},
FnstCW => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "pinned",
reg_req => { in => [ "gp", "gp", "none", "fp_cw" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "fpcw" ],
},
FnstCWNOP => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "pinned",
reg_req => { in => [ "fp_cw" ], out => [ "none" ] },
ins => [ "fpcw" ],
# lateny of 0 for load is correct
Load => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ],
out => [ "gp", "none", "none", "none" ] },
},
Store => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
},
Store8Bit => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "eax ebx ecx edx" ], out => ["none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
},
Lea => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
ins => [ "base", "index" ],
emit => '. leal %AM, %D0',
},
RepPrefix => {
- op_flags => "K",
+ op_flags => [ "keep" ],
state => "pinned",
mode => "mode_M",
emit => ". rep",
},
LdTls => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "gp" ] },
units => [ "GP" ],
latency => 1,
# BT supports source address mode, but this is unused yet
#
Bt => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp" ], out => [ "flags" ] },
ins => [ "left", "right" ],
},
Bsf => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ],
out => [ "gp", "flags", "none" ] },
},
Bsr => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ],
out => [ "gp", "flags", "none" ] },
# SSE4.2 or SSE4a popcnt instruction
#
Popcnt => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ],
out => [ "gp", "flags", "none" ] },
# bswap
#
Bswap => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp" ],
out => [ "in_r1" ] },
emit => '. bswap%M %S0',
# bswap16, use xchg here
#
Bswap16 => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "eax ebx ecx edx" ],
out => [ "in_r1" ] },
emit => '. xchg %SB0, %SH0',
# outport
#
Outport => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "pinned",
reg_req => { in => [ "edx", "eax", "none" ], out => [ "none" ] },
ins => [ "port", "value", "mem" ],
# inport
#
Inport => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "pinned",
reg_req => { in => [ "edx", "none" ], out => [ "eax", "none" ] },
ins => [ "port", "mem" ],
# Intel style prefetching
#
Prefetch0 => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
},
Prefetch1 => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
},
Prefetch2 => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
},
PrefetchNTA => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
# 3DNow! prefetch instructions
#
Prefetch => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
},
PrefetchW => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "none" ] },
ins => [ "base", "index", "mem" ],
# produces a 0/+0.0
xZero => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "xmm" ] },
emit => '. xorp%XSD %D0, %D0',
latency => 3,
},
xUnknown => {
- op_flags => "c",
- irn_flags => "R",
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "xmm" ] },
emit => '',
latency => 0,
},
xPzero => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "xmm" ] },
emit => '. pxor %D0, %D0',
latency => 3,
# produces all 1 bits
xAllOnes => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "xmm" ] },
emit => '. pcmpeqb %D0, %D0',
latency => 3,
# integer shift left, dword
xPslld => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "xmm", "xmm" ], out => [ "in_r1 !in_r2" ] },
emit => '. pslld %SI1, %D0',
latency => 3,
# integer shift left, qword
xPsllq => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "xmm", "xmm" ], out => [ "in_r1 !in_r2" ] },
emit => '. psllq %SI1, %D0',
latency => 3,
# integer shift right, dword
xPsrld => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "xmm", "xmm" ], out => [ "in_r1 !in_r2" ] },
emit => '. psrld %SI1, %D0',
latency => 1,
# mov from integer to SSE register
xMovd => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "gp" ], out => [ "xmm" ] },
emit => '. movd %S0, %D0',
latency => 1,
},
xAdd => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
out => [ "in_r4 in_r5", "flags", "none" ] },
},
xMul => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
out => [ "in_r4 in_r5", "flags", "none" ] },
},
xMax => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
out => [ "in_r4 in_r5", "flags", "none" ] },
},
xMin => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
out => [ "in_r4 in_r5", "flags", "none" ] },
},
xAnd => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
out => [ "in_r4 in_r5", "flags", "none" ] },
},
xOr => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
out => [ "in_r4 in_r5", "flags", "none" ] },
},
xXor => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
out => [ "in_r4 in_r5", "flags", "none" ] },
},
xAndNot => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
out => [ "in_r4 !in_r5", "flags", "none" ] },
},
xSub => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
out => [ "in_r4", "flags", "none" ] },
},
xDiv => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
out => [ "in_r4 !in_r5", "flags", "none" ] },
},
Ucomi => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "xmm", "xmm" ],
out => [ "eflags" ] },
},
xLoad => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ],
out => [ "xmm", "none", "none", "none" ] },
},
xStore => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "xmm" ], out => [ "none", "none" ] },
ins => [ "base", "index", "mem", "val" ],
},
xStoreSimple => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "xmm" ], out => [ "none" ] },
ins => [ "base", "index", "mem", "val" ],
},
CvtSI2SS => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm" ] },
ins => [ "base", "index", "mem", "val" ],
},
CvtSI2SD => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "gp" ], out => [ "xmm" ] },
ins => [ "base", "index", "mem", "val" ],
l_LLtoFloat => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
cmp_attr => "return 1;",
ins => [ "val_high", "val_low" ],
reg_req => { in => [ "none", "none" ], out => [ "none" ] }
},
l_FloattoLL => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
cmp_attr => "return 1;",
ins => [ "val" ],
outs => [ "res_high", "res_low" ],
},
CopyB => {
- op_flags => "F|H",
+ op_flags => [ "fragile" ],
state => "pinned",
reg_req => { in => [ "edi", "esi", "ecx", "none" ], out => [ "edi", "esi", "ecx", "none" ] },
outs => [ "DST", "SRC", "CNT", "M" ],
},
CopyB_i => {
- op_flags => "F|H",
+ op_flags => [ "fragile" ],
state => "pinned",
reg_req => { in => [ "edi", "esi", "none" ], out => [ "edi", "esi", "none" ] },
outs => [ "DST", "SRC", "M" ],
# handler runs before spilling and we might end up with wrong fpcw then
vfadd => {
-# irn_flags => "R",
+# irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ],
out => [ "vfp", "none", "none" ] },
},
vfmul => {
-# irn_flags => "R",
+# irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ],
out => [ "vfp", "none", "none" ] },
},
vfsub => {
-# irn_flags => "R",
+# irn_flags => [ "rematerializable" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "vfp", "vfp", "fpcw" ],
out => [ "vfp", "none", "none" ] },
},
vfabs => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "vfp"], out => [ "vfp" ] },
ins => [ "value" ],
latency => 2,
},
vfchs => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "vfp"], out => [ "vfp" ] },
ins => [ "value" ],
latency => 2,
},
vfld => {
- irn_flags => "R",
- op_flags => "L|F",
+ irn_flags => [ "rematerializable" ],
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ],
out => [ "vfp", "none", "none", "none" ] },
},
vfst => {
- irn_flags => "R",
- op_flags => "L|F",
+ irn_flags => [ "rematerializable" ],
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "vfp" ],
out => [ "none", "none" ] },
},
vfldz => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
outs => [ "res" ],
latency => 4,
},
vfld1 => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
outs => [ "res" ],
latency => 4,
},
vfldpi => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
outs => [ "res" ],
latency => 4,
},
vfldln2 => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
outs => [ "res" ],
latency => 4,
},
vfldlg2 => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
outs => [ "res" ],
latency => 4,
},
vfldl2t => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
outs => [ "res" ],
latency => 4,
},
vfldl2e => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
outs => [ "res" ],
latency => 4,
vFucomFnstsw => {
# we can't allow to rematerialize this node so we don't
# accidently produce Phi(Fucom, Fucom(ins_permuted))
-# irn_flags => "R",
+# irn_flags => [ "rematerializable" ],
reg_req => { in => [ "vfp", "vfp" ], out => [ "eax" ] },
ins => [ "left", "right" ],
outs => [ "flags" ],
},
vFucomi => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "vfp", "vfp" ], out => [ "eflags" ] },
ins => [ "left", "right" ],
outs => [ "flags" ],
},
vFtstFnstsw => {
-# irn_flags => "R",
+# irn_flags => [ "rematerializable" ],
reg_req => { in => [ "vfp" ], out => [ "eax" ] },
ins => [ "left" ],
outs => [ "flags" ],
},
Sahf => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
reg_req => { in => [ "eax" ], out => [ "eflags" ] },
ins => [ "val" ],
outs => [ "flags" ],
fsubr => {
state => "exc_pinned",
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
emit => '. fsubr%XM %x87_binop',
latency => 4,
attr_type => "ia32_x87_attr_t",
fsubrp => {
state => "exc_pinned",
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
# see note about gas bugs before fsubp
emit => '. fsubp%XM %x87_binop',
latency => 4,
},
fchs => {
- op_flags => "R|K",
+ op_flags => [ "keep" ],
+ irn_flags => [ "rematerializable" ],
emit => '. fchs',
latency => 4,
attr_type => "ia32_x87_attr_t",
},
fld => {
- op_flags => "R|L|F",
+ irn_flags => [ "rematerializable" ],
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
emit => '. fld%XM %AM',
attr_type => "ia32_x87_attr_t",
},
fst => {
- op_flags => "R|L|F",
+ irn_flags => [ "rematerializable" ],
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
emit => '. fst%XM %AM',
mode => "mode_M",
},
fstp => {
- op_flags => "R|L|F",
+ irn_flags => [ "rematerializable" ],
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
emit => '. fstp%XM %AM',
mode => "mode_M",
},
fldz => {
- op_flags => "R|c|K",
- irn_flags => "R",
+ op_flags => [ "constlike", "keep" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
emit => '. fldz',
attr_type => "ia32_x87_attr_t",
},
fld1 => {
- op_flags => "R|c|K",
- irn_flags => "R",
+ op_flags => [ "constlike", "keep" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
emit => '. fld1',
attr_type => "ia32_x87_attr_t",
},
fldpi => {
- op_flags => "R|c|K",
- irn_flags => "R",
+ op_flags => [ "constlike", "keep" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
emit => '. fldpi',
attr_type => "ia32_x87_attr_t",
},
fldln2 => {
- op_flags => "R|c|K",
- irn_flags => "R",
+ op_flags => [ "constlike", "keep" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
emit => '. fldln2',
attr_type => "ia32_x87_attr_t",
},
fldlg2 => {
- op_flags => "R|c|K",
- irn_flags => "R",
+ op_flags => [ "constlike", "keep" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
emit => '. fldlg2',
attr_type => "ia32_x87_attr_t",
},
fldl2t => {
- op_flags => "R|c|K",
- irn_flags => "R",
+ op_flags => [ "constlike", "keep" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
emit => '. fldll2t',
attr_type => "ia32_x87_attr_t",
},
fldl2e => {
- op_flags => "R|c|K",
- irn_flags => "R",
+ op_flags => [ "constlike", "keep" ],
+ irn_flags => [ "rematerializable" ],
reg_req => { out => [ "vfp" ] },
emit => '. fldl2e',
attr_type => "ia32_x87_attr_t",
# Moreover, note the virtual register requierements!
fxch => {
- op_flags => "R|K",
+ op_flags => [ "keep" ],
reg_req => { out => [ "none" ] },
cmp_attr => "return 1;",
emit => '. fxch %X0',
},
fpush => {
- op_flags => "R|K",
+ op_flags => [ "keep" ],
reg_req => { out => [ "none" ] },
cmp_attr => "return 1;",
emit => '. fld %X0',
},
fpop => {
- op_flags => "K",
+ op_flags => [ "keep" ],
reg_req => { out => [ "none" ] },
cmp_attr => "return 1;",
emit => '. fstp %X0',
},
ffreep => {
- op_flags => "K",
+ op_flags => [ "keep" ],
reg_req => { out => [ "none" ] },
cmp_attr => "return 1;",
emit => '. ffreep %X0',
},
emms => {
- op_flags => "K",
+ op_flags => [ "keep" ],
reg_req => { out => [ "none" ] },
cmp_attr => "return 1;",
emit => '. emms',
},
femms => {
- op_flags => "K",
+ op_flags => [ "keep" ],
reg_req => { out => [ "none" ] },
cmp_attr => "return 1;",
emit => '. femms',
# Spilling and reloading of SSE registers, hardcoded, not generated #
xxLoad => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "xmm", "none" ] },
emit => '. movdqu %D0, %AM',
},
xxStore => {
- op_flags => "L|F",
+ op_flags => [ "fragile", "labeled" ],
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "xmm" ] },
ins => [ "base", "index", "mem", "val" ],
#
# ); # close the %nodes initializer
-# op_flags: flags for the operation, OPTIONAL (default is "N")
-# the op_flags correspond to the firm irop_flags:
-# N irop_flag_none
-# L irop_flag_labeled
-# C irop_flag_commutative
-# X irop_flag_cfopcode
-# I irop_flag_ip_cfopcode
-# F irop_flag_fragile
-# Y irop_flag_forking
-# H irop_flag_highlevel
-# c irop_flag_constlike
-# K irop_flag_keep
-#
-# irn_flags: special node flags, OPTIONAL (default is 0)
-# following irn_flags are supported:
-# R rematerializeable
-# N not spillable
-# I ignore for register allocation
-#
# state: state of the operation, OPTIONAL (default is "floats")
#
# arity: arity of the operation, MUST NOT BE OMITTED
O => "${arch}_emit_offset(node);",
);
-#--------------------------------------------------#
-# _ #
-# (_) #
-# _ __ _____ __ _ _ __ ___ _ __ ___ #
-# | '_ \ / _ \ \ /\ / / | | '__| / _ \| '_ \/ __| #
-# | | | | __/\ V V / | | | | (_) | |_) \__ \ #
-# |_| |_|\___| \_/\_/ |_|_| \___/| .__/|___/ #
-# | | #
-# |_| #
-#--------------------------------------------------#
-
$default_attr_type = "sparc_attr_t";
$default_copy_attr = "sparc_copy_attr";
%nodes = (
-#-----------------------------------------------------------------#
-# _ _ _ #
-# (_) | | | | #
-# _ _ __ | |_ ___ __ _ ___ _ __ _ __ ___ __| | ___ ___ #
-# | | '_ \| __/ _ \/ _` |/ _ \ '__| | '_ \ / _ \ / _` |/ _ \/ __| #
-# | | | | | || __/ (_| | __/ | | | | | (_) | (_| | __/\__ \ #
-# |_|_| |_|\__\___|\__, |\___|_| |_| |_|\___/ \__,_|\___||___/ #
-# __/ | #
-# |___/ #
-#-----------------------------------------------------------------#
-
-# commutative operations
-
Add => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
comment => "construct Add: Add(a, b) = Add(b, a) = a + b",
mode => $mode_gp,
emit => '. add %S1, %R2I, %D1',
},
Sub => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
comment => "construct Sub: Sub(a, b) = a - b",
mode => $mode_gp,
reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
# Load / Store
Load => {
- op_flags => "L|F",
+ op_flags => [ "labeled", "fragile" ],
comment => "construct Load: Load(ptr, mem) = LD ptr -> reg",
state => "exc_pinned",
ins => [ "ptr", "mem" ],
},
LoadHi => {
- op_flags => "L|F",
+ op_flags => [ "labeled", "fragile" ],
comment => "construct LoadHi: Load(ptr, mem) = sethi hi(ptr) -> reg",
state => "exc_pinned",
ins => [ "ptr", "mem" ],
},
HiImm => {
- op_flags => "R",
+ irn_flags => [ "rematerializable" ],
comment => "construct LoadHi: Load(imm, mem) = sethi hi(imm) -> reg",
state => "exc_pinned",
outs => [ "res" ],
},
LoImm => {
- op_flags => "R",
+ irn_flags => [ "rematerializable" ],
comment => "construct LoadHi: Load(imm, mem) = sethi hi(imm) -> reg",
state => "exc_pinned",
ins => [ "hireg" ],
},
LoadLo => {
- op_flags => "L|F",
+ op_flags => [ "labeled", "fragile" ],
comment => "construct LoadLo: Or(in, ptr, mem) = or in lo(ptr) -> reg",
state => "exc_pinned",
ins => [ "hireg", "ptr", "mem" ],
},
Store => {
- op_flags => "L|F",
+ op_flags => [ "labeled", "fragile" ],
comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",
mode => "mode_M",
state => "exc_pinned",
},
Mov => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
comment => "construct Mov: Mov(src, dest) = MV src,dest",
arity => "variable",
emit => '. mov %R1I, %D1',
},
SymConst => {
- op_flags => "c",
- irn_flags => "R",
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
attr => "ir_entity *entity",
reg_req => { out => [ "gp" ] },
attr_type => "sparc_symconst_attr_t",
},
FrameAddr => {
- op_flags => "c",
- irn_flags => "R",
+ op_flags => [ "constlike" ],
+ irn_flags => [ "rematerializable" ],
attr => "ir_entity *entity",
reg_req => { in => [ "gp" ], out => [ "gp" ] },
ins => [ "base" ],
},
Branch => {
- op_flags => "L|X|Y",
+ op_flags => [ "labeled", "cfopcode", "forking" ],
state => "pinned",
mode => "mode_T",
reg_req => { in => [ "flags" ], out => [ "none", "none" ] },
Jmp => {
state => "pinned",
- op_flags => "X",
- irn_flags => "J",
+ op_flags => [ "cfopcode" ],
+ irn_flags => [ "simple_jump" ],
reg_req => { out => [ "none" ] },
mode => "mode_X",
},
Cmp => {
- irn_flags => "R|F",
+ irn_flags => [ "rematerializable", "modify_flags" ],
emit => '. cmp %S1, %R2I',
mode => $mode_flags,
attr_type => "sparc_cmp_attr_t",
},
Tst => {
- irn_flags => "R|F",
+ irn_flags => [ "rematerializable", "modify_flags" ],
emit => '. tst %S1',
mode => $mode_flags,
attr_type => "sparc_cmp_attr_t",
},
SwitchJmp => {
- op_flags => "L|X|Y",
+ op_flags => [ "labeled", "cfopcode", "forking" ],
state => "pinned",
mode => "mode_T",
attr => "int n_projs, long def_proj_num",
},
ShiftLL => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
comment => "construct shift logical left",
mode => $mode_gp,
reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
},
ShiftLR => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
comment => "construct shift logical right",
mode => $mode_gp,
reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
},
ShiftRA => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
comment => "construct shift right arithmetical",
mode => $mode_gp,
reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
},
And => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
comment => "construct logical and",
mode => $mode_gp,
reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
},
Or => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
comment => "construct logical or",
mode => $mode_gp,
reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
},
Xor => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
comment => "construct logical xor",
mode => $mode_gp,
reg_req => { in => [ "gp", "gp" ], out => [ "gp" ] },
},
Div => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
state => "exc_pinned",
# mode => $mode_gp,
comment => "construct Div: Div(a, b) = a / b",
},
Minus => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
mode => $mode_gp,
comment => "construct Minus: Minus(a) = -a",
#reg_req => { in => [ "gp" ], out => [ "in_r1" ] },
},
Not => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
mode => $mode_gp,
comment => "construct Not: Not(a) = !a",
reg_req => { in => [ "gp" ], out => [ "gp" ] },
},
Nop => {
- op_flags => "K",
+ op_flags => [ "keep" ],
reg_req => { in => [], out => [ "none" ] },
emit => '. nop',
},
# emit => '. not %S1, %D1'
#},
-
-#--------------------------------------------------------#
-# __ _ _ _ #
-# / _| | | | | | #
-# | |_| | ___ __ _| |_ _ __ ___ __| | ___ ___ #
-# | _| |/ _ \ / _` | __| | '_ \ / _ \ / _` |/ _ \/ __| #
-# | | | | (_) | (_| | |_ | | | | (_) | (_| | __/\__ \ #
-# |_| |_|\___/ \__,_|\__| |_| |_|\___/ \__,_|\___||___/ #
-#--------------------------------------------------------#
-
fAdd => {
- op_flags => "C",
- irn_flags => "R",
+ op_flags => [ "commutative" ],
+ irn_flags => [ "rematerializable" ],
comment => "construct FP Add: Add(a, b) = Add(b, a) = a + b",
reg_req => { in => [ "fp", "fp" ], out => [ "fp" ] },
emit => '. fadd%FPM %S1, %S2, %D1'
},
fMul => {
- op_flags => "C",
+ op_flags => [ "commutative" ],
comment => "construct FP Mul: Mul(a, b) = Mul(b, a) = a * b",
reg_req => { in => [ "fp", "fp" ], out => [ "fp" ] },
emit =>'. fmul%FPM %S1, %S2, %D1'
},
fsMuld => {
- op_flags => "C",
+ op_flags => [ "commutative" ],
comment => "construct FP single to double precision Mul: Mul(a, b) = Mul(b, a) = a * b",
reg_req => { in => [ "fp", "fp" ], out => [ "fp" ] },
emit =>'. fsmuld %S1, %S2, %D1'
},
FpSToFpD => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
comment => "convert FP (single) to FP (double)",
reg_req => { in => [ "fp" ], out => [ "fp" ] },
emit =>'. FsTOd %S1, %D1'
},
FpDToFpS => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
comment => "convert FP (double) to FP (single)",
reg_req => { in => [ "fp" ], out => [ "fp" ] },
emit =>'. FdTOs %S1, %D1'
},
FpSToInt => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
comment => "convert integer to FP",
reg_req => { in => [ "fp" ], out => [ "gp" ] },
emit =>'. FiTOs %S1, %D1'
},
FpDToInt => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
comment => "convert integer to FP",
reg_req => { in => [ "fp" ], out => [ "gp" ] },
emit =>'. FiTOd %S1, %D1'
},
IntToFpS => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
comment => "convert FP (single) to integer",
reg_req => { in => [ "gp" ], out => [ "fp" ] },
emit =>'. FsTOi %S1, %D1'
},
IntToFpD => {
- irn_flags => "R",
+ irn_flags => [ "rematerializable" ],
comment => "convert FP (double) to integer",
reg_req => { in => [ "gp" ], out => [ "fp" ] },
emit =>'. FdTOi %S1, %D1'
## Load / Store
#
#fLoad => {
-# op_flags => "L|F",
+# op_flags => [ "labeled", "fragile" ],
# irn_flags => "R",
# state => "exc_pinned",
# comment => "construct FP Load: Load(ptr, mem) = LD ptr",
#},
#
#fStore => {
-# op_flags => "L|F",
+# op_flags => [ "labeled", "fragile" ],
# irn_flags => "R",
# state => "exc_pinned",
# comment => "construct Store: Store(ptr, val, mem) = ST ptr,val",