# |_| |_|\___/ \__,_|\___||___/ #
#----------------------------------------------------------#
-# spilling disabled for all float nodes for now, because the fpcw handler
-# runs before spilling and we might end up with wrong fpcw then
+# rematerialisation disabled for all float nodes for now, because the fpcw
+# handler runs before spilling and we might end up with wrong fpcw then
vfadd => {
# irn_flags => "R",
# virtual Load and Store
vfld => {
+ irn_flags => "R",
op_flags => "L|F",
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none" ], out => [ "vfp", "none" ] },
},
vfst => {
+ irn_flags => "R",
op_flags => "L|F",
state => "exc_pinned",
reg_req => { in => [ "gp", "gp", "none", "vfp" ] },
# are swapped, we work this around in the emitter...
fadd => {
- op_flags => "R",
state => "exc_pinned",
rd_constructor => "NONE",
reg_req => { },
},
faddp => {
- op_flags => "R",
state => "exc_pinned",
rd_constructor => "NONE",
reg_req => { },
},
fmul => {
- op_flags => "R",
state => "exc_pinned",
rd_constructor => "NONE",
reg_req => { },
},
fmulp => {
- op_flags => "R",
state => "exc_pinned",
rd_constructor => "NONE",
reg_req => { },
},
fsub => {
- op_flags => "R",
state => "exc_pinned",
rd_constructor => "NONE",
reg_req => { },
},
fsubp => {
- op_flags => "R",
state => "exc_pinned",
rd_constructor => "NONE",
reg_req => { },
},
fsubr => {
- op_flags => "R",
state => "exc_pinned",
rd_constructor => "NONE",
irn_flags => "R",
},
fsubrp => {
- op_flags => "R",
state => "exc_pinned",
rd_constructor => "NONE",
irn_flags => "R",
},
fprem => {
- op_flags => "R",
rd_constructor => "NONE",
reg_req => { },
emit => '. fprem1',
# this node is just here, to keep the simulator running
# we can omit this when a fprem simulation function exists
fpremp => {
- op_flags => "R",
rd_constructor => "NONE",
reg_req => { },
emit => '. fprem1',
},
fdiv => {
- op_flags => "R",
state => "exc_pinned",
rd_constructor => "NONE",
reg_req => { },
},
fdivp => {
- op_flags => "R",
state => "exc_pinned",
rd_constructor => "NONE",
reg_req => { },
},
fdivr => {
- op_flags => "R",
state => "exc_pinned",
rd_constructor => "NONE",
reg_req => { },
},
fdivrp => {
- op_flags => "R",
state => "exc_pinned",
rd_constructor => "NONE",
reg_req => { },
},
fabs => {
- op_flags => "R",
rd_constructor => "NONE",
reg_req => { },
emit => '. fabs',
# Conversions
fild => {
- op_flags => "R",
state => "exc_pinned",
rd_constructor => "NONE",
reg_req => { },
},
fist => {
- op_flags => "R",
state => "exc_pinned",
rd_constructor => "NONE",
reg_req => { },
},
fistp => {
- op_flags => "R",
state => "exc_pinned",
rd_constructor => "NONE",
reg_req => { },
},
fpushCopy => {
- op_flags => "R",
reg_req => { in => [ "vfp"], out => [ "vfp" ] },
cmp_attr => "return 1;",
emit => '. fld %X0',