am_support = get_ia32_am_support(irn);
block = get_nodes_block(irn);
- DBG((dbg, LEVEL_1, "checking for AM\n"));
-
/* fold following patterns: */
/* - op -> Load into AMop with am_Source */
/* conditions: */
/* normalize nodes, we need the interesting load on the left side */
if (cand & IA32_AM_CAND_RIGHT) {
load = get_Proj_pred(right);
- if (load_store_addr_is_equal(load, store, addr_b, addr_i)) {
+ if (load_store_addr_is_equal(load, store, addr_b, addr_i)
+ && node_is_ia32_comm(irn)) {
DBG((dbg, LEVEL_2, "\texchanging left/right\n"));
exchange_left_right(irn, &left, &right, 3, 2);
need_exchange_on_fail ^= 1;
ME => "if(get_mode_size_bits(get_ia32_ls_mode(node)) != 32)\n
ia32_emit_mode_suffix(env, node);",
M => "${arch}_emit_mode_suffix(env, node);",
+ XM => "${arch}_emit_x87_mode_suffix(env, node);",
XXM => "${arch}_emit_xmm_mode_suffix(env, node);",
XSD => "${arch}_emit_xmm_mode_suffix_s(env, node);",
AM => "${arch}_emit_am(env, node);",
state => "exc_pinned",
comment => "store ST0 onto stack",
reg_req => { in => [ "gp", "gp", "none" ] },
- emit => '. fstp%M %AM',
+ emit => '. fstp%XM %AM',
latency => 4,
units => [ "SSE" ],
mode => "mode_M",
state => "exc_pinned",
comment => "load ST0 from stack",
reg_req => { in => [ "gp", "none" ], out => [ "vf0", "none" ] },
- emit => '. fld%M %AM',
+ emit => '. fld%XM %AM',
outs => [ "res", "M" ],
latency => 2,
units => [ "SSE" ],
rd_constructor => "NONE",
comment => "x87 Add: Add(a, b) = Add(b, a) = a + b",
reg_req => { },
- emit => '. fadd%M %x87_binop',
+ emit => '. fadd%XM %x87_binop',
},
faddp => {
rd_constructor => "NONE",
comment => "x87 fp Mul: Mul(a, b) = Mul(b, a) = a + b",
reg_req => { },
- emit => '. fmul%M %x87_binop',
+ emit => '. fmul%XM %x87_binop',
},
fmulp => {
rd_constructor => "NONE",
comment => "x87 fp Sub: Sub(a, b) = a - b",
reg_req => { },
- emit => '. fsub%M %x87_binop',
+ emit => '. fsub%XM %x87_binop',
},
fsubp => {
irn_flags => "R",
comment => "x87 fp SubR: SubR(a, b) = b - a",
reg_req => { },
- emit => '. fsubr%M %x87_binop',
+ emit => '. fsubr%XM %x87_binop',
},
fsubrp => {
rd_constructor => "NONE",
comment => "x87 fp Div: Div(a, b) = a / b",
reg_req => { },
- emit => '. fdiv%M %x87_binop',
+ emit => '. fdiv%XM %x87_binop',
},
fdivp => {
rd_constructor => "NONE",
comment => "x87 fp DivR: DivR(a, b) = b / a",
reg_req => { },
- emit => '. fdivr%M %x87_binop',
+ emit => '. fdivr%XM %x87_binop',
},
fdivrp => {
state => "exc_pinned",
comment => "x87 fp Load: Load(ptr, mem) = LD ptr -> reg",
reg_req => { },
- emit => '. fld%M %AM',
+ emit => '. fld%XM %AM',
},
fst => {
state => "exc_pinned",
comment => "x87 fp Store: Store(ptr, val, mem) = ST ptr,val",
reg_req => { },
- emit => '. fst%M %AM',
+ emit => '. fst%XM %AM',
mode => "mode_M",
},
state => "exc_pinned",
comment => "x87 fp Store: Store(ptr, val, mem) = ST ptr,val",
reg_req => { },
- emit => '. fstp%M %AM',
+ emit => '. fstp%XM %AM',
mode => "mode_M",
},
rd_constructor => "NONE",
comment => "x87 fp integer Load: Load(ptr, mem) = iLD ptr -> reg",
reg_req => { },
- emit => '. fild%M %AM',
+ emit => '. fild%XM %AM',
},
fist => {
rd_constructor => "NONE",
comment => "x87 fp integer Store: Store(ptr, val, mem) = iST ptr,val",
reg_req => { },
- emit => '. fist%M %AM',
+ emit => '. fist%XM %AM',
mode => "mode_M",
},
rd_constructor => "NONE",
comment => "x87 fp integer Store: Store(ptr, val, mem) = iST ptr,val",
reg_req => { },
- emit => '. fistp%M %AM',
+ emit => '. fistp%XM %AM',
mode => "mode_M",
},