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b69a243
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Added changes for inline assembler
author
Michael Beck
<beck@ipd.info.uni-karlsruhe.de>
Thu, 31 May 2007 15:51:32 +0000
(15:51 +0000)
committer
Michael Beck
<beck@ipd.info.uni-karlsruhe.de>
Thu, 31 May 2007 15:51:32 +0000
(15:51 +0000)
[r14214]
ir/be/arm/bearch_arm.c
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ir/be/be.h
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ir/be/bemain.c
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ir/be/firm/bearch_firm.c
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ir/be/ia32/bearch_ia32.c
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blob
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ir/be/mips/bearch_mips.c
patch
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ir/be/ppc32/bearch_ppc32.c
patch
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ir/be/test/bf_constfold.c
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diff --git
a/ir/be/arm/bearch_arm.c
b/ir/be/arm/bearch_arm.c
index
fea209a
..
34e5504
100644
(file)
--- a/
ir/be/arm/bearch_arm.c
+++ b/
ir/be/arm/bearch_arm.c
@@
-1098,6
+1098,14
@@
static ir_graph **arm_get_irg_list(const void *self, ir_graph ***irg_list) {
return NULL;
}
return NULL;
}
+/**
+ * Called by the frontend to encode a register name into a backend specific way
+ */
+static unsigned arm_register_from_name(const char *regname) {
+ /* NYI */
+ return 0;
+}
+
/**
* Returns the libFirm configuration parameter for this backend.
*/
/**
* Returns the libFirm configuration parameter for this backend.
*/
@@
-1111,11
+1119,13
@@
static const backend_params *arm_get_libfirm_params(void) {
32, /* SMUL & UMUL available for 32 bit */
};
static backend_params p = {
32, /* SMUL & UMUL available for 32 bit */
};
static backend_params p = {
+ 1, /* need dword lowering */
+ 0, /* don't support inlien assembler yet */
NULL, /* no additional opcodes */
NULL, /* will be set later */
NULL, /* no additional opcodes */
NULL, /* will be set later */
- 1, /* need dword lowering */
NULL, /* but yet no creator function */
NULL, /* context for create_intrinsic_fkt */
NULL, /* but yet no creator function */
NULL, /* context for create_intrinsic_fkt */
+ arm_register_from_name, /* register names */
};
p.dep_param = &ad;
};
p.dep_param = &ad;
diff --git
a/ir/be/be.h
b/ir/be/be.h
index
a0877a1
..
69cf8b3
100644
(file)
--- a/
ir/be/be.h
+++ b/
ir/be/be.h
@@
-37,20
+37,25
@@
#define LC_STOP_AND_RESET_TIMER(timer) do { lc_timer_stop(timer); lc_timer_reset(timer); } while(0)
#define LC_STOP_AND_RESET_TIMER(timer) do { lc_timer_stop(timer); lc_timer_reset(timer); } while(0)
+/** For inline assembler: get a register from a name and encode it into a backend specific value. */
+typedef unsigned (get_register_fkt)(const char *reg);
+
/**
* This structure contains parameters that should be
* propagated to the libFirm parameter set.
*/
typedef struct backend_params {
/**
* This structure contains parameters that should be
* propagated to the libFirm parameter set.
*/
typedef struct backend_params {
+ /** if set, the backend cannot handle DWORD access */
+ unsigned do_dw_lowering:1;
+ /** if set, the backend supports inline assembly */
+ unsigned support_inline_asm:1;
+
/** Additional opcodes settings. */
const arch_ops_info *arch_op_settings;
/** Settings for architecture dependent optimizations */
const arch_dep_params_t *dep_param;
/** Additional opcodes settings. */
const arch_ops_info *arch_op_settings;
/** Settings for architecture dependent optimizations */
const arch_dep_params_t *dep_param;
- /** if set, the backend cannot handle DWORD access */
- unsigned do_dw_lowering;
-
/** the architecture specific intrinsic function creator */
create_intrinsic_fkt *arch_create_intrinsic_fkt;
/** the architecture specific intrinsic function creator */
create_intrinsic_fkt *arch_create_intrinsic_fkt;
@@
-59,6
+64,9
@@
typedef struct backend_params {
/** backend settings for if-conversion */
const opt_if_conv_info_t *if_conv_info;
/** backend settings for if-conversion */
const opt_if_conv_info_t *if_conv_info;
+
+ /** get the backend specific register encoding for a register name */
+ get_register_fkt *get_register_from_name;
} backend_params;
/**
} backend_params;
/**
diff --git
a/ir/be/bemain.c
b/ir/be/bemain.c
index
f277074
..
7a03245
100644
(file)
--- a/
ir/be/bemain.c
+++ b/
ir/be/bemain.c
@@
-206,10
+206,14
@@
int be_parse_arg(const char *arg) {
/** The be parameters returned by default, all off. */
const static backend_params be_params = {
/** The be parameters returned by default, all off. */
const static backend_params be_params = {
+ 0,
+ 0,
+ NULL,
+ NULL,
NULL,
NULL,
NULL,
NULL,
- 0,
NULL,
NULL,
+ NULL
};
/* Perform schedule verification if requested. */
};
/* Perform schedule verification if requested. */
diff --git
a/ir/be/firm/bearch_firm.c
b/ir/be/firm/bearch_firm.c
index
2a2b74d
..
6981c84
100644
(file)
--- a/
ir/be/firm/bearch_firm.c
+++ b/
ir/be/firm/bearch_firm.c
@@
-661,11
+661,13
@@
static const backend_params *firm_get_libfirm_params(void) {
0, /* no Mulh */
};
static backend_params p = {
0, /* no Mulh */
};
static backend_params p = {
+ 1, /* need dword lowering */
+ 0, /* don't support inlien assembler yet */
NULL, /* no additional opcodes */
NULL, /* will be set later */
NULL, /* no additional opcodes */
NULL, /* will be set later */
- 0, /* no dword lowering */
NULL, /* no creator function */
NULL, /* context for create_intrinsic_fkt */
NULL, /* no creator function */
NULL, /* context for create_intrinsic_fkt */
+ NULL, /* no inline assembler: no register names */
};
p.dep_param = &ad;
};
p.dep_param = &ad;
diff --git
a/ir/be/ia32/bearch_ia32.c
b/ir/be/ia32/bearch_ia32.c
index
38dfe8e
..
738658c
100644
(file)
--- a/
ir/be/ia32/bearch_ia32.c
+++ b/
ir/be/ia32/bearch_ia32.c
@@
-1924,6
+1924,14
@@
static int ia32_is_psi_allowed(ir_node *sel, ir_node *phi_list, int i, int j)
return 1;
}
return 1;
}
+/**
+ * Called by the frontend to encode a register name into a backend specific way
+ */
+static unsigned ia32_register_from_name(const char *regname) {
+ /* NYI */
+ return 0;
+}
+
static ia32_intrinsic_env_t intrinsic_env = {
NULL, /**< the irg, these entities belong to */
NULL, /**< entity for first div operand (move into FPU) */
static ia32_intrinsic_env_t intrinsic_env = {
NULL, /**< the irg, these entities belong to */
NULL, /**< entity for first div operand (move into FPU) */
@@
-1950,12
+1958,14
@@
static const backend_params *ia32_get_libfirm_params(void) {
32 /* Mulh allowed up to 32 bit */
};
static backend_params p = {
32 /* Mulh allowed up to 32 bit */
};
static backend_params p = {
+ 1, /* need dword lowering */
+ 1, /* support inline assembly */
NULL, /* no additional opcodes */
NULL, /* will be set later */
NULL, /* no additional opcodes */
NULL, /* will be set later */
- 1, /* need dword lowering */
ia32_create_intrinsic_fkt,
&intrinsic_env, /* context for ia32_create_intrinsic_fkt */
NULL, /* will be set later */
ia32_create_intrinsic_fkt,
&intrinsic_env, /* context for ia32_create_intrinsic_fkt */
NULL, /* will be set later */
+ ia32_register_from_name, /* register names */
};
p.dep_param = &ad;
};
p.dep_param = &ad;
diff --git
a/ir/be/mips/bearch_mips.c
b/ir/be/mips/bearch_mips.c
index
0c73f1d
..
fed1d3d
100644
(file)
--- a/
ir/be/mips/bearch_mips.c
+++ b/
ir/be/mips/bearch_mips.c
@@
-935,6
+935,14
@@
static ir_graph **mips_get_irg_list(const void *self, ir_graph ***irg_list) {
return NULL;
}
return NULL;
}
+/**
+ * Called by the frontend to encode a register name into a backend specific way
+ */
+static unsigned mips_register_from_name(const char *regname) {
+ /* NYI */
+ return 0;
+}
+
/**
* Returns the libFirm configuration parameter for this backend.
*/
/**
* Returns the libFirm configuration parameter for this backend.
*/
@@
-948,11
+956,13
@@
static const backend_params *mips_get_libfirm_params(void) {
32, /* Mulhs & Mulhu available for 32 bit */
};
static backend_params p = {
32, /* Mulhs & Mulhu available for 32 bit */
};
static backend_params p = {
+ 1, /* need dword lowering */
+ 0, /* don't support inlien assembler yet */
NULL, /* no additional opcodes */
NULL, /* will be set later */
NULL, /* no additional opcodes */
NULL, /* will be set later */
- 1, /* need dword lowering */
NULL, /* but yet no creator function */
NULL, /* context for create_intrinsic_fkt */
NULL, /* but yet no creator function */
NULL, /* context for create_intrinsic_fkt */
+ mips_register_from_name, /* register names */
};
p.dep_param = &ad;
};
p.dep_param = &ad;
diff --git
a/ir/be/ppc32/bearch_ppc32.c
b/ir/be/ppc32/bearch_ppc32.c
index
36f7530
..
f0c9a12
100644
(file)
--- a/
ir/be/ppc32/bearch_ppc32.c
+++ b/
ir/be/ppc32/bearch_ppc32.c
@@
-884,6
+884,14
@@
static ir_graph **ppc32_get_irg_list(const void *self, ir_graph ***irg_list) {
return NULL;
}
return NULL;
}
+/**
+ * Called by the frontend to encode a register name into a backend specific way
+ */
+static unsigned ppc32_register_from_name(const char *regname) {
+ /* NYI */
+ return 0;
+}
+
/**
* Returns the libFirm configuration parameter for this backend.
*/
/**
* Returns the libFirm configuration parameter for this backend.
*/
@@
-897,11
+905,13
@@
static const backend_params *ppc32_get_libfirm_params(void) {
32, /* SMUL & UMUL available for 32 bit */
};
static backend_params p = {
32, /* SMUL & UMUL available for 32 bit */
};
static backend_params p = {
+ 1, /* need dword lowering */
+ 0, /* don't support inlien assembler yet */
NULL, /* no additional opcodes */
NULL, /* will be set later */
NULL, /* no additional opcodes */
NULL, /* will be set later */
- 1, /* need dword lowering */
NULL, /* but yet no creator function */
NULL, /* context for create_intrinsic_fkt */
NULL, /* but yet no creator function */
NULL, /* context for create_intrinsic_fkt */
+ ppc32_register_from_name, /* register names */
};
p.dep_param = &ad;
};
p.dep_param = &ad;
diff --git
a/ir/be/test/bf_constfold.c
b/ir/be/test/bf_constfold.c
index
28036c1
..
5c3b9cb
100644
(file)
--- a/
ir/be/test/bf_constfold.c
+++ b/
ir/be/test/bf_constfold.c
@@
-1,8
+1,14
@@
-#include <stdio.h>
+
//
#include <stdio.h>
/* Demonstrates a bug where constant folding ignores width of bitfields */
/* Demonstrates a bug where constant folding ignores width of bitfields */
-struct __attribute__((packed)) A
+#ifdef __GNUC__
+#define PACKED __attribute__((packed))
+#else
+#define PACKED
+#endif
+
+struct PACKED A
{
unsigned int i:1, l:1, j:3, k:11;
};
{
unsigned int i:1, l:1, j:3, k:11;
};