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added function to retireve ilp scheduler interface
author
Christian Würdig
<chriswue@ipd.info.uni-karlsruhe.de>
Mon, 4 Dec 2006 15:56:52 +0000
(15:56 +0000)
committer
Christian Würdig
<chriswue@ipd.info.uni-karlsruhe.de>
Mon, 4 Dec 2006 15:56:52 +0000
(15:56 +0000)
ir/be/arm/bearch_arm.c
patch
|
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ir/be/firm/bearch_firm.c
patch
|
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ir/be/ia32/bearch_ia32.c
patch
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ir/be/mips/bearch_mips.c
patch
|
blob
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ir/be/mips/mips_scheduler.c
patch
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ir/be/mips/mips_scheduler.h
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ir/be/ppc32/bearch_ppc32.c
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diff --git
a/ir/be/arm/bearch_arm.c
b/ir/be/arm/bearch_arm.c
index
78ccaad
..
e2812ef
100644
(file)
--- a/
ir/be/arm/bearch_arm.c
+++ b/
ir/be/arm/bearch_arm.c
@@
-28,6
+28,7
@@
#include "../be.h"
#include "../beabi.h"
#include "../bemachine.h"
#include "../be.h"
#include "../beabi.h"
#include "../bemachine.h"
+#include "../beilpsched.h"
#include "bearch_arm_t.h"
#include "bearch_arm_t.h"
@@
-1067,6
+1068,10
@@
static const list_sched_selector_t *arm_get_list_sched_selector(const void *self
return &arm_sched_selector;
}
return &arm_sched_selector;
}
+static const ilp_sched_selector_t *arm_get_ilp_sched_selector(const void *self) {
+ return NULL;
+}
+
/**
* Returns the necessary byte alignment for storing a register of given class.
*/
/**
* Returns the necessary byte alignment for storing a register of given class.
*/
@@
-1159,6
+1164,7
@@
const arch_isa_if_t arm_isa_if = {
arm_get_irn_handler,
arm_get_code_generator_if,
arm_get_list_sched_selector,
arm_get_irn_handler,
arm_get_code_generator_if,
arm_get_list_sched_selector,
+ arm_get_ilp_sched_selector,
arm_get_reg_class_alignment,
arm_get_libfirm_params,
arm_get_allowed_execution_units,
arm_get_reg_class_alignment,
arm_get_libfirm_params,
arm_get_allowed_execution_units,
diff --git
a/ir/be/firm/bearch_firm.c
b/ir/be/firm/bearch_firm.c
index
f940b56
..
a8128e2
100644
(file)
--- a/
ir/be/firm/bearch_firm.c
+++ b/
ir/be/firm/bearch_firm.c
@@
-602,6
+602,10
@@
static const list_sched_selector_t *firm_get_list_sched_selector(const void *sel
return trivial_selector;
}
return trivial_selector;
}
+static const ilp_sched_selector_t *firm_get_ilp_sched_selector(const void *self) {
+ return NULL;
+}
+
/**
* Returns the necessary byte alignment for storing a register of given class.
*/
/**
* Returns the necessary byte alignment for storing a register of given class.
*/
@@
-662,6
+666,7
@@
const arch_isa_if_t firm_isa = {
firm_get_irn_handler,
firm_get_code_generator_if,
firm_get_list_sched_selector,
firm_get_irn_handler,
firm_get_code_generator_if,
firm_get_list_sched_selector,
+ firm_get_ilp_sched_selector,
firm_get_reg_class_alignment,
firm_get_libfirm_params,
firm_get_allowed_execution_units,
firm_get_reg_class_alignment,
firm_get_libfirm_params,
firm_get_allowed_execution_units,
diff --git
a/ir/be/ia32/bearch_ia32.c
b/ir/be/ia32/bearch_ia32.c
index
1340753
..
2c39f5c
100644
(file)
--- a/
ir/be/ia32/bearch_ia32.c
+++ b/
ir/be/ia32/bearch_ia32.c
@@
-46,6
+46,7
@@
#include "../be_dbgout.h"
#include "../beblocksched.h"
#include "../bemachine.h"
#include "../be_dbgout.h"
#include "../beblocksched.h"
#include "../bemachine.h"
+#include "../beilpsched.h"
#include "bearch_ia32_t.h"
#include "bearch_ia32_t.h"
@@
-1722,6
+1723,10
@@
static const list_sched_selector_t *ia32_get_list_sched_selector(const void *sel
return &ia32_sched_selector;
}
return &ia32_sched_selector;
}
+static const ilp_sched_selector_t *ia32_get_ilp_sched_selector(const void *self) {
+ return NULL;
+}
+
/**
* Returns the necessary byte alignment for storing a register of given class.
*/
/**
* Returns the necessary byte alignment for storing a register of given class.
*/
@@
-1976,6
+1981,7
@@
const arch_isa_if_t ia32_isa_if = {
ia32_get_irn_handler,
ia32_get_code_generator_if,
ia32_get_list_sched_selector,
ia32_get_irn_handler,
ia32_get_code_generator_if,
ia32_get_list_sched_selector,
+ ia32_get_ilp_sched_selector,
ia32_get_reg_class_alignment,
ia32_get_libfirm_params,
ia32_get_allowed_execution_units,
ia32_get_reg_class_alignment,
ia32_get_libfirm_params,
ia32_get_allowed_execution_units,
diff --git
a/ir/be/mips/bearch_mips.c
b/ir/be/mips/bearch_mips.c
index
a2ce576
..
6b86b10
100644
(file)
--- a/
ir/be/mips/bearch_mips.c
+++ b/
ir/be/mips/bearch_mips.c
@@
-983,6
+983,7
@@
const arch_isa_if_t mips_isa_if = {
mips_get_irn_handler,
mips_get_code_generator_if,
mips_get_list_sched_selector,
mips_get_irn_handler,
mips_get_code_generator_if,
mips_get_list_sched_selector,
+ mips_get_ilp_sched_selector,
mips_get_reg_class_alignment,
mips_get_libfirm_params,
mips_get_allowed_execution_units,
mips_get_reg_class_alignment,
mips_get_libfirm_params,
mips_get_allowed_execution_units,
diff --git
a/ir/be/mips/mips_scheduler.c
b/ir/be/mips/mips_scheduler.c
index
edac02d
..
f4c7a7b
100644
(file)
--- a/
ir/be/mips/mips_scheduler.c
+++ b/
ir/be/mips/mips_scheduler.c
@@
-189,3
+189,7
@@
const list_sched_selector_t *mips_get_list_sched_selector(const void *self, list
//return &mips_sched_selector;
return selector;
}
//return &mips_sched_selector;
return selector;
}
+
+const ilp_sched_selector_t *mips_get_ilp_sched_selector(const void *self) {
+ return NULL;
+}
diff --git
a/ir/be/mips/mips_scheduler.h
b/ir/be/mips/mips_scheduler.h
index
7708543
..
8cb9258
100644
(file)
--- a/
ir/be/mips/mips_scheduler.h
+++ b/
ir/be/mips/mips_scheduler.h
@@
-4,5
+4,6
@@
#include "../besched_t.h"
const list_sched_selector_t *mips_get_list_sched_selector(const void *self, list_sched_selector_t *selector);
#include "../besched_t.h"
const list_sched_selector_t *mips_get_list_sched_selector(const void *self, list_sched_selector_t *selector);
+const ilp_sched_selector_t *mips_get_ilp_sched_selector(const void *self);
#endif
#endif
diff --git
a/ir/be/ppc32/bearch_ppc32.c
b/ir/be/ppc32/bearch_ppc32.c
index
2fca423
..
26bf01a
100644
(file)
--- a/
ir/be/ppc32/bearch_ppc32.c
+++ b/
ir/be/ppc32/bearch_ppc32.c
@@
-857,6
+857,10
@@
static const list_sched_selector_t *ppc32_get_list_sched_selector(const void *se
return &ppc32_sched_selector;
}
return &ppc32_sched_selector;
}
+static const ilp_sched_selector_t *ppc32_get_ilp_sched_selector(const void *self) {
+ return NULL;
+}
+
/**
* Returns the necessary byte alignment for storing a register of given class.
*/
/**
* Returns the necessary byte alignment for storing a register of given class.
*/
@@
-917,6
+921,7
@@
const arch_isa_if_t ppc32_isa_if = {
ppc32_get_irn_handler,
ppc32_get_code_generator_if,
ppc32_get_list_sched_selector,
ppc32_get_irn_handler,
ppc32_get_code_generator_if,
ppc32_get_list_sched_selector,
+ ppc32_get_ilp_sched_selector,
ppc32_get_reg_class_alignment,
ppc32_get_libfirm_params,
ppc32_get_allowed_execution_units,
ppc32_get_reg_class_alignment,
ppc32_get_libfirm_params,
ppc32_get_allowed_execution_units,